added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_pit.c
- Committer:
- JojoS
- Date:
- 2016-09-10
- Revision:
- 147:ba84b7dc41a7
- Parent:
- 144:ef7eb2e8f9f7
File content as of revision 147:ba84b7dc41a7:
/* * Copyright (c) 2015, Freescale Semiconductor, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * o Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. * * o Redistributions in binary form must reproduce the above copyright notice, this * list of conditions and the following disclaimer in the documentation and/or * other materials provided with the distribution. * * o Neither the name of Freescale Semiconductor, Inc. nor the names of its * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "fsl_pit.h" /******************************************************************************* * Prototypes ******************************************************************************/ /*! * @brief Gets the instance from the base address to be used to gate or ungate the module clock * * @param base PIT peripheral base address * * @return The PIT instance */ static uint32_t PIT_GetInstance(PIT_Type *base); /******************************************************************************* * Variables ******************************************************************************/ /*! @brief Pointers to PIT bases for each instance. */ static PIT_Type *const s_pitBases[] = PIT_BASE_PTRS; /*! @brief Pointers to PIT clocks for each instance. */ static const clock_ip_name_t s_pitClocks[] = PIT_CLOCKS; /******************************************************************************* * Code ******************************************************************************/ static uint32_t PIT_GetInstance(PIT_Type *base) { uint32_t instance; /* Find the instance index from base address mappings. */ for (instance = 0; instance < FSL_FEATURE_SOC_PIT_COUNT; instance++) { if (s_pitBases[instance] == base) { break; } } assert(instance < FSL_FEATURE_SOC_PIT_COUNT); return instance; } void PIT_Init(PIT_Type *base, const pit_config_t *config) { assert(config); /* Ungate the PIT clock*/ CLOCK_EnableClock(s_pitClocks[PIT_GetInstance(base)]); /* Enable PIT timers */ base->MCR &= ~PIT_MCR_MDIS_MASK; /* Config timer operation when in debug mode */ if (config->enableRunInDebug) { base->MCR &= ~PIT_MCR_FRZ_MASK; } else { base->MCR |= PIT_MCR_FRZ_MASK; } } void PIT_Deinit(PIT_Type *base) { /* Disable PIT timers */ base->MCR |= PIT_MCR_MDIS_MASK; /* Gate the PIT clock*/ CLOCK_DisableClock(s_pitClocks[PIT_GetInstance(base)]); } #if defined(FSL_FEATURE_PIT_HAS_LIFETIME_TIMER) && FSL_FEATURE_PIT_HAS_LIFETIME_TIMER uint64_t PIT_GetLifetimeTimerCount(PIT_Type *base) { uint32_t valueH = 0U; uint32_t valueL = 0U; /* LTMR64H should be read before LTMR64L */ valueH = base->LTMR64H; valueL = base->LTMR64L; return (((uint64_t)valueH << 32U) + (uint64_t)(valueL)); } #endif /* FSL_FEATURE_PIT_HAS_LIFETIME_TIMER */