Diff: targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/serial_api.c

Revision:

66:fdb3f9f9a72f

Parent:

0:9b334a45a8ff

Child:

119:3921aeca8633

--- a/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/serial_api.c	Tue Feb 16 16:00:10 2016 +0000
+++ b/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/serial_api.c	Thu Feb 18 09:45:10 2016 +0000
@@ -512,7 +512,11 @@
     int data;
     int was_masked;
 
+#if defined ( __ICCARM__ )
+    was_masked = __disable_irq_iar();
+#else
     was_masked = __disable_irq();
+#endif /* __ICCARM__ */
     if (obj->uart->SCFSR & 0x93) {
         err_read = obj->uart->SCFSR;
         obj->uart->SCFSR = (err_read & ~0x93);
@@ -529,7 +533,11 @@
     while (!serial_readable(obj));
     data = obj->uart->SCFRDR & 0xff;
 
+#if defined ( __ICCARM__ )
+    was_masked = __disable_irq_iar();
+#else
     was_masked = __disable_irq();
+#endif /* __ICCARM__ */
     err_read = obj->uart->SCFSR;
     obj->uart->SCFSR = (err_read & 0xfffD);     // Clear RDF
     if (!was_masked) {
@@ -546,14 +554,22 @@
     uint16_t dummy_read;
     int was_masked;
 
+#if defined ( __ICCARM__ )
+    was_masked = __disable_irq_iar();
+#else
     was_masked = __disable_irq();
+#endif /* __ICCARM__ */
     obj->uart->SCSCR |= 0x0080;     // Set TIE
     if (!was_masked) {
         __enable_irq();
     }
     while (!serial_writable(obj));
     obj->uart->SCFTDR = c;
+#if defined ( __ICCARM__ )
+    was_masked = __disable_irq_iar();
+#else
     was_masked = __disable_irq();
+#endif /* __ICCARM__ */
     dummy_read = obj->uart->SCFSR;
     obj->uart->SCFSR = (dummy_read & 0xff9f);  // Clear TEND/TDFE
     if (!was_masked) {
@@ -572,7 +588,11 @@
 
 void serial_clear(serial_t *obj) {
     int was_masked;
+#if defined ( __ICCARM__ )
+    was_masked = __disable_irq_iar();
+#else
     was_masked = __disable_irq();
+#endif /* __ICCARM__ */
 
     obj->uart->SCFCR |=  0x06;          // TFRST = 1, RFRST = 1
     obj->uart->SCFCR &= ~0x06;          // TFRST = 0, RFRST = 0
@@ -589,7 +609,11 @@
 
 void serial_break_set(serial_t *obj) {
     int was_masked;
+#if defined ( __ICCARM__ )
+    was_masked = __disable_irq_iar();
+#else
     was_masked = __disable_irq();
+#endif /* __ICCARM__ */
     // TxD Output(L)
     obj->uart->SCSPTR &= ~0x0001u;  // SPB2DT = 0
     obj->uart->SCSCR &= ~0x0020u;   // TE = 0 (Output disable)
@@ -600,7 +624,11 @@
 
 void serial_break_clear(serial_t *obj) {
     int was_masked;
+#if defined ( __ICCARM__ )
+    was_masked = __disable_irq_iar();
+#else
     was_masked = __disable_irq();
+#endif /* __ICCARM__ */
     obj->uart->SCSCR |= 0x0020u; // TE = 1 (Output enable)
     obj->uart->SCSPTR |= 0x0001u; // SPB2DT = 1
     if (!was_masked) {
@@ -615,7 +643,11 @@
     serial_flow_irq_set(obj, 0);
 
     if (type == FlowControlRTSCTS) {
+#if defined ( __ICCARM__ )
+        was_masked = __disable_irq_iar();
+#else
         was_masked = __disable_irq();
+#endif /* __ICCARM__ */
         obj->uart->SCFCR = 0x0008u;   // CTS/RTS enable
         if (!was_masked) {
             __enable_irq();
@@ -623,7 +655,11 @@
         pinmap_pinout(rxflow, PinMap_UART_RTS);
         pinmap_pinout(txflow, PinMap_UART_CTS);
     } else {
+#if defined ( __ICCARM__ )
+        was_masked = __disable_irq_iar();
+#else
         was_masked = __disable_irq();
+#endif /* __ICCARM__ */
         obj->uart->SCFCR = 0x0000u; // CTS/RTS diable
         if (!was_masked) {
             __enable_irq();