added prescaler for 16 bit pwm in LPC1347 target
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Diff: targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_IAR/LPC43xx.icf
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 0:9b334a45a8ff
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_IAR/LPC43xx.icf Tue Aug 02 14:07:36 2016 +0000 +++ b/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_IAR/LPC43xx.icf Fri Sep 02 15:07:44 2016 +0100 @@ -1,36 +1,36 @@ -/* [ROM] */ -define symbol __intvec_start__ = 0x14000000; -define symbol __region_ROM_start__ = 0x14000000; -define symbol __region_ROM_end__ = 0x143FFFFF; - -/* [RAM] Vector table dynamic copy: 8_byte_aligned(69 vect * 4 bytes) = 8_byte_aligned(0x0114) = 0x0118*/ -define symbol __NVIC_start__ = 0x10000000; -define symbol __NVIC_end__ = 0x10000117; -define symbol __region_RAM_start__ = 0x10000118; -define symbol __region_RAM_end__ = 0x1001FFDF; -define symbol _AHB_RAM_start__ = 0x20000000; -define symbol _AHB_RAM_end__ = 0x20007FFF; - -/* Memory regions */ -define memory mem with size = 4G; - -define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; - -define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; -define region AHB_RAM_region = mem:[from _AHB_RAM_start__ to _AHB_RAM_end__]; - -/* Stack and Heap */ -/*Heap 1/4 of ram and stack 1/8*/ -define symbol __size_cstack__ = 0x4000; -define symbol __size_heap__ = 0x8000; -define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; -define block STACKHEAP with fixed order { block HEAP, block CSTACK }; - -initialize by copy with packing = zeros { readwrite }; -do not initialize { section .noinit }; - -place at address mem:__intvec_start__ { section .intvec }; -place in ROM_region { readonly }; -place in RAM_region { readwrite, block STACKHEAP }; -place in AHB_RAM_region { section USB_RAM }; +/* [ROM] */ +define symbol __intvec_start__ = 0x14000000; +define symbol __region_ROM_start__ = 0x14000000; +define symbol __region_ROM_end__ = 0x143FFFFF; + +/* [RAM] Vector table dynamic copy: 8_byte_aligned(69 vect * 4 bytes) = 8_byte_aligned(0x0114) = 0x0118*/ +define symbol __NVIC_start__ = 0x10000000; +define symbol __NVIC_end__ = 0x10000117; +define symbol __region_RAM_start__ = 0x10000118; +define symbol __region_RAM_end__ = 0x1001FFDF; +define symbol _AHB_RAM_start__ = 0x20000000; +define symbol _AHB_RAM_end__ = 0x20007FFF; + +/* Memory regions */ +define memory mem with size = 4G; + +define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; + +define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; +define region AHB_RAM_region = mem:[from _AHB_RAM_start__ to _AHB_RAM_end__]; + +/* Stack and Heap */ +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x4000; +define symbol __size_heap__ = 0x8000; +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; +define block STACKHEAP with fixed order { block HEAP, block CSTACK }; + +initialize by copy with packing = zeros { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__intvec_start__ { section .intvec }; +place in ROM_region { readonly }; +place in RAM_region { readwrite, block STACKHEAP }; +place in AHB_RAM_region { section USB_RAM };