Diff: targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/gpio_irq_api.c

Revision:

50:a417edff4437

Parent:

0:9b334a45a8ff

Child:

144:ef7eb2e8f9f7

--- a/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/gpio_irq_api.c	Wed Jan 13 12:45:11 2016 +0000
+++ b/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/gpio_irq_api.c	Fri Jan 15 07:45:16 2016 +0000
@@ -147,7 +147,7 @@
     bool was_disabled = false;
     if(GPIO->IEN == 0) was_disabled = true;
 
-    GPIO_IntConfig((GPIO_Port_TypeDef)(obj->pin >> 4 & 0xF), obj->pin &0xF, obj->risingEdge, obj->fallingEdge, obj->risingEdge || obj->fallingEdge);
+    GPIO_IntConfig((GPIO_Port_TypeDef)((obj->pin >> 4) & 0xF), obj->pin &0xF, obj->risingEdge, obj->fallingEdge, obj->risingEdge || obj->fallingEdge);
     if ((GPIO->IEN != 0) && (obj->risingEdge || obj->fallingEdge) && was_disabled) {
         blockSleepMode(GPIO_LEAST_ACTIVE_SLEEPMODE);
     }
@@ -156,12 +156,12 @@
 inline void gpio_irq_enable(gpio_irq_t *obj)
 {
     if(GPIO->IEN == 0) blockSleepMode(GPIO_LEAST_ACTIVE_SLEEPMODE);
-    GPIO_IntEnable(1 << obj->pin & 0xF); // pin mask for pins to enable
+    GPIO_IntEnable(1 << (obj->pin & 0xF)); // pin mask for pins to enable
 }
 
 inline void gpio_irq_disable(gpio_irq_t *obj)
 {
-    GPIO_IntDisable(1 << obj->pin & 0xF); // pin mask for pins to disable
+    GPIO_IntDisable(1 << (obj->pin & 0xF)); // pin mask for pins to disable
     if(GPIO->IEN == 0) unblockSleepMode(GPIO_LEAST_ACTIVE_SLEEPMODE);
 }