Diff: targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rtc.c

Revision:

50:a417edff4437

Parent:

0:9b334a45a8ff

Child:

144:ef7eb2e8f9f7

--- a/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rtc.c	Wed Jan 13 12:45:11 2016 +0000
+++ b/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rtc.c	Fri Jan 15 07:45:16 2016 +0000
@@ -1,10 +1,10 @@
 /***************************************************************************//**
  * @file em_rtc.c
  * @brief Real Time Counter (RTC) Peripheral API
- * @version 3.20.12
+ * @version 4.2.1
  *******************************************************************************
  * @section License
- * <b>(C) Copyright 2014 Silicon Labs, http://www.silabs.com</b>
+ * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
  *******************************************************************************
  *
  * Permission is granted to anyone to use this software for any purpose,
@@ -30,12 +30,11 @@
  *
  ******************************************************************************/
 
-
 #include "em_rtc.h"
 #if defined(RTC_COUNT) && (RTC_COUNT > 0)
 
 #include "em_assert.h"
-#include "em_bitband.h"
+#include "em_bus.h"
 
 /***************************************************************************//**
  * @addtogroup EM_Library
@@ -82,7 +81,7 @@
  *   Bitmask corresponding to SYNCBUSY register defined bits, indicating
  *   registers that must complete any ongoing synchronization.
  ******************************************************************************/
-__STATIC_INLINE void RTC_Sync(uint32_t mask)
+__STATIC_INLINE void regSync(uint32_t mask)
 {
   /* Avoid deadlock if modifying the same register twice when freeze mode is */
   /* activated. */
@@ -121,18 +120,18 @@
   /* Initialize selected compare value */
   switch (comp)
   {
-  case 0:
-    ret = RTC->COMP0;
-    break;
+    case 0:
+      ret = RTC->COMP0;
+      break;
 
-  case 1:
-    ret = RTC->COMP1;
-    break;
+    case 1:
+      ret = RTC->COMP1;
+      break;
 
-  default:
-    /* Unknown compare register selected */
-    ret = 0;
-    break;
+    default:
+      /* Unknown compare register selected */
+      ret = 0;
+      break;
   }
 
   return ret;
@@ -148,7 +147,7 @@
  *   low frequency domain. If the same register is modified before a previous
  *   update has completed, this function will stall until the previous
  *   synchronization has completed. This only applies to the Gecko Family, see
- *   comment in the RTC_Sync() internal function call.
+ *   comment in the regSync() internal function call.
  *
  * @param[in] comp
  *   Compare register to set, either 0 or 1
@@ -163,33 +162,34 @@
   uint32_t          syncbusy;
 #endif
 
-  EFM_ASSERT(RTC_COMP_REG_VALID(comp) &&
-             ((value & ~(_RTC_COMP0_COMP0_MASK >> _RTC_COMP0_COMP0_SHIFT)) == 0));
+  EFM_ASSERT(RTC_COMP_REG_VALID(comp)
+             && ((value & ~(_RTC_COMP0_COMP0_MASK
+                            >> _RTC_COMP0_COMP0_SHIFT)) == 0));
 
   /* Initialize selected compare value */
   switch (comp)
   {
-  case 0:
-    compReg = &(RTC->COMP0);
+    case 0:
+      compReg = &(RTC->COMP0);
 #if defined(_EFM32_GECKO_FAMILY)
-    syncbusy = RTC_SYNCBUSY_COMP0;
+      syncbusy = RTC_SYNCBUSY_COMP0;
 #endif
-    break;
+      break;
 
-  case 1:
-    compReg = &(RTC->COMP1);
+    case 1:
+      compReg = &(RTC->COMP1);
 #if defined(_EFM32_GECKO_FAMILY)
-    syncbusy = RTC_SYNCBUSY_COMP1;
+      syncbusy = RTC_SYNCBUSY_COMP1;
 #endif
-    break;
+      break;
 
-  default:
-    /* Unknown compare register selected, abort */
-    return;
+    default:
+      /* Unknown compare register selected, abort */
+      return;
   }
 #if defined(_EFM32_GECKO_FAMILY)
   /* LF register about to be modified require sync. busy check */
-  RTC_Sync(syncbusy);
+  regSync(syncbusy);
 #endif
 
   *compReg = value;
@@ -205,7 +205,7 @@
  *   requires synchronization into the low frequency domain. If this register is
  *   modified before a previous update to the same register has completed, this
  *   function will stall until the previous synchronization has completed. This
- *   only applies to the Gecko Family, see comment in the RTC_Sync() internal
+ *   only applies to the Gecko Family, see comment in the regSync() internal
  *   function call.
  *
  * @param[in] enable
@@ -215,16 +215,16 @@
 {
 #if defined(_EFM32_GECKO_FAMILY)
   /* LF register about to be modified require sync. busy check */
-  RTC_Sync(RTC_SYNCBUSY_CTRL);
+  regSync(RTC_SYNCBUSY_CTRL);
 #endif
 
-  BITBAND_Peripheral(&(RTC->CTRL), _RTC_CTRL_EN_SHIFT, (unsigned int) enable);
+  BUS_RegBitWrite(&(RTC->CTRL), _RTC_CTRL_EN_SHIFT, enable);
 
 #if defined(_EFM32_GECKO_FAMILY)
   /* Wait for CTRL to be updated before returning, because calling code may
      depend upon that the CTRL register is updated after this function has
      returned. */
-  RTC_Sync(RTC_SYNCBUSY_CTRL);
+  regSync(RTC_SYNCBUSY_CTRL);
 #endif
 }
 
@@ -293,7 +293,7 @@
  *   synchronization into the low frequency domain. If this register is
  *   modified before a previous update to the same register has completed, this
  *   function will stall until the previous synchronization has completed. This
- *   only applies to the Gecko Family, see comment in the RTC_Sync() internal
+ *   only applies to the Gecko Family, see comment in the regSync() internal
  *   function call.
  *
  * @param[in] init
@@ -328,7 +328,7 @@
 
 #if defined(_EFM32_GECKO_FAMILY)
   /* LF register about to be modified require sync. busy check */
-  RTC_Sync(RTC_SYNCBUSY_CTRL);
+  regSync(RTC_SYNCBUSY_CTRL);
 #endif
 
   RTC->CTRL = tmp;
@@ -354,7 +354,7 @@
   /* Wait for CTRL, COMP0 and COMP1 to be updated before returning, because the
      calling code may depend upon that the register values are updated after
      this function has returned. */
-  RTC_Sync(RTC_SYNCBUSY_CTRL | RTC_SYNCBUSY_COMP0 | RTC_SYNCBUSY_COMP1);
+  regSync(RTC_SYNCBUSY_CTRL | RTC_SYNCBUSY_COMP0 | RTC_SYNCBUSY_COMP1);
 #endif
 }