added prescaler for 16 bit pwm in LPC1347 target
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Diff: targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_mpu.c
- Revision:
- 50:a417edff4437
- Parent:
- 0:9b334a45a8ff
- Child:
- 144:ef7eb2e8f9f7
--- a/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_mpu.c Wed Jan 13 12:45:11 2016 +0000 +++ b/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_mpu.c Fri Jan 15 07:45:16 2016 +0000 @@ -1,10 +1,10 @@ /***************************************************************************//** * @file em_mpu.c * @brief Memory Protection Unit (MPU) Peripheral API - * @version 3.20.12 + * @version 4.2.1 ******************************************************************************* * @section License - * <b>(C) Copyright 2014 Silicon Labs, http://www.silabs.com</b> + * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b> ******************************************************************************* * * Permission is granted to anyone to use this software for any purpose, @@ -30,7 +30,6 @@ * ******************************************************************************/ - #include "em_mpu.h" #if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1) #include "em_assert.h" @@ -102,15 +101,15 @@ EFM_ASSERT(init->tex <= 0x7); MPU->RBAR = init->baseAddress; - MPU->RASR = ((init->disableExec ? 1 : 0) << MPU_RASR_XN_Pos) | - (init->accessPermission << MPU_RASR_AP_Pos) | - (init->tex << MPU_RASR_TEX_Pos) | - ((init->shareable ? 1 : 0) << MPU_RASR_S_Pos) | - ((init->cacheable ? 1 : 0) << MPU_RASR_C_Pos) | - ((init->bufferable ? 1 : 0) << MPU_RASR_B_Pos) | - (init->srd << MPU_RASR_SRD_Pos) | - (init->size << MPU_RASR_SIZE_Pos) | - (1 << MPU_RASR_ENABLE_Pos); + MPU->RASR = ((init->disableExec ? 1 : 0) << MPU_RASR_XN_Pos) + | (init->accessPermission << MPU_RASR_AP_Pos) + | (init->tex << MPU_RASR_TEX_Pos) + | ((init->shareable ? 1 : 0) << MPU_RASR_S_Pos) + | ((init->cacheable ? 1 : 0) << MPU_RASR_C_Pos) + | ((init->bufferable ? 1 : 0) << MPU_RASR_B_Pos) + | (init->srd << MPU_RASR_SRD_Pos) + | (init->size << MPU_RASR_SIZE_Pos) + | (1 << MPU_RASR_ENABLE_Pos); } else {