added prescaler for 16 bit pwm in LPC1347 target
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Diff: targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/Changes_emlib.txt
- Revision:
- 0:9b334a45a8ff
- Child:
- 50:a417edff4437
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/Changes_emlib.txt Thu Oct 01 15:25:22 2015 +0300 @@ -0,0 +1,327 @@ +================ Revision history ============================================ +3.20.12: + - Added errata fix EMU_108 and IDAC101. + - #ifdef's now use register defines instead of a mix of register and family defines. + - Added a case for when there are only 4 DMA channels available: + Alignment was (correctly) defined at 7 bit, but got asserted for 8 bit, leading + to unpredictable tripped asserts. + - Added USART_INITPRSTRIGGER_DEFAULT defined structure to support HWCONF. + - Added support for LFC clock tree. + - Added CMU_USHFRCOBandSet() and CMU_USHFRCOBandGet(). + +3.20.10: + - Maintenance release, no changes. + +3.20.9: + - Added support for Happy Gecko including support for the new oscillator USHFRCO. + - Added MSC_WriteWordFast() function. This flash write function has a similar + performance as the old MSC_WriteWord(), but it disables interrupts and + requires a core clock frequency of at least 14MHz. The new MSC_WriteWord() + is slower, but it does not disable interrupts and may be called with core + clock frequencies down to 1MHz. + - Fixed a bug in EMU_EnterEM4() that set other EM4 configuration bits to 0 + on EM4 entry. + - Added EMU_EM23Init(). + - Fixed a bug in CMU_FlashWaitStateControl() where it failed to set the + required wait-state configuration if the MSC is locked. + - Added EMU interrupt handling functions. + - BURTC_Reset() changed to use async reset RMU_CTRL_BURSTEN instead of + reset value writeback. This makes the function independent of a selected + and enabled clock. + - BURTC_Sync() now returns without waiting for BURTC->SYNCBUSY to clear + when no clock is selected in BURTC_CTRL_CLKSEL. + - Fixed assertion bug in ACMP_ChannelSet() that checked the negSel parameter + against the wrong upper bound. + +3.20.7: + - Fixed CMU_MAX_FREQ_HFLE macro for Wonder family. + - Fixed MSC_WriteWord() bug. + - Added syncbusy wait in RTC_Reset() for Gecko family. + +3.20.6: + - Corrected fix for Errata EMU_E107. + +3.20.5: + - Updated license texts. + - Removed unnecessary fix for Wonder Gecko. + - Updated LFXO temperature compensation in CHIP_Init(). + - Changed LESENSE_ScanStart, LESENSE_ScanStop, LESENSE_DecoderStart, + LESENSE_ResultBufferClear() and LESENSE_Reset() functions to wait until + CMD register writes complete in order to make sure CMD register writes do + not break each other, and for register values to be consistent when + returning from functions that write to the CMD register. + - Added fix for Errata EMU_E107. + - Added family to SYSTEM_ChipRevision_TypeDef. + - Fixed bug in function AES_OFB128 which failed on Zero Gecko. + - Fixed RMU_ResetCauseGet() to return correct reset causes. + - Fixed bug in RTC_CounterReset() which failed to reset counter immediately + after return on Gecko devices. + - Added static inline non-blocking USART receive functions (USART_Rx...). + - Added function SYSTEM_GetFamily(). + - Added function DAC_ChannelOutputSet(). + - Fixed MSC_WriteWord() to not use WDOUBLE if LPWRITE is set. + +3.20.2: + - Fixed bug regarding when MEMINFO in DEVINFO was introduced. + The correct crossover is production revision 18. + - Fixed bug in WDOG_Feed() which does not feed the watchdog if the watchdog + is disabled. Previously, the watchdog was broken after WDOG_Feed() fed it + when it was disabled. +- Fixed issue in em_i2c.c, which should set the NACK bit in the I2C CMD + register for the next to last byte received. The exception is when only + one byte is to be received. Then the NACK bit must be set like the + previous code was doing. +- Added function BURTC_ClockFreqGet() in order to determine clock frequency + of BURTC. +- Fixed bug in BURTC_Reset() which made a subsequent call to BURTC_Init hang. +- Added support for the IDAC module on the Zero Gecko family, em_idac.c/h. +- Fixed bug in DAC_PrescaleCalc() which could return higher values than + the maximum prescaler value. The fix makes sure to return the max prescaler + value resulting in possible higher DAC frequency than requested. +- Fixed I2C_BusFreqSet to use documented values for Nlow and Nhigh values, + and do not decrement the div(isor) by one according to the formula because + this resulted in higher I2C bus frequencies than desired. + +3.20.0: + - LEUART: Added LEUART_TxDmaInEM2Enable() and LEUART_RxDmaInEM2Enable() for + enabling and disabling DMA LEUART RX and Tx in EM2 support. + +3.0.3: + - Internal release for testing Wonder Gecko support. + - SYSTEM: Added function to enable/disable FPU access on Wonder parts, + SYSTEM_FpuAccessModeSet(). + - USART: Added USART_SpiTransfer() function. + +3.0.2: + - MSC: In MSC_WriteWord(), added support for double word write cycle support + (WDOUBLE) on devices with more than 512KiBytes of Flash memory. This can + almost double the speed of the MSC_WriteWord function for large data sizes. + - MSC: In MSC_ErasePage(), added support for devices with Flash page size + larger than 512 bytes, like Giant and Leopard Gecko. + - CMU: Fixed bug in CMU_ClockDivSet(). Clear HFLE and HFCORECLKLEDIV flags when + the core runs at frequencies up to 32MHz. + - CMU: Fixed bug in CMU_ClockEnable(): Set the HFLE and HFCORECLKLEDIV flags + when the CORE clock runs at frequencies higher than 32MHz. + - CMU: Fixed bug in CMU_ClockSelectSet(): Set HFLE and DIV4 factor for peripheral + clock if HFCORE clock for LE is enabled and the CORE clock runs at + frequencies higher than 32MHz. + - BITBAND: Added BITBAND_PeripheralRead() and BITBAND_SRAMRead() functions. + - DMA: Added #ifndef EXCLUDE_DEFAULT_DMA_IRQ_HANDLER around DMA_IRQHandler in + order for the user to implement a custom IRQ handler or run without a DMA + IRQ handler by defining EXCLUDE_DEFAULT_DMA_IRQ_HANDLER with the -D compiler + option. + - BURTC: In functions BURTC_Init() and BURTC_CompareSet(), moved SYNCBUSY + loops in front of modifications of registers COMP0 and LPMODE. + - MSC: Fixed ram_code section error on Keil toolchain. + - MSC: Removed uneeded code from MSC init and deinit which would have no + effect (Big thanks to Martin Schreiber for reporting this bug!). + - System: Added access functions for reading some values out of the Device + Information page. + +3.0.1: + - LFXO fix for Giant family. + - USART: Fix for EFM32TG108Fxx which does not have USART0. + - EBI: The write to the CTRL register now happens before the ROUTE registers + are set. This avoids potential glitches. + - LESENSE: Fix issue when using lesenseAltExMapACMP. + - TIMER: Fix compilation on devices where ADC is not available. + - LCD: Fix bug where Aloc field would not be set to 0. + - BURTC: Fix Reset function by adding reset of COMP0 register and removing + reset of POWERDOWN register. The POWERDOWN register cannot be used to + power up the blocks after it has been powered down. + - CMU: Fixed bug where ClockDivSet, ClockDivGet and ClockFreqGet didn't work for + cmuClock_LCDpre clock. Also corrected 3 wrongly typed constants. + - CMU: Fixed bug where LFBE field in LFCLKSEL was not cleared before setting + bit-value. + - CMU: Fixed bug with CMU_ClockSelectGet. Did not give correct return value + for cmuClock_LFB. + - I2C: Fixed bug where I2C_Init would set divisor depending on the previous + master/slave configuration, not the one set in the initialization. + - I2C: Fixed issue in the function I2C_BusFreqSet (called by I2C_Init). The + input parameter 'I2C_ClockHLR_TypeDef type' was not in use. The fix enables + the parameter to add support for 'i2cClockHLRAsymetric' and 'i2cClockHLRFast' + modes. In order to use 'i2cClockHLRAsymetric' and 'i2cClockHLRFast' the + frequency of the HFPER clock may need to be increased. + - OPAMP: Fixed bug in the function OPAMP_Enable where an incorrect register + was used when setting the OPA2 calibration value. + - LEUART: Fixed issue in LEUART_BaudrateSet when a high clock frequency and a + low baudrate can overflow the clock divisor register (CLKDIV). The fix uses + an assert statement to check whether the calculated clock divisor is out of + range. + - USART: Fixed issue in USART_BaudrateAsyncSet when a high clock frequency and + a low baudrate can overflow the clock divisor register (CLKDIV). The fix uses + an assert statement to check whether the calculated clock divisor is out of + range. + +3.0.0: + - efm32lib renamed emlib, as it will include support for non-EFM32 devices + in the future + - Added CMSIS_V3 compatibility fixes, and use of CMSIS_V3 definitions + - See Device/Changes-EnergyMicro.txt for detailed path changes + - New prefixes of all files, efm32_<peripherqal>.c/h to em_<peripheral>.c/h + - New names for readme and changes files + - RMU - BUMODERST not masked away when EM4 bits has been set + - CMU - CMU_LFClkGet now accounts for ULFRCO bit for Tiny Gecko + +2.4.1: + - New, open source friendly license + - Fixed BURTC initialization hang if init->enable was false + - Fixed CMU issue with USBC and USB checks not being used correctly + - Added CMU feature, missing TIMER3 support + - Improved accuracy of SPI mode for USART baudrate calculation + - Corrected USBC HFCLKNODIV setting to comply with new header file defines + +2.4.0: + - Added efm32_version.h defining software version number + - Added BURTC support for Giant and Leopard Gecko + - Added RMU_ResetControl for BU reset flag + - Added some missing features to EMU for back up domain and EM4 support + - ADC TimebaseCalc(), Giant/Leopard Gecko have max 5 bits in TIMEBASE field + - Removed EMU Backup Power Domain threshold setings from EMU_BUPDInit, added + EMU_BUThresRangeSet() and EMU_BUThresholdSet() API calls. Threshold values + are factory calibrated and should not usually be overridden by the user. + +2.3.2: + - Added Tiny Gecko and Giant Gecko support in RMU for new reset causes + - CMU_ClockFreqGet will now report correct clock rates if HFLE is set (/4) + - Added Giant Gecko specific MSC_MassErase(), erase entire flash + - Added Giant Gecko specific MSC_BusStrategy (inline) function + - MSC_Init() will now configure TIMEBASE correctly according to AUXHFRCO clock + rate for Tiny Gecko and Giant Gecko + +2.3.0: + - USART - Added USART_InitPrsTrigger to initialize USART PRS triggered + transmissions. + - CMU - numerous updates, now supports full clock tree of Giant/Tiny Gecko + - CMU_ClockDivSet/Get will now use real dividend and not logarithmic values + as earlier. Prior enumerated values have been kept for backward compatibility. + - Added support for CMU HFLE and DIV4 factor for core clock for LE + peripherals + - Added support for alternate LCD segment animation range for Giant Gecko + - Fixed bug: Don't enable VCMP low power reference until after warm up, + allow biasprog value of 0 in VCMP_Init() + - Added support for ALTMAP (256MB address map) in EBI_BankAddress() + - TIMER_Init() will now reset CNT value + +2.2.2: + - Added DAC0 channel 0 and 1 to ACMP for Tiny and Giant devices + - Fixed bug in CMU for MSC WAITSTATE configuration, leading to too high wait + states depending on clock rate + - Fixed bug in CMU for UART1 clock enable + +2.2.1: + - UART_Reset() and LEUART_Reset() will now reset ROUTE register as well, this + will mean GPIO pins will not be driven after this call. Take care to ensure + that GPIO ROUTE register is configured after calls to *UART_Init*Sync + - Fixed problems with EFM_ASSERT when using UART in USART API + - Added Giant Gecko support for EBI (new modes and TFT direct drive) + - Added Giant Gecko support for CMU 2 WAIT STATES, and I2C1 + - Added Giant Gecko support for UART1 in CMU + - Added Giant Gecko support for DMA LOOP and 2D Copy operations + +2.1.0: + - EMU_Restore will now disable HFRCO if it was not enabled when entering + an Energy Mode + - Run time changes only applies to Gecko devices, filter out Tiny and Giant + for CHIP_Init(); + - Added const specificers to various initialization structures, to ensure + they can reside in flash instead of SRAM + - Bugfix in efm32_i2c.c, keep returning i2cTransferInProgress until done + +2.0.1: + - Changed enum OPAMP_PosSel_TypeDef. Enum value opaPosSelOpaIn changed from + DAC_OPA0MUX_POSSEL_OPA1IN to DAC_OPA0MUX_POSSEL_OPA0INP. + - Bugfix in efm32_lesense.h, LESENSE_ChClk_TypeDef now contains unshifted + values, fixed the implementation in efm32_lesense.c where the bug prevented + the sampleClk to be set to AUXHFRCO. + +2.0.0: + - USART_Init-functions now calls USART_Reset() which will also disable/reset + interrupt + - USART_BaudrateSyncSet() now asserts on invalid oversample configuration + - Added initialization of parity bit in LEUART_Init() + - Added Tiny Gecko support for CMU, ULFRCO, LESENSE clocks and continuous + calibration + - Added Tiny Gecko support for GPIO, EM4 pin retention and wake up support + - Added Tiny Gecko support for I2S, SPI auto TX mode on USART + - Added Tiny Gecko support for CACHE mesasurements for MSC module + - Added Tiny Gecko support for LCD module (with no HIGH segment registers) + - Added Tiny Gecko support for TIMER, PWM 2x, (DT lock not supported) + - Added Tiny Gecko support for LESENSE module + - Added Tiny Gecko support for PRS input in PCNT + - Added Tiny Gecko support for async signals in PRS, PRS_SourceAsyncSignalSet() + - Initial support for some Giant Gecko features, where overlapping with Tiny + - Removed LPFEN / LPFREQ support from DAC + - Fixed comments around interrupt functions, making it clear it is bitwise + logical or interrupt flags + - Fixed PCNT initialization for external clock configurations, making sure + config is synchronized at startup to 3 clocks. Note fix only works for + >revC EFM32G devices. + - Fixed efm32_cmu.c, EFM_ASSERT statement for LEUART clock div logic was + inverted + - Fixed ADC_InitScan, PRSSEL shift value corrected + - Fixed CMU_ClockFreqGet for devices that do not have I2C + - Fixed I2C_TransferInit for devices with more than one I2C-bus (Giant Gecko) + - Changed ACMP_Disable() implementation, now only disables the ACMP instance + by clearing the EN bit in the CTRL register + - Removed ACMP_DisableNoReset() function + - Fixed ACMP_Init(), removed automatic enabling, added new structure member + "enaReq" for ACMP_Init_TypeDef to control, fixed the EFM_ASSERT of the + biasprog parameter + - Added default configuration macro ACMP_INIT_DEFAULT for ACMP_Init_TypeDef + - Fixed ACMP_CapsenseInit(), removed automatic enabling, added new structure member + "enaReq" for ACMP_CapsenseInit_TypeDef to control, fixed the EFM_ASSERT of + the biasprog parameter + - Changed the name of the default configuration macro for + ACMP_CapsenseInit_TypeDef to ACMP_CAPSENSE_INIT_DEFAULT + - Added RTC_Reset and RTC_CounterReset functions for RTC + +1.3.0: + - MSC is automatically enabled/disabled when using the MSC API. This saves + power, and reduces errors due to not calling MSC_Init(). + - Added API for controlling Cortex-M3 MPU (memory protection unit) + - Adjusted bit fields to comply with latest CMSIS release, see EFM_CMSIS + changes file for details + - Fixed issue with bit mask clearing in ACMP + - Functions ACMP_Enable and ACMP_DisableNoReset added + - Added comment about rev.C chips in PCNT, CMD_LTOPBIM not neccessary any more + - Added missing instance validity asserts to peripherals (ACMP, LEUART, USART) + - Fixed UART0 check in CMU_ClockFreqGet() + - Fixed command sync for PCNT before setting TOPB value during init + - Fixed instance validity check macro in PCNT + - Fixed TIMER_Reset() removed write to unimplemented timer channel registers + - Fixed EFM_ASSERT statements in ACMP, VCMP + - General code style update: added missing curly braces, default cases, etc. + +1.2.1: + - Feature complete efm32lib, now also includes peripheral API for modules + AES,PCNT,MSC,ACMP,VCMP,LCD,EBI + - Fixed _TIMER_CC_CTRL_ICEDGE flags for correct timer configuration + - Fixed ADC calibration of Single and Scan mode of operation + - Added PCNT (ChipRev A/B PCNT0 errata NOT supported) and AES support + - Fixed conditional inclusion in efm32_emu.h + - Fixed code for LEUART0 for devices with multiple LEUARTs. + - Fixed incorrect setting of DOUT for GPIO configuration + +1.1.4 + - Fix for TIMER_INIT_DEFAULT + +1.1.3: + - Added ADC, DAC, LETIMER, PRS, TIMER (except DTI) support + - Added utility for fetching chip revision (efm32_system.c/h) + - Removed RTC instance ref in API, only one RTC will be supported + (Affects also define in efm32_cmu.h) + - Added default init struct macros for LEUART, USART + - Added msbf parameter in USART synchronous init struct, USART_InitSync_TypeDef. + - Updated reset for I2C, USART, LEUART to also reset IEN register. + - Corrected fault in GPIO_PortOutSet() + +1.1.2: + - Corrected minor issues in EMU, EM3 mode when restoring clocks + - Corrected RMU reset cause checking + - Changed GPIO enumerator symbols to start with gpio (from GPIO_) + - Changed CMU and WDOG enum typedefs to start with CMU_/WDOG_ (from cmu/wdog) + - Added USART/UART, LEUART, DMA, I2C support + +1.1.1: + - First version including support for CMU, DBG, EMU, GPIO, RTC, WDOG