Diff: targets/cmsis/TARGET_Freescale/TARGET_K22F/TOOLCHAIN_IAR/MK22F51212.icf

Revision:

121:7f86b4238bec

Parent:

0:9b334a45a8ff

Child:

144:ef7eb2e8f9f7

--- a/targets/cmsis/TARGET_Freescale/TARGET_K22F/TOOLCHAIN_IAR/MK22F51212.icf	Fri Apr 29 16:15:10 2016 +0100
+++ b/targets/cmsis/TARGET_Freescale/TARGET_K22F/TOOLCHAIN_IAR/MK22F51212.icf	Tue May 03 00:15:16 2016 +0100
@@ -1,43 +1,119 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x00000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0007ffff;
-define symbol __ICFEDIT_region_NVIC_start__   = 0x1fff0000;
-define symbol __ICFEDIT_region_NVIC_end__   = 0x1fff03ff;
-define symbol __ICFEDIT_region_RAM_start__ = 0x1fff0400;
-define symbol __ICFEDIT_region_RAM_end__   = 0x1fffffff;
-/*-Sizes-*/
-/*Heap 1/4 of ram and stack 1/8*/
-define symbol __ICFEDIT_size_cstack__ = 0x4000;
-define symbol __ICFEDIT_size_heap__   = 0x8000;
-/**** End of ICF editor section. ###ICF###*/
+/*
+** ###################################################################
+**     Processors:          MK22FN512CAP12
+**                          MK22FN512VDC12
+**                          MK22FN512VLH12
+**                          MK22FN512VLL12
+**                          MK22FN512VMP12
+**
+**     Compiler:            IAR ANSI C/C++ Compiler for ARM
+**     Reference manual:    K22P121M120SF7RM, Rev. 1, March 24, 2014
+**     Version:             rev. 2.8, 2015-02-19
+**     Build:               b151009
+**
+**     Abstract:
+**         Linker file for the IAR ANSI C/C++ Compiler for ARM
+**
+**     Copyright (c) 2015 Freescale Semiconductor, Inc.
+**     All rights reserved.
+**
+**     Redistribution and use in source and binary forms, with or without modification,
+**     are permitted provided that the following conditions are met:
+**
+**     o Redistributions of source code must retain the above copyright notice, this list
+**       of conditions and the following disclaimer.
+**
+**     o Redistributions in binary form must reproduce the above copyright notice, this
+**       list of conditions and the following disclaimer in the documentation and/or
+**       other materials provided with the distribution.
+**
+**     o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+**       contributors may be used to endorse or promote products derived from this
+**       software without specific prior written permission.
+**
+**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+**     http:                 www.freescale.com
+**     mail:                 support@freescale.com
+**
+** ###################################################################
+*/
+define symbol __ram_vector_table__ = 1;
 
-define symbol __region_RAM2_start__ = 0x20000000;
-define symbol __region_RAM2_end__ 	= 0x2000ffff;
+/* Heap 1/4 of ram and stack 1/8 */
+define symbol __stack_size__=0x4000;
+define symbol __heap_size__=0x8000;
+
+define symbol __ram_vector_table_size__ =  isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0;
+define symbol __ram_vector_table_offset__ =  isdefinedsymbol(__ram_vector_table__) ? 0x000003FF : 0;
+
+define symbol m_interrupts_start       = 0x00000000;
+define symbol m_interrupts_end         = 0x000003FF;
+
+define symbol m_flash_config_start     = 0x00000400;
+define symbol m_flash_config_end       = 0x0000040F;
+
+define symbol m_text_start             = 0x00000410;
+define symbol m_text_end               = 0x0007FFFF;
+
+define symbol m_interrupts_ram_start   = 0x1FFF0000;
+define symbol m_interrupts_ram_end     = 0x1FFF0000 + __ram_vector_table_offset__;
 
-define symbol __FlashConfig_start__	= 0x00000400;
-define symbol __FlashConfig_end__  	= 0x0000040f;
+define symbol m_data_start             = m_interrupts_ram_start + __ram_vector_table_size__;
+define symbol m_data_end               = 0x1FFFFFFF;
+
+define symbol m_data_2_start           = 0x20000000;
+define symbol m_data_2_end             = 0x2000FFFF;
+
+/* Sizes */
+if (isdefinedsymbol(__stack_size__)) {
+  define symbol __size_cstack__        = __stack_size__;
+} else {
+  define symbol __size_cstack__        = 0x0400;
+}
+
+if (isdefinedsymbol(__heap_size__)) {
+  define symbol __size_heap__          = __heap_size__;
+} else {
+  define symbol __size_heap__          = 0x0400;
+}
+
+define exported symbol __VECTOR_TABLE  = m_interrupts_start;
+define exported symbol __VECTOR_RAM    = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start;
+define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
 
 define memory mem with size = 4G;
-define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1)  to __ICFEDIT_region_ROM_end__];
-define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
+define region m_flash_config_region = mem:[from m_flash_config_start to m_flash_config_end];
+define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
+                          | mem:[from m_text_start to m_text_end];
+define region DATA_region = mem:[from m_data_start to m_data_end]
+                          | mem:[from m_data_2_start to m_data_2_end-__size_cstack__];
+define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data_2_end];
+define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
 
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+define block RW        { readwrite };
+define block ZI        { zi };
 
-define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__];
-
-initialize by copy { readwrite };
+initialize by copy { readwrite, section .textrw };
 do not initialize  { section .noinit };
 
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in FlashConfig_region {section FlashConfig};
+place at address mem: m_interrupts_start    { readonly section .intvec };
+place in m_flash_config_region              { section FlashConfig };
+place in TEXT_region                        { readonly };
+place in DATA_region                        { block RW };
+place in DATA_region                        { block ZI };
+place in DATA_region                        { last block HEAP };
+place in CSTACK_region                      { block CSTACK };
+place in m_interrupts_ram_region            { section m_interrupts_ram };
 
-place in ROM_region   { readonly };
-
-place in RAM_region   { readwrite, block HEAP, block CSTACK };