added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_gpio.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 50:a417edff4437
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file em_gpio.c |
<> | 144:ef7eb2e8f9f7 | 3 | * @brief General Purpose IO (GPIO) peripheral API |
<> | 144:ef7eb2e8f9f7 | 4 | * devices. |
<> | 144:ef7eb2e8f9f7 | 5 | * @version 4.2.1 |
<> | 144:ef7eb2e8f9f7 | 6 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 7 | * @section License |
<> | 144:ef7eb2e8f9f7 | 8 | * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b> |
<> | 144:ef7eb2e8f9f7 | 9 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * Permission is granted to anyone to use this software for any purpose, |
<> | 144:ef7eb2e8f9f7 | 12 | * including commercial applications, and to alter it and redistribute it |
<> | 144:ef7eb2e8f9f7 | 13 | * freely, subject to the following restrictions: |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. The origin of this software must not be misrepresented; you must not |
<> | 144:ef7eb2e8f9f7 | 16 | * claim that you wrote the original software. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Altered source versions must be plainly marked as such, and must not be |
<> | 144:ef7eb2e8f9f7 | 18 | * misrepresented as being the original software. |
<> | 144:ef7eb2e8f9f7 | 19 | * 3. This notice may not be removed or altered from any source distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * |
<> | 144:ef7eb2e8f9f7 | 21 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no |
<> | 144:ef7eb2e8f9f7 | 22 | * obligation to support this Software. Silicon Labs is providing the |
<> | 144:ef7eb2e8f9f7 | 23 | * Software "AS IS", with no express or implied warranties of any kind, |
<> | 144:ef7eb2e8f9f7 | 24 | * including, but not limited to, any implied warranties of merchantability |
<> | 144:ef7eb2e8f9f7 | 25 | * or fitness for any particular purpose or warranties against infringement |
<> | 144:ef7eb2e8f9f7 | 26 | * of any proprietary rights of a third party. |
<> | 144:ef7eb2e8f9f7 | 27 | * |
<> | 144:ef7eb2e8f9f7 | 28 | * Silicon Labs will not be liable for any consequential, incidental, or |
<> | 144:ef7eb2e8f9f7 | 29 | * special damages, or any other relief, or for any claim by any third party, |
<> | 144:ef7eb2e8f9f7 | 30 | * arising from your use of this Software. |
<> | 144:ef7eb2e8f9f7 | 31 | * |
<> | 144:ef7eb2e8f9f7 | 32 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | #include "em_gpio.h" |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | #if defined(GPIO_COUNT) && (GPIO_COUNT > 0) |
<> | 144:ef7eb2e8f9f7 | 38 | |
<> | 144:ef7eb2e8f9f7 | 39 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 40 | * @addtogroup EM_Library |
<> | 144:ef7eb2e8f9f7 | 41 | * @{ |
<> | 144:ef7eb2e8f9f7 | 42 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 43 | |
<> | 144:ef7eb2e8f9f7 | 44 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 45 | * @addtogroup GPIO |
<> | 144:ef7eb2e8f9f7 | 46 | * @brief General Purpose Input/Output (GPIO) API |
<> | 144:ef7eb2e8f9f7 | 47 | * @{ |
<> | 144:ef7eb2e8f9f7 | 48 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 49 | |
<> | 144:ef7eb2e8f9f7 | 50 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 51 | ******************************* DEFINES *********************************** |
<> | 144:ef7eb2e8f9f7 | 52 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | /** Validation of pin typically usable in assert statements. */ |
<> | 144:ef7eb2e8f9f7 | 57 | #define GPIO_DRIVEMODE_VALID(mode) ((mode) <= 3) |
<> | 144:ef7eb2e8f9f7 | 58 | #define GPIO_STRENGHT_VALID(strenght) (!((strenght) & \ |
<> | 144:ef7eb2e8f9f7 | 59 | ~(_GPIO_P_CTRL_DRIVESTRENGTH_MASK \ |
<> | 144:ef7eb2e8f9f7 | 60 | | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK))) |
<> | 144:ef7eb2e8f9f7 | 61 | /** @endcond */ |
<> | 144:ef7eb2e8f9f7 | 62 | |
<> | 144:ef7eb2e8f9f7 | 63 | |
<> | 144:ef7eb2e8f9f7 | 64 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 65 | ************************** GLOBAL FUNCTIONS ******************************* |
<> | 144:ef7eb2e8f9f7 | 66 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 67 | |
<> | 144:ef7eb2e8f9f7 | 68 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 69 | * @brief |
<> | 144:ef7eb2e8f9f7 | 70 | * Sets the pin location of the debug pins (Serial Wire interface). |
<> | 144:ef7eb2e8f9f7 | 71 | * |
<> | 144:ef7eb2e8f9f7 | 72 | * @note |
<> | 144:ef7eb2e8f9f7 | 73 | * Changing the pins used for debugging uncontrolled, may result in a lockout. |
<> | 144:ef7eb2e8f9f7 | 74 | * |
<> | 144:ef7eb2e8f9f7 | 75 | * @param[in] location |
<> | 144:ef7eb2e8f9f7 | 76 | * The debug pin location to use (0-3). |
<> | 144:ef7eb2e8f9f7 | 77 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 78 | void GPIO_DbgLocationSet(unsigned int location) |
<> | 144:ef7eb2e8f9f7 | 79 | { |
<> | 144:ef7eb2e8f9f7 | 80 | #if defined ( _GPIO_ROUTE_SWLOCATION_MASK ) |
<> | 144:ef7eb2e8f9f7 | 81 | EFM_ASSERT(location < AFCHANLOC_MAX); |
<> | 144:ef7eb2e8f9f7 | 82 | |
<> | 144:ef7eb2e8f9f7 | 83 | GPIO->ROUTE = (GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK) | |
<> | 144:ef7eb2e8f9f7 | 84 | (location << _GPIO_ROUTE_SWLOCATION_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 85 | #else |
<> | 144:ef7eb2e8f9f7 | 86 | (void)location; |
<> | 144:ef7eb2e8f9f7 | 87 | #endif |
<> | 144:ef7eb2e8f9f7 | 88 | } |
<> | 144:ef7eb2e8f9f7 | 89 | |
<> | 144:ef7eb2e8f9f7 | 90 | #if defined (_GPIO_P_CTRL_DRIVEMODE_MASK) |
<> | 144:ef7eb2e8f9f7 | 91 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 92 | * @brief |
<> | 144:ef7eb2e8f9f7 | 93 | * Sets the drive mode for a GPIO port. |
<> | 144:ef7eb2e8f9f7 | 94 | * |
<> | 144:ef7eb2e8f9f7 | 95 | * @param[in] port |
<> | 144:ef7eb2e8f9f7 | 96 | * The GPIO port to access. |
<> | 144:ef7eb2e8f9f7 | 97 | * |
<> | 144:ef7eb2e8f9f7 | 98 | * @param[in] mode |
<> | 144:ef7eb2e8f9f7 | 99 | * Drive mode to use for port. |
<> | 144:ef7eb2e8f9f7 | 100 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 101 | void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode) |
<> | 144:ef7eb2e8f9f7 | 102 | { |
<> | 144:ef7eb2e8f9f7 | 103 | EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_DRIVEMODE_VALID(mode)); |
<> | 144:ef7eb2e8f9f7 | 104 | |
<> | 144:ef7eb2e8f9f7 | 105 | GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK)) |
<> | 144:ef7eb2e8f9f7 | 106 | | (mode << _GPIO_P_CTRL_DRIVEMODE_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 107 | } |
<> | 144:ef7eb2e8f9f7 | 108 | #endif |
<> | 144:ef7eb2e8f9f7 | 109 | |
<> | 144:ef7eb2e8f9f7 | 110 | |
<> | 144:ef7eb2e8f9f7 | 111 | #if defined (_GPIO_P_CTRL_DRIVESTRENGTH_MASK) |
<> | 144:ef7eb2e8f9f7 | 112 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 113 | * @brief |
<> | 144:ef7eb2e8f9f7 | 114 | * Sets the drive strength for a GPIO port. |
<> | 144:ef7eb2e8f9f7 | 115 | * |
<> | 144:ef7eb2e8f9f7 | 116 | * @param[in] port |
<> | 144:ef7eb2e8f9f7 | 117 | * The GPIO port to access. |
<> | 144:ef7eb2e8f9f7 | 118 | * |
<> | 144:ef7eb2e8f9f7 | 119 | * @param[in] strength |
<> | 144:ef7eb2e8f9f7 | 120 | * Drive strength to use for port. |
<> | 144:ef7eb2e8f9f7 | 121 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 122 | void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port, |
<> | 144:ef7eb2e8f9f7 | 123 | GPIO_DriveStrength_TypeDef strength) |
<> | 144:ef7eb2e8f9f7 | 124 | { |
<> | 144:ef7eb2e8f9f7 | 125 | EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_STRENGHT_VALID(strength)); |
<> | 144:ef7eb2e8f9f7 | 126 | BUS_RegMaskedWrite(&GPIO->P[port].CTRL, |
<> | 144:ef7eb2e8f9f7 | 127 | _GPIO_P_CTRL_DRIVESTRENGTH_MASK | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK, |
<> | 144:ef7eb2e8f9f7 | 128 | strength); |
<> | 144:ef7eb2e8f9f7 | 129 | } |
<> | 144:ef7eb2e8f9f7 | 130 | #endif |
<> | 144:ef7eb2e8f9f7 | 131 | |
<> | 144:ef7eb2e8f9f7 | 132 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 133 | * @brief |
<> | 144:ef7eb2e8f9f7 | 134 | * Configure GPIO interrupt. |
<> | 144:ef7eb2e8f9f7 | 135 | * |
<> | 144:ef7eb2e8f9f7 | 136 | * @details |
<> | 144:ef7eb2e8f9f7 | 137 | * If reconfiguring a GPIO interrupt that is already enabled, it is generally |
<> | 144:ef7eb2e8f9f7 | 138 | * recommended to disable it first, see GPIO_Disable(). |
<> | 144:ef7eb2e8f9f7 | 139 | * |
<> | 144:ef7eb2e8f9f7 | 140 | * The actual GPIO interrupt handler must be in place before enabling the |
<> | 144:ef7eb2e8f9f7 | 141 | * interrupt. |
<> | 144:ef7eb2e8f9f7 | 142 | * |
<> | 144:ef7eb2e8f9f7 | 143 | * Notice that any pending interrupt for the selected pin is cleared by this |
<> | 144:ef7eb2e8f9f7 | 144 | * function. |
<> | 144:ef7eb2e8f9f7 | 145 | * |
<> | 144:ef7eb2e8f9f7 | 146 | * @note |
<> | 144:ef7eb2e8f9f7 | 147 | * A certain pin number can only be associated with one port. Ie, if GPIO |
<> | 144:ef7eb2e8f9f7 | 148 | * interrupt 1 is assigned to port A/pin 1, then it is not possibly to use |
<> | 144:ef7eb2e8f9f7 | 149 | * pin 1 from any other ports for interrupts. Please refer to the reference |
<> | 144:ef7eb2e8f9f7 | 150 | * manual. |
<> | 144:ef7eb2e8f9f7 | 151 | * |
<> | 144:ef7eb2e8f9f7 | 152 | * @param[in] port |
<> | 144:ef7eb2e8f9f7 | 153 | * The port to associate with @p pin. |
<> | 144:ef7eb2e8f9f7 | 154 | * |
<> | 144:ef7eb2e8f9f7 | 155 | * @param[in] pin |
<> | 144:ef7eb2e8f9f7 | 156 | * The GPIO interrupt number (= port pin). |
<> | 144:ef7eb2e8f9f7 | 157 | * |
<> | 144:ef7eb2e8f9f7 | 158 | * @param[in] risingEdge |
<> | 144:ef7eb2e8f9f7 | 159 | * Set to true if interrupts shall be enabled on rising edge, otherwise false. |
<> | 144:ef7eb2e8f9f7 | 160 | * |
<> | 144:ef7eb2e8f9f7 | 161 | * @param[in] fallingEdge |
<> | 144:ef7eb2e8f9f7 | 162 | * Set to true if interrupts shall be enabled on falling edge, otherwise false. |
<> | 144:ef7eb2e8f9f7 | 163 | * |
<> | 144:ef7eb2e8f9f7 | 164 | * @param[in] enable |
<> | 144:ef7eb2e8f9f7 | 165 | * Set to true if interrupt shall be enabled after configuration completed, |
<> | 144:ef7eb2e8f9f7 | 166 | * false to leave disabled. See GPIO_IntDisable() and GPIO_IntEnable(). |
<> | 144:ef7eb2e8f9f7 | 167 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 168 | void GPIO_IntConfig(GPIO_Port_TypeDef port, |
<> | 144:ef7eb2e8f9f7 | 169 | unsigned int pin, |
<> | 144:ef7eb2e8f9f7 | 170 | bool risingEdge, |
<> | 144:ef7eb2e8f9f7 | 171 | bool fallingEdge, |
<> | 144:ef7eb2e8f9f7 | 172 | bool enable) |
<> | 144:ef7eb2e8f9f7 | 173 | { |
<> | 144:ef7eb2e8f9f7 | 174 | uint32_t tmp; |
<> | 144:ef7eb2e8f9f7 | 175 | |
<> | 144:ef7eb2e8f9f7 | 176 | EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); |
<> | 144:ef7eb2e8f9f7 | 177 | |
<> | 144:ef7eb2e8f9f7 | 178 | /* There are two registers controlling the interrupt configuration: |
<> | 144:ef7eb2e8f9f7 | 179 | * The EXTIPSELL register controls pins 0-7 and EXTIPSELH controls |
<> | 144:ef7eb2e8f9f7 | 180 | * pins 8-15. */ |
<> | 144:ef7eb2e8f9f7 | 181 | if (pin < 8) |
<> | 144:ef7eb2e8f9f7 | 182 | { |
<> | 144:ef7eb2e8f9f7 | 183 | BUS_RegMaskedWrite(&GPIO->EXTIPSELL, |
<> | 144:ef7eb2e8f9f7 | 184 | 0xF << (4 * pin), |
<> | 144:ef7eb2e8f9f7 | 185 | port << (4 * pin)); |
<> | 144:ef7eb2e8f9f7 | 186 | } |
<> | 144:ef7eb2e8f9f7 | 187 | else |
<> | 144:ef7eb2e8f9f7 | 188 | { |
<> | 144:ef7eb2e8f9f7 | 189 | tmp = pin - 8; |
<> | 144:ef7eb2e8f9f7 | 190 | BUS_RegMaskedWrite(&GPIO->EXTIPSELH, |
<> | 144:ef7eb2e8f9f7 | 191 | 0xF << (4 * tmp), |
<> | 144:ef7eb2e8f9f7 | 192 | port << (4 * tmp)); |
<> | 144:ef7eb2e8f9f7 | 193 | } |
<> | 144:ef7eb2e8f9f7 | 194 | |
<> | 144:ef7eb2e8f9f7 | 195 | /* Enable/disable rising edge */ |
<> | 144:ef7eb2e8f9f7 | 196 | BUS_RegBitWrite(&(GPIO->EXTIRISE), pin, risingEdge); |
<> | 144:ef7eb2e8f9f7 | 197 | |
<> | 144:ef7eb2e8f9f7 | 198 | /* Enable/disable falling edge */ |
<> | 144:ef7eb2e8f9f7 | 199 | BUS_RegBitWrite(&(GPIO->EXTIFALL), pin, fallingEdge); |
<> | 144:ef7eb2e8f9f7 | 200 | |
<> | 144:ef7eb2e8f9f7 | 201 | /* Clear any pending interrupt */ |
<> | 144:ef7eb2e8f9f7 | 202 | GPIO->IFC = 1 << pin; |
<> | 144:ef7eb2e8f9f7 | 203 | |
<> | 144:ef7eb2e8f9f7 | 204 | /* Finally enable/disable interrupt */ |
<> | 144:ef7eb2e8f9f7 | 205 | BUS_RegBitWrite(&(GPIO->IEN), pin, enable); |
<> | 144:ef7eb2e8f9f7 | 206 | } |
<> | 144:ef7eb2e8f9f7 | 207 | |
<> | 144:ef7eb2e8f9f7 | 208 | |
<> | 144:ef7eb2e8f9f7 | 209 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 210 | * @brief |
<> | 144:ef7eb2e8f9f7 | 211 | * Set the mode for a GPIO pin. |
<> | 144:ef7eb2e8f9f7 | 212 | * |
<> | 144:ef7eb2e8f9f7 | 213 | * @param[in] port |
<> | 144:ef7eb2e8f9f7 | 214 | * The GPIO port to access. |
<> | 144:ef7eb2e8f9f7 | 215 | * |
<> | 144:ef7eb2e8f9f7 | 216 | * @param[in] pin |
<> | 144:ef7eb2e8f9f7 | 217 | * The pin number in the port. |
<> | 144:ef7eb2e8f9f7 | 218 | * |
<> | 144:ef7eb2e8f9f7 | 219 | * @param[in] mode |
<> | 144:ef7eb2e8f9f7 | 220 | * The desired pin mode. |
<> | 144:ef7eb2e8f9f7 | 221 | * |
<> | 144:ef7eb2e8f9f7 | 222 | * @param[in] out |
<> | 144:ef7eb2e8f9f7 | 223 | * Value to set for pin in DOUT register. The DOUT setting is important for |
<> | 144:ef7eb2e8f9f7 | 224 | * even some input mode configurations, determining pull-up/down direction. |
<> | 144:ef7eb2e8f9f7 | 225 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 226 | void GPIO_PinModeSet(GPIO_Port_TypeDef port, |
<> | 144:ef7eb2e8f9f7 | 227 | unsigned int pin, |
<> | 144:ef7eb2e8f9f7 | 228 | GPIO_Mode_TypeDef mode, |
<> | 144:ef7eb2e8f9f7 | 229 | unsigned int out) |
<> | 144:ef7eb2e8f9f7 | 230 | { |
<> | 144:ef7eb2e8f9f7 | 231 | EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); |
<> | 144:ef7eb2e8f9f7 | 232 | |
<> | 144:ef7eb2e8f9f7 | 233 | /* If disabling pin, do not modify DOUT in order to reduce chance for */ |
<> | 144:ef7eb2e8f9f7 | 234 | /* glitch/spike (may not be sufficient precaution in all use cases) */ |
<> | 144:ef7eb2e8f9f7 | 235 | if (mode != gpioModeDisabled) |
<> | 144:ef7eb2e8f9f7 | 236 | { |
<> | 144:ef7eb2e8f9f7 | 237 | if (out) |
<> | 144:ef7eb2e8f9f7 | 238 | { |
<> | 144:ef7eb2e8f9f7 | 239 | GPIO_PinOutSet(port, pin); |
<> | 144:ef7eb2e8f9f7 | 240 | } |
<> | 144:ef7eb2e8f9f7 | 241 | else |
<> | 144:ef7eb2e8f9f7 | 242 | { |
<> | 144:ef7eb2e8f9f7 | 243 | GPIO_PinOutClear(port, pin); |
<> | 144:ef7eb2e8f9f7 | 244 | } |
<> | 144:ef7eb2e8f9f7 | 245 | } |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | /* There are two registers controlling the pins for each port. The MODEL |
<> | 144:ef7eb2e8f9f7 | 248 | * register controls pins 0-7 and MODEH controls pins 8-15. */ |
<> | 144:ef7eb2e8f9f7 | 249 | if (pin < 8) |
<> | 144:ef7eb2e8f9f7 | 250 | { |
<> | 144:ef7eb2e8f9f7 | 251 | BUS_RegMaskedWrite(&GPIO->P[port].MODEL, |
<> | 144:ef7eb2e8f9f7 | 252 | 0xF << (pin * 4), |
<> | 144:ef7eb2e8f9f7 | 253 | mode << (pin * 4)); |
<> | 144:ef7eb2e8f9f7 | 254 | } |
<> | 144:ef7eb2e8f9f7 | 255 | else |
<> | 144:ef7eb2e8f9f7 | 256 | { |
<> | 144:ef7eb2e8f9f7 | 257 | BUS_RegMaskedWrite(&GPIO->P[port].MODEH, |
<> | 144:ef7eb2e8f9f7 | 258 | 0xF << ((pin - 8) * 4), |
<> | 144:ef7eb2e8f9f7 | 259 | mode << ((pin - 8) * 4)); |
<> | 144:ef7eb2e8f9f7 | 260 | } |
<> | 144:ef7eb2e8f9f7 | 261 | |
<> | 144:ef7eb2e8f9f7 | 262 | if (mode == gpioModeDisabled) |
<> | 144:ef7eb2e8f9f7 | 263 | { |
<> | 144:ef7eb2e8f9f7 | 264 | if (out) |
<> | 144:ef7eb2e8f9f7 | 265 | { |
<> | 144:ef7eb2e8f9f7 | 266 | GPIO_PinOutSet(port, pin); |
<> | 144:ef7eb2e8f9f7 | 267 | } |
<> | 144:ef7eb2e8f9f7 | 268 | else |
<> | 144:ef7eb2e8f9f7 | 269 | { |
<> | 144:ef7eb2e8f9f7 | 270 | GPIO_PinOutClear(port, pin); |
<> | 144:ef7eb2e8f9f7 | 271 | } |
<> | 144:ef7eb2e8f9f7 | 272 | } |
<> | 144:ef7eb2e8f9f7 | 273 | } |
<> | 144:ef7eb2e8f9f7 | 274 | |
<> | 144:ef7eb2e8f9f7 | 275 | #if defined( _GPIO_EM4WUEN_MASK ) |
<> | 144:ef7eb2e8f9f7 | 276 | /**************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 277 | * @brief |
<> | 144:ef7eb2e8f9f7 | 278 | * Enable GPIO pin wake-up from EM4. When the function exits, |
<> | 144:ef7eb2e8f9f7 | 279 | * EM4 mode can be safely entered. |
<> | 144:ef7eb2e8f9f7 | 280 | * |
<> | 144:ef7eb2e8f9f7 | 281 | * @note |
<> | 144:ef7eb2e8f9f7 | 282 | * It is assumed that the GPIO pin modes are set correctly. |
<> | 144:ef7eb2e8f9f7 | 283 | * Valid modes are @ref gpioModeInput and @ref gpioModeInputPull. |
<> | 144:ef7eb2e8f9f7 | 284 | * |
<> | 144:ef7eb2e8f9f7 | 285 | * @param[in] pinmask |
<> | 144:ef7eb2e8f9f7 | 286 | * Bitmask containing the bitwise logic OR of which GPIO pin(s) to enable. |
<> | 144:ef7eb2e8f9f7 | 287 | * Refer to Reference Manuals for pinmask to GPIO port/pin mapping. |
<> | 144:ef7eb2e8f9f7 | 288 | * @param[in] polaritymask |
<> | 144:ef7eb2e8f9f7 | 289 | * Bitmask containing the bitwise logic OR of GPIO pin(s) wake-up polarity. |
<> | 144:ef7eb2e8f9f7 | 290 | * Refer to Reference Manuals for pinmask to GPIO port/pin mapping. |
<> | 144:ef7eb2e8f9f7 | 291 | *****************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 292 | void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask) |
<> | 144:ef7eb2e8f9f7 | 293 | { |
<> | 144:ef7eb2e8f9f7 | 294 | EFM_ASSERT((pinmask & ~_GPIO_EM4WUEN_MASK) == 0); |
<> | 144:ef7eb2e8f9f7 | 295 | |
<> | 144:ef7eb2e8f9f7 | 296 | #if defined( _GPIO_EM4WUPOL_MASK ) |
<> | 144:ef7eb2e8f9f7 | 297 | EFM_ASSERT((polaritymask & ~_GPIO_EM4WUPOL_MASK) == 0); |
<> | 144:ef7eb2e8f9f7 | 298 | GPIO->EM4WUPOL &= ~pinmask; /* Set wakeup polarity */ |
<> | 144:ef7eb2e8f9f7 | 299 | GPIO->EM4WUPOL |= pinmask & polaritymask; |
<> | 144:ef7eb2e8f9f7 | 300 | #elif defined( _GPIO_EXTILEVEL_MASK ) |
<> | 144:ef7eb2e8f9f7 | 301 | EFM_ASSERT((polaritymask & ~_GPIO_EXTILEVEL_MASK) == 0); |
<> | 144:ef7eb2e8f9f7 | 302 | GPIO->EXTILEVEL &= ~pinmask; |
<> | 144:ef7eb2e8f9f7 | 303 | GPIO->EXTILEVEL |= pinmask & polaritymask; |
<> | 144:ef7eb2e8f9f7 | 304 | #endif |
<> | 144:ef7eb2e8f9f7 | 305 | GPIO->EM4WUEN |= pinmask; /* Enable wakeup */ |
<> | 144:ef7eb2e8f9f7 | 306 | |
<> | 144:ef7eb2e8f9f7 | 307 | GPIO_EM4SetPinRetention(true); /* Enable pin retention */ |
<> | 144:ef7eb2e8f9f7 | 308 | |
<> | 144:ef7eb2e8f9f7 | 309 | #if defined( _GPIO_CMD_EM4WUCLR_MASK ) |
<> | 144:ef7eb2e8f9f7 | 310 | GPIO->CMD = GPIO_CMD_EM4WUCLR; /* Clear wake-up logic */ |
<> | 144:ef7eb2e8f9f7 | 311 | #elif defined( _GPIO_IFC_EM4WU_MASK ) |
<> | 144:ef7eb2e8f9f7 | 312 | GPIO_IntClear(pinmask); |
<> | 144:ef7eb2e8f9f7 | 313 | #endif |
<> | 144:ef7eb2e8f9f7 | 314 | } |
<> | 144:ef7eb2e8f9f7 | 315 | #endif |
<> | 144:ef7eb2e8f9f7 | 316 | |
<> | 144:ef7eb2e8f9f7 | 317 | /** @} (end addtogroup GPIO) */ |
<> | 144:ef7eb2e8f9f7 | 318 | /** @} (end addtogroup EM_Library) */ |
<> | 144:ef7eb2e8f9f7 | 319 | |
<> | 144:ef7eb2e8f9f7 | 320 | #endif /* defined(GPIO_COUNT) && (GPIO_COUNT > 0) */ |