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targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_lesense.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
50:a417edff4437 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file em_lesense.h
<> 144:ef7eb2e8f9f7 3 * @brief Low Energy Sensor (LESENSE) peripheral API
<> 144:ef7eb2e8f9f7 4 * @version 4.2.1
<> 144:ef7eb2e8f9f7 5 *******************************************************************************
<> 144:ef7eb2e8f9f7 6 * @section License
<> 144:ef7eb2e8f9f7 7 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 8 *******************************************************************************
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Permission is granted to anyone to use this software for any purpose,
<> 144:ef7eb2e8f9f7 11 * including commercial applications, and to alter it and redistribute it
<> 144:ef7eb2e8f9f7 12 * freely, subject to the following restrictions:
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * 1. The origin of this software must not be misrepresented; you must not
<> 144:ef7eb2e8f9f7 15 * claim that you wrote the original software.
<> 144:ef7eb2e8f9f7 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 144:ef7eb2e8f9f7 17 * misrepresented as being the original software.
<> 144:ef7eb2e8f9f7 18 * 3. This notice may not be removed or altered from any source distribution.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
<> 144:ef7eb2e8f9f7 21 * obligation to support this Software. Silicon Labs is providing the
<> 144:ef7eb2e8f9f7 22 * Software "AS IS", with no express or implied warranties of any kind,
<> 144:ef7eb2e8f9f7 23 * including, but not limited to, any implied warranties of merchantability
<> 144:ef7eb2e8f9f7 24 * or fitness for any particular purpose or warranties against infringement
<> 144:ef7eb2e8f9f7 25 * of any proprietary rights of a third party.
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * Silicon Labs will not be liable for any consequential, incidental, or
<> 144:ef7eb2e8f9f7 28 * special damages, or any other relief, or for any claim by any third party,
<> 144:ef7eb2e8f9f7 29 * arising from your use of this Software.
<> 144:ef7eb2e8f9f7 30 *
<> 144:ef7eb2e8f9f7 31 ******************************************************************************/
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #ifndef __SILICON_LABS_EM_LESENSE_H__
<> 144:ef7eb2e8f9f7 34 #define __SILICON_LABS_EM_LESENSE_H__
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 #include "em_device.h"
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 #if defined(LESENSE_COUNT) && (LESENSE_COUNT > 0)
<> 144:ef7eb2e8f9f7 39 #include <stdint.h>
<> 144:ef7eb2e8f9f7 40 #include <stdbool.h>
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 48 * @addtogroup EM_Library
<> 144:ef7eb2e8f9f7 49 * @{
<> 144:ef7eb2e8f9f7 50 ******************************************************************************/
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 53 * @addtogroup LESENSE
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 ******************************************************************************/
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /** @endcond */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /*******************************************************************************
<> 144:ef7eb2e8f9f7 64 ******************************** ENUMS ************************************
<> 144:ef7eb2e8f9f7 65 ******************************************************************************/
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /** Clock divisors for controlling the prescaling factor of the period
<> 144:ef7eb2e8f9f7 68 * counter.
<> 144:ef7eb2e8f9f7 69 * Note: these enumeration values are being used for different clock division
<> 144:ef7eb2e8f9f7 70 * related configuration parameters (hfPresc, lfPresc, pcPresc). */
<> 144:ef7eb2e8f9f7 71 typedef enum
<> 144:ef7eb2e8f9f7 72 {
<> 144:ef7eb2e8f9f7 73 lesenseClkDiv_1 = 0, /**< Divide clock by 1. */
<> 144:ef7eb2e8f9f7 74 lesenseClkDiv_2 = 1, /**< Divide clock by 2. */
<> 144:ef7eb2e8f9f7 75 lesenseClkDiv_4 = 2, /**< Divide clock by 4. */
<> 144:ef7eb2e8f9f7 76 lesenseClkDiv_8 = 3, /**< Divide clock by 8. */
<> 144:ef7eb2e8f9f7 77 lesenseClkDiv_16 = 4, /**< Divide clock by 16. */
<> 144:ef7eb2e8f9f7 78 lesenseClkDiv_32 = 5, /**< Divide clock by 32. */
<> 144:ef7eb2e8f9f7 79 lesenseClkDiv_64 = 6, /**< Divide clock by 64. */
<> 144:ef7eb2e8f9f7 80 lesenseClkDiv_128 = 7 /**< Divide clock by 128. */
<> 144:ef7eb2e8f9f7 81 } LESENSE_ClkPresc_TypeDef;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /** Scan modes. */
<> 144:ef7eb2e8f9f7 85 typedef enum
<> 144:ef7eb2e8f9f7 86 {
<> 144:ef7eb2e8f9f7 87 /** New scan is started each time the period counter overflows. */
<> 144:ef7eb2e8f9f7 88 lesenseScanStartPeriodic = LESENSE_CTRL_SCANMODE_PERIODIC,
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 /** Single scan is performed when LESENSE_ScanStart() is called. */
<> 144:ef7eb2e8f9f7 91 lesenseScanStartOneShot = LESENSE_CTRL_SCANMODE_ONESHOT,
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /** New scan is triggered by pulse on PRS channel. */
<> 144:ef7eb2e8f9f7 94 lesenseScanStartPRS = LESENSE_CTRL_SCANMODE_PRS
<> 144:ef7eb2e8f9f7 95 } LESENSE_ScanMode_TypeDef;
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 /** PRS sources.
<> 144:ef7eb2e8f9f7 99 * Note: these enumeration values are being used for different PRS related
<> 144:ef7eb2e8f9f7 100 * configuration parameters. */
<> 144:ef7eb2e8f9f7 101 typedef enum
<> 144:ef7eb2e8f9f7 102 {
<> 144:ef7eb2e8f9f7 103 lesensePRSCh0 = 0, /**< PRS channel 0. */
<> 144:ef7eb2e8f9f7 104 lesensePRSCh1 = 1, /**< PRS channel 1. */
<> 144:ef7eb2e8f9f7 105 lesensePRSCh2 = 2, /**< PRS channel 2. */
<> 144:ef7eb2e8f9f7 106 lesensePRSCh3 = 3, /**< PRS channel 3. */
<> 144:ef7eb2e8f9f7 107 #if defined( LESENSE_CTRL_PRSSEL_PRSCH4 )
<> 144:ef7eb2e8f9f7 108 lesensePRSCh4 = 4, /**< PRS channel 4. */
<> 144:ef7eb2e8f9f7 109 #endif
<> 144:ef7eb2e8f9f7 110 #if defined( LESENSE_CTRL_PRSSEL_PRSCH5 )
<> 144:ef7eb2e8f9f7 111 lesensePRSCh5 = 5, /**< PRS channel 5. */
<> 144:ef7eb2e8f9f7 112 #endif
<> 144:ef7eb2e8f9f7 113 #if defined( LESENSE_CTRL_PRSSEL_PRSCH6 )
<> 144:ef7eb2e8f9f7 114 lesensePRSCh6 = 6, /**< PRS channel 6. */
<> 144:ef7eb2e8f9f7 115 #endif
<> 144:ef7eb2e8f9f7 116 #if defined( LESENSE_CTRL_PRSSEL_PRSCH7 )
<> 144:ef7eb2e8f9f7 117 lesensePRSCh7 = 7, /**< PRS channel 7. */
<> 144:ef7eb2e8f9f7 118 #endif
<> 144:ef7eb2e8f9f7 119 #if defined( LESENSE_CTRL_PRSSEL_PRSCH8 )
<> 144:ef7eb2e8f9f7 120 lesensePRSCh8 = 8, /**< PRS channel 8. */
<> 144:ef7eb2e8f9f7 121 #endif
<> 144:ef7eb2e8f9f7 122 #if defined( LESENSE_CTRL_PRSSEL_PRSCH9 )
<> 144:ef7eb2e8f9f7 123 lesensePRSCh9 = 9, /**< PRS channel 9. */
<> 144:ef7eb2e8f9f7 124 #endif
<> 144:ef7eb2e8f9f7 125 #if defined( LESENSE_CTRL_PRSSEL_PRSCH10 )
<> 144:ef7eb2e8f9f7 126 lesensePRSCh10 = 10, /**< PRS channel 10.*/
<> 144:ef7eb2e8f9f7 127 #endif
<> 144:ef7eb2e8f9f7 128 #if defined( LESENSE_CTRL_PRSSEL_PRSCH11 )
<> 144:ef7eb2e8f9f7 129 lesensePRSCh11 = 11, /**< PRS channel 11.*/
<> 144:ef7eb2e8f9f7 130 #endif
<> 144:ef7eb2e8f9f7 131 } LESENSE_PRSSel_TypeDef;
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /** Locations of the alternate excitation function. */
<> 144:ef7eb2e8f9f7 135 typedef enum
<> 144:ef7eb2e8f9f7 136 {
<> 144:ef7eb2e8f9f7 137 /** Alternate excitation is mapped to the LES_ALTEX pins. */
<> 144:ef7eb2e8f9f7 138 lesenseAltExMapALTEX = _LESENSE_CTRL_ALTEXMAP_ALTEX,
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 /** Alternate excitation is mapped to the pins of the other ACMP. */
<> 144:ef7eb2e8f9f7 141 lesenseAltExMapACMP = _LESENSE_CTRL_ALTEXMAP_ACMP
<> 144:ef7eb2e8f9f7 142 } LESENSE_AltExMap_TypeDef;
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 /** Result buffer interrupt and DMA trigger levels. */
<> 144:ef7eb2e8f9f7 146 typedef enum
<> 144:ef7eb2e8f9f7 147 {
<> 144:ef7eb2e8f9f7 148 /** DMA and interrupt flags are set when result buffer is halffull. */
<> 144:ef7eb2e8f9f7 149 lesenseBufTrigHalf = LESENSE_CTRL_BUFIDL_HALFFULL,
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /** DMA and interrupt flags set when result buffer is full. */
<> 144:ef7eb2e8f9f7 152 lesenseBufTrigFull = LESENSE_CTRL_BUFIDL_FULL
<> 144:ef7eb2e8f9f7 153 } LESENSE_BufTrigLevel_TypeDef;
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 /** Modes of operation for DMA wakeup from EM2. */
<> 144:ef7eb2e8f9f7 157 typedef enum
<> 144:ef7eb2e8f9f7 158 {
<> 144:ef7eb2e8f9f7 159 /** No DMA wakeup from EM2. */
<> 144:ef7eb2e8f9f7 160 lesenseDMAWakeUpDisable = LESENSE_CTRL_DMAWU_DISABLE,
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /** DMA wakeup from EM2 when data is valid in the result buffer. */
<> 144:ef7eb2e8f9f7 163 lesenseDMAWakeUpBufValid = LESENSE_CTRL_DMAWU_BUFDATAV,
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /** DMA wakeup from EM2 when the resultbuffer is full/halffull, depending on
<> 144:ef7eb2e8f9f7 166 * RESBIDL configuration in LESENSE_CTRL register (selected by
<> 144:ef7eb2e8f9f7 167 * resBufTrigLevel in LESENSE_ResBufTrigLevel_TypeDef descriptor structure). */
<> 144:ef7eb2e8f9f7 168 lesenseDMAWakeUpBufLevel = LESENSE_CTRL_DMAWU_BUFLEVEL
<> 144:ef7eb2e8f9f7 169 } LESENSE_DMAWakeUp_TypeDef;
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 /** Bias modes. */
<> 144:ef7eb2e8f9f7 173 typedef enum
<> 144:ef7eb2e8f9f7 174 {
<> 144:ef7eb2e8f9f7 175 /** Duty cycle bias module between low power and high accuracy mode. */
<> 144:ef7eb2e8f9f7 176 lesenseBiasModeDutyCycle = LESENSE_BIASCTRL_BIASMODE_DUTYCYCLE,
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /** Bias module is always in high accuracy mode. */
<> 144:ef7eb2e8f9f7 179 lesenseBiasModeHighAcc = LESENSE_BIASCTRL_BIASMODE_HIGHACC,
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 /** Bias module is controlled by the EMU and not affected by LESENSE. */
<> 144:ef7eb2e8f9f7 182 lesenseBiasModeDontTouch = LESENSE_BIASCTRL_BIASMODE_DONTTOUCH
<> 144:ef7eb2e8f9f7 183 } LESENSE_BiasMode_TypeDef;
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 /** Scan configuration. */
<> 144:ef7eb2e8f9f7 187 typedef enum
<> 144:ef7eb2e8f9f7 188 {
<> 144:ef7eb2e8f9f7 189 /** The channel configuration registers (CHx_CONF) used are directly mapped to
<> 144:ef7eb2e8f9f7 190 * the channel number. */
<> 144:ef7eb2e8f9f7 191 lesenseScanConfDirMap = LESENSE_CTRL_SCANCONF_DIRMAP,
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 /** The channel configuration registers used are CHx+8_CONF for channels 0-7
<> 144:ef7eb2e8f9f7 194 * and CHx-8_CONF for channels 8-15. */
<> 144:ef7eb2e8f9f7 195 lesenseScanConfInvMap = LESENSE_CTRL_SCANCONF_INVMAP,
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /** The channel configuration registers used toggles between CHX_SCANCONF and
<> 144:ef7eb2e8f9f7 198 * CHX+8_SCANCONF when channel x triggers. */
<> 144:ef7eb2e8f9f7 199 lesenseScanConfToggle = LESENSE_CTRL_SCANCONF_TOGGLE,
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 /** The decoder state defines the channel configuration register (CHx_CONF) to
<> 144:ef7eb2e8f9f7 202 * be used. */
<> 144:ef7eb2e8f9f7 203 lesenseScanConfDecDef = LESENSE_CTRL_SCANCONF_DECDEF
<> 144:ef7eb2e8f9f7 204 } LESENSE_ScanConfSel_TypeDef;
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /** DAC CHx data control configuration. */
<> 144:ef7eb2e8f9f7 208 typedef enum
<> 144:ef7eb2e8f9f7 209 {
<> 144:ef7eb2e8f9f7 210 /** DAC channel x data is defined by DAC_CHxDATA register.
<> 144:ef7eb2e8f9f7 211 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 212 lesenseDACIfData = _LESENSE_PERCTRL_DACCH0DATA_DACDATA,
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 /** DAC channel x data is defined by ACMPTHRES in LESENSE_CHx_INTERACT.
<> 144:ef7eb2e8f9f7 215 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 216 lesenseACMPThres = _LESENSE_PERCTRL_DACCH0DATA_ACMPTHRES
<> 144:ef7eb2e8f9f7 217 } LESENSE_ControlDACData_TypeDef;
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /** DAC channel x conversion mode configuration. */
<> 144:ef7eb2e8f9f7 221 typedef enum
<> 144:ef7eb2e8f9f7 222 {
<> 144:ef7eb2e8f9f7 223 /** LESENSE doesn't control DAC channel x.
<> 144:ef7eb2e8f9f7 224 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 225 lesenseDACConvModeDisable = _LESENSE_PERCTRL_DACCH0CONV_DISABLE,
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /** DAC channel x is driven in continuous mode.
<> 144:ef7eb2e8f9f7 228 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 229 lesenseDACConvModeContinuous = _LESENSE_PERCTRL_DACCH0CONV_CONTINUOUS,
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 /** DAC channel x is driven in sample hold mode.
<> 144:ef7eb2e8f9f7 232 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 233 lesenseDACConvModeSampleHold = _LESENSE_PERCTRL_DACCH0CONV_SAMPLEHOLD,
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /** DAC channel x is driven in sample off mode.
<> 144:ef7eb2e8f9f7 236 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 237 lesenseDACConvModeSampleOff = _LESENSE_PERCTRL_DACCH0CONV_SAMPLEOFF
<> 144:ef7eb2e8f9f7 238 } LESENSE_ControlDACConv_TypeDef;
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 /** DAC channel x output mode configuration. */
<> 144:ef7eb2e8f9f7 242 typedef enum
<> 144:ef7eb2e8f9f7 243 {
<> 144:ef7eb2e8f9f7 244 /** DAC CHx output to pin and ACMP/ADC disabled.
<> 144:ef7eb2e8f9f7 245 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 246 lesenseDACOutModeDisable = _LESENSE_PERCTRL_DACCH0OUT_DISABLE,
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 /** DAC CHx output to pin enabled, output to ADC and ACMP disabled.
<> 144:ef7eb2e8f9f7 249 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 250 lesenseDACOutModePin = _LESENSE_PERCTRL_DACCH0OUT_PIN,
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /** DAC CHx output to pin disabled, output to ADC and ACMP enabled.
<> 144:ef7eb2e8f9f7 253 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 254 lesenseDACOutModeADCACMP = _LESENSE_PERCTRL_DACCH0OUT_ADCACMP,
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /** DAC CHx output to pin, ADC, and ACMP enabled.
<> 144:ef7eb2e8f9f7 257 * Note: this value could be used for both DAC Ch0 and Ch1. */
<> 144:ef7eb2e8f9f7 258 lesenseDACOutModePinADCACMP = _LESENSE_PERCTRL_DACCH0OUT_PINADCACMP
<> 144:ef7eb2e8f9f7 259 } LESENSE_ControlDACOut_TypeDef;
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 /** DAC reference configuration. */
<> 144:ef7eb2e8f9f7 263 typedef enum
<> 144:ef7eb2e8f9f7 264 {
<> 144:ef7eb2e8f9f7 265 /** DAC uses VDD reference. */
<> 144:ef7eb2e8f9f7 266 lesenseDACRefVdd = LESENSE_PERCTRL_DACREF_VDD,
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /** DAC uses bandgap reference. */
<> 144:ef7eb2e8f9f7 269 lesenseDACRefBandGap = LESENSE_PERCTRL_DACREF_BANDGAP
<> 144:ef7eb2e8f9f7 270 } LESENSE_DACRef_TypeDef;
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 /** ACMPx control configuration. */
<> 144:ef7eb2e8f9f7 274 typedef enum
<> 144:ef7eb2e8f9f7 275 {
<> 144:ef7eb2e8f9f7 276 /** LESENSE does not control the ACMPx.
<> 144:ef7eb2e8f9f7 277 * Note: this value could be used for both ACMP0 and ACMP1. */
<> 144:ef7eb2e8f9f7 278 lesenseACMPModeDisable = _LESENSE_PERCTRL_ACMP0MODE_DISABLE,
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /** LESENSE controls the input mux of ACMPx.
<> 144:ef7eb2e8f9f7 281 * Note: this value could be used for both ACMP0 and ACMP1. */
<> 144:ef7eb2e8f9f7 282 lesenseACMPModeMux = _LESENSE_PERCTRL_ACMP0MODE_MUX,
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /** LESENSE controls the input mux of and the threshold value of ACMPx.
<> 144:ef7eb2e8f9f7 285 * Note: this value could be used for both ACMP0 and ACMP1. */
<> 144:ef7eb2e8f9f7 286 lesenseACMPModeMuxThres = _LESENSE_PERCTRL_ACMP0MODE_MUXTHRES
<> 144:ef7eb2e8f9f7 287 } LESENSE_ControlACMP_TypeDef;
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 /** Warm up modes. ACMP and DAC duty cycle mode configuration. */
<> 144:ef7eb2e8f9f7 291 typedef enum
<> 144:ef7eb2e8f9f7 292 {
<> 144:ef7eb2e8f9f7 293 /** ACMPs and DACs are shut down when LESENSE is idle. */
<> 144:ef7eb2e8f9f7 294 lesenseWarmupModeNormal = LESENSE_PERCTRL_WARMUPMODE_NORMAL,
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 /** ACMPs are kept powered up when LESENSE is idle. */
<> 144:ef7eb2e8f9f7 297 lesenseWarmupModeACMP = LESENSE_PERCTRL_WARMUPMODE_KEEPACMPWARM,
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /** The DAC is kept powered up when LESENSE is idle. */
<> 144:ef7eb2e8f9f7 300 lesenseWarmupModeDAC = LESENSE_PERCTRL_WARMUPMODE_KEEPDACWARM,
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 /** ACMPs and the DAC are kept powered up when LESENSE is idle. */
<> 144:ef7eb2e8f9f7 303 lesenseWarmupModeKeepWarm = LESENSE_PERCTRL_WARMUPMODE_KEEPACMPDACWARM
<> 144:ef7eb2e8f9f7 304 } LESENSE_WarmupMode_TypeDef;
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /** Decoder input source configuration. */
<> 144:ef7eb2e8f9f7 308 typedef enum
<> 144:ef7eb2e8f9f7 309 {
<> 144:ef7eb2e8f9f7 310 /** The SENSORSTATE register is used as input to the decoder. */
<> 144:ef7eb2e8f9f7 311 lesenseDecInputSensorSt = LESENSE_DECCTRL_INPUT_SENSORSTATE,
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 /** PRS channels are used as input to the decoder. */
<> 144:ef7eb2e8f9f7 314 lesenseDecInputPRS = LESENSE_DECCTRL_INPUT_PRS
<> 144:ef7eb2e8f9f7 315 } LESENSE_DecInput_TypeDef;
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317
<> 144:ef7eb2e8f9f7 318 /** Compare source selection for sensor sampling. */
<> 144:ef7eb2e8f9f7 319 typedef enum
<> 144:ef7eb2e8f9f7 320 {
<> 144:ef7eb2e8f9f7 321 /** Counter output will be used in comparison. */
<> 144:ef7eb2e8f9f7 322 lesenseSampleModeCounter = LESENSE_CH_INTERACT_SAMPLE_COUNTER,
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 /** ACMP output will be used in comparison. */
<> 144:ef7eb2e8f9f7 325 lesenseSampleModeACMP = LESENSE_CH_INTERACT_SAMPLE_ACMP
<> 144:ef7eb2e8f9f7 326 } LESENSE_ChSampleMode_TypeDef;
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 /** Interrupt generation setup for CHx interrupt flag. */
<> 144:ef7eb2e8f9f7 330 typedef enum
<> 144:ef7eb2e8f9f7 331 {
<> 144:ef7eb2e8f9f7 332 /** No interrupt is generated. */
<> 144:ef7eb2e8f9f7 333 lesenseSetIntNone = LESENSE_CH_INTERACT_SETIF_NONE,
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /** Set interrupt flag if the sensor triggers. */
<> 144:ef7eb2e8f9f7 336 lesenseSetIntLevel = LESENSE_CH_INTERACT_SETIF_LEVEL,
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 /** Set interrupt flag on positive edge of the sensor state. */
<> 144:ef7eb2e8f9f7 339 lesenseSetIntPosEdge = LESENSE_CH_INTERACT_SETIF_POSEDGE,
<> 144:ef7eb2e8f9f7 340
<> 144:ef7eb2e8f9f7 341 /** Set interrupt flag on negative edge of the sensor state. */
<> 144:ef7eb2e8f9f7 342 lesenseSetIntNegEdge = LESENSE_CH_INTERACT_SETIF_NEGEDGE
<> 144:ef7eb2e8f9f7 343 } LESENSE_ChIntMode_TypeDef;
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345
<> 144:ef7eb2e8f9f7 346 /** Channel pin mode for the excitation phase of the scan sequence. */
<> 144:ef7eb2e8f9f7 347 typedef enum
<> 144:ef7eb2e8f9f7 348 {
<> 144:ef7eb2e8f9f7 349 /** Channel pin is disabled. */
<> 144:ef7eb2e8f9f7 350 lesenseChPinExDis = LESENSE_CH_INTERACT_EXMODE_DISABLE,
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 /** Channel pin is configured as push-pull, driven HIGH. */
<> 144:ef7eb2e8f9f7 353 lesenseChPinExHigh = LESENSE_CH_INTERACT_EXMODE_HIGH,
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /** Channel pin is configured as push-pull, driven LOW. */
<> 144:ef7eb2e8f9f7 356 lesenseChPinExLow = LESENSE_CH_INTERACT_EXMODE_LOW,
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /** DAC output (only available on channel 0, 1, 2, 3, 12, 13, 14 and 15) */
<> 144:ef7eb2e8f9f7 359 lesenseChPinExDACOut = LESENSE_CH_INTERACT_EXMODE_DACOUT
<> 144:ef7eb2e8f9f7 360 } LESENSE_ChPinExMode_TypeDef;
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 /** Channel pin mode for the idle phase of the scan sequence. */
<> 144:ef7eb2e8f9f7 364 typedef enum
<> 144:ef7eb2e8f9f7 365 {
<> 144:ef7eb2e8f9f7 366 /** Channel pin is disabled in idle phase.
<> 144:ef7eb2e8f9f7 367 * Note: this value could be used for all channels. */
<> 144:ef7eb2e8f9f7 368 lesenseChPinIdleDis = _LESENSE_IDLECONF_CH0_DISABLE,
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 /** Channel pin is configured as push-pull, driven HIGH in idle phase.
<> 144:ef7eb2e8f9f7 371 * Note: this value could be used for all channels. */
<> 144:ef7eb2e8f9f7 372 lesenseChPinIdleHigh = _LESENSE_IDLECONF_CH0_HIGH,
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 /** Channel pin is configured as push-pull, driven LOW in idle phase.
<> 144:ef7eb2e8f9f7 375 * Note: this value could be used for all channels. */
<> 144:ef7eb2e8f9f7 376 lesenseChPinIdleLow = _LESENSE_IDLECONF_CH0_LOW,
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /** Channel pin is connected to DAC CH0 output in idle phase.
<> 144:ef7eb2e8f9f7 379 * Note: only applies to channel 0, 1, 2, 3. */
<> 144:ef7eb2e8f9f7 380 lesenseChPinIdleDACCh0 = _LESENSE_IDLECONF_CH0_DACCH0,
<> 144:ef7eb2e8f9f7 381
<> 144:ef7eb2e8f9f7 382 /** Channel pin is connected to DAC CH1 output in idle phase.
<> 144:ef7eb2e8f9f7 383 * Note: only applies to channel 12, 13, 14, 15. */
<> 144:ef7eb2e8f9f7 384 lesenseChPinIdleDACCh1 = _LESENSE_IDLECONF_CH12_DACCH1
<> 144:ef7eb2e8f9f7 385 } LESENSE_ChPinIdleMode_TypeDef;
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 /** Clock used for excitation and sample delay timing. */
<> 144:ef7eb2e8f9f7 389 typedef enum
<> 144:ef7eb2e8f9f7 390 {
<> 144:ef7eb2e8f9f7 391 /** LFACLK (LF clock) is used. */
<> 144:ef7eb2e8f9f7 392 lesenseClkLF = _LESENSE_CH_INTERACT_EXCLK_LFACLK,
<> 144:ef7eb2e8f9f7 393
<> 144:ef7eb2e8f9f7 394 /** AUXHFRCO (HF clock) is used. */
<> 144:ef7eb2e8f9f7 395 lesenseClkHF = _LESENSE_CH_INTERACT_EXCLK_AUXHFRCO
<> 144:ef7eb2e8f9f7 396 } LESENSE_ChClk_TypeDef;
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 /** Compare modes for counter comparison. */
<> 144:ef7eb2e8f9f7 400 typedef enum
<> 144:ef7eb2e8f9f7 401 {
<> 144:ef7eb2e8f9f7 402 /** Set interrupt flag if counter value is less than CTRTHRESHOLD, or if the
<> 144:ef7eb2e8f9f7 403 * ACMP output is 0. */
<> 144:ef7eb2e8f9f7 404 lesenseCompModeLess = LESENSE_CH_EVAL_COMP_LESS,
<> 144:ef7eb2e8f9f7 405
<> 144:ef7eb2e8f9f7 406 /** Set interrupt flag if counter value is greater than, or equal to
<> 144:ef7eb2e8f9f7 407 * CTRTHRESHOLD, or if the ACMP output is 1. */
<> 144:ef7eb2e8f9f7 408 lesenseCompModeGreaterOrEq = LESENSE_CH_EVAL_COMP_GE
<> 144:ef7eb2e8f9f7 409 } LESENSE_ChCompMode_TypeDef;
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /** Idle phase configuration of alternate excitation channels. */
<> 144:ef7eb2e8f9f7 413 typedef enum
<> 144:ef7eb2e8f9f7 414 {
<> 144:ef7eb2e8f9f7 415 /** ALTEX output is disabled in idle phase.
<> 144:ef7eb2e8f9f7 416 * Note: this value could be used for all alternate excitation channels. */
<> 144:ef7eb2e8f9f7 417 lesenseAltExPinIdleDis = _LESENSE_ALTEXCONF_IDLECONF0_DISABLE,
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419 /** ALTEX output is high in idle phase.
<> 144:ef7eb2e8f9f7 420 * Note: this value could be used for all alternate excitation channels. */
<> 144:ef7eb2e8f9f7 421 lesenseAltExPinIdleHigh = _LESENSE_ALTEXCONF_IDLECONF0_HIGH,
<> 144:ef7eb2e8f9f7 422
<> 144:ef7eb2e8f9f7 423 /** ALTEX output is low in idle phase.
<> 144:ef7eb2e8f9f7 424 * Note: this value could be used for all alternate excitation channels. */
<> 144:ef7eb2e8f9f7 425 lesenseAltExPinIdleLow = _LESENSE_ALTEXCONF_IDLECONF0_LOW
<> 144:ef7eb2e8f9f7 426 } LESENSE_AltExPinIdle_TypeDef;
<> 144:ef7eb2e8f9f7 427
<> 144:ef7eb2e8f9f7 428
<> 144:ef7eb2e8f9f7 429 /** Transition action modes. */
<> 144:ef7eb2e8f9f7 430 typedef enum
<> 144:ef7eb2e8f9f7 431 {
<> 144:ef7eb2e8f9f7 432 /** No PRS pulses generated (if PRSCOUNT == 0).
<> 144:ef7eb2e8f9f7 433 * Do not count (if PRSCOUNT == 1). */
<> 144:ef7eb2e8f9f7 434 lesenseTransActNone = LESENSE_ST_TCONFA_PRSACT_NONE,
<> 144:ef7eb2e8f9f7 435
<> 144:ef7eb2e8f9f7 436 /** Generate pulse on LESPRS0 (if PRSCOUNT == 0). */
<> 144:ef7eb2e8f9f7 437 lesenseTransActPRS0 = LESENSE_ST_TCONFA_PRSACT_PRS0,
<> 144:ef7eb2e8f9f7 438
<> 144:ef7eb2e8f9f7 439 /** Generate pulse on LESPRS1 (if PRSCOUNT == 0). */
<> 144:ef7eb2e8f9f7 440 lesenseTransActPRS1 = LESENSE_ST_TCONFA_PRSACT_PRS1,
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 /** Generate pulse on LESPRS0 and LESPRS1 (if PRSCOUNT == 0). */
<> 144:ef7eb2e8f9f7 443 lesenseTransActPRS01 = LESENSE_ST_TCONFA_PRSACT_PRS01,
<> 144:ef7eb2e8f9f7 444
<> 144:ef7eb2e8f9f7 445 /** Generate pulse on LESPRS2 (for both PRSCOUNT == 0 and PRSCOUNT == 1). */
<> 144:ef7eb2e8f9f7 446 lesenseTransActPRS2 = LESENSE_ST_TCONFA_PRSACT_PRS2,
<> 144:ef7eb2e8f9f7 447
<> 144:ef7eb2e8f9f7 448 /** Generate pulse on LESPRS0 and LESPRS2 (if PRSCOUNT == 0). */
<> 144:ef7eb2e8f9f7 449 lesenseTransActPRS02 = LESENSE_ST_TCONFA_PRSACT_PRS02,
<> 144:ef7eb2e8f9f7 450
<> 144:ef7eb2e8f9f7 451 /** Generate pulse on LESPRS1 and LESPRS2 (if PRSCOUNT == 0). */
<> 144:ef7eb2e8f9f7 452 lesenseTransActPRS12 = LESENSE_ST_TCONFA_PRSACT_PRS12,
<> 144:ef7eb2e8f9f7 453
<> 144:ef7eb2e8f9f7 454 /** Generate pulse on LESPRS0, LESPRS1 and LESPRS2 (if PRSCOUNT == 0). */
<> 144:ef7eb2e8f9f7 455 lesenseTransActPRS012 = LESENSE_ST_TCONFA_PRSACT_PRS012,
<> 144:ef7eb2e8f9f7 456
<> 144:ef7eb2e8f9f7 457 /** Count up (if PRSCOUNT == 1). */
<> 144:ef7eb2e8f9f7 458 lesenseTransActUp = LESENSE_ST_TCONFA_PRSACT_UP,
<> 144:ef7eb2e8f9f7 459
<> 144:ef7eb2e8f9f7 460 /** Count down (if PRSCOUNT == 1). */
<> 144:ef7eb2e8f9f7 461 lesenseTransActDown = LESENSE_ST_TCONFA_PRSACT_DOWN,
<> 144:ef7eb2e8f9f7 462
<> 144:ef7eb2e8f9f7 463 /** Count up and generate pulse on LESPRS2 (if PRSCOUNT == 1). */
<> 144:ef7eb2e8f9f7 464 lesenseTransActUpAndPRS2 = LESENSE_ST_TCONFA_PRSACT_UPANDPRS2,
<> 144:ef7eb2e8f9f7 465
<> 144:ef7eb2e8f9f7 466 /** Count down and generate pulse on LESPRS2 (if PRSCOUNT == 1). */
<> 144:ef7eb2e8f9f7 467 lesenseTransActDownAndPRS2 = LESENSE_ST_TCONFA_PRSACT_DOWNANDPRS2
<> 144:ef7eb2e8f9f7 468 } LESENSE_StTransAct_TypeDef;
<> 144:ef7eb2e8f9f7 469
<> 144:ef7eb2e8f9f7 470
<> 144:ef7eb2e8f9f7 471 /*******************************************************************************
<> 144:ef7eb2e8f9f7 472 ******************************* STRUCTS ***********************************
<> 144:ef7eb2e8f9f7 473 ******************************************************************************/
<> 144:ef7eb2e8f9f7 474
<> 144:ef7eb2e8f9f7 475 /** Core control (LESENSE_CTRL) descriptor structure. */
<> 144:ef7eb2e8f9f7 476 typedef struct
<> 144:ef7eb2e8f9f7 477 {
<> 144:ef7eb2e8f9f7 478 /** Select scan start mode to control how the scan start is being triggered.*/
<> 144:ef7eb2e8f9f7 479 LESENSE_ScanMode_TypeDef scanStart;
<> 144:ef7eb2e8f9f7 480
<> 144:ef7eb2e8f9f7 481 /** Select PRS source for scan start if scanMode is set to lesensePrsPulse. */
<> 144:ef7eb2e8f9f7 482 LESENSE_PRSSel_TypeDef prsSel;
<> 144:ef7eb2e8f9f7 483
<> 144:ef7eb2e8f9f7 484 /** Select scan configuration register usage strategy. */
<> 144:ef7eb2e8f9f7 485 LESENSE_ScanConfSel_TypeDef scanConfSel;
<> 144:ef7eb2e8f9f7 486
<> 144:ef7eb2e8f9f7 487 /** Set to true to invert ACMP0 output. */
<> 144:ef7eb2e8f9f7 488 bool invACMP0;
<> 144:ef7eb2e8f9f7 489
<> 144:ef7eb2e8f9f7 490 /** Set to true to invert ACMP1 output. */
<> 144:ef7eb2e8f9f7 491 bool invACMP1;
<> 144:ef7eb2e8f9f7 492
<> 144:ef7eb2e8f9f7 493 /** Set to true to sample both ACMPs simultaneously. */
<> 144:ef7eb2e8f9f7 494 bool dualSample;
<> 144:ef7eb2e8f9f7 495
<> 144:ef7eb2e8f9f7 496 /** Set to true in order to to store SCANRES in RAM (accessible via RESDATA)
<> 144:ef7eb2e8f9f7 497 * after each scan. */
<> 144:ef7eb2e8f9f7 498 bool storeScanRes;
<> 144:ef7eb2e8f9f7 499
<> 144:ef7eb2e8f9f7 500 /** Set to true in order to always make LESENSE write to the result buffer,
<> 144:ef7eb2e8f9f7 501 * even if it is full. */
<> 144:ef7eb2e8f9f7 502 bool bufOverWr;
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 /** Select trigger conditions for interrupt and DMA. */
<> 144:ef7eb2e8f9f7 505 LESENSE_BufTrigLevel_TypeDef bufTrigLevel;
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 /** Configure trigger condition for DMA wakeup from EM2. */
<> 144:ef7eb2e8f9f7 508 LESENSE_DMAWakeUp_TypeDef wakeupOnDMA;
<> 144:ef7eb2e8f9f7 509
<> 144:ef7eb2e8f9f7 510 /** Select bias mode. */
<> 144:ef7eb2e8f9f7 511 LESENSE_BiasMode_TypeDef biasMode;
<> 144:ef7eb2e8f9f7 512
<> 144:ef7eb2e8f9f7 513 /** Set to true to keep LESENSE running in debug mode. */
<> 144:ef7eb2e8f9f7 514 bool debugRun;
<> 144:ef7eb2e8f9f7 515 } LESENSE_CoreCtrlDesc_TypeDef;
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 /** Default configuration for LESENSE_CtrlDesc_TypeDef structure. */
<> 144:ef7eb2e8f9f7 518 #define LESENSE_CORECTRL_DESC_DEFAULT \
<> 144:ef7eb2e8f9f7 519 { \
<> 144:ef7eb2e8f9f7 520 lesenseScanStartPeriodic, /* Start new scan each time the period counter overflows. */ \
<> 144:ef7eb2e8f9f7 521 lesensePRSCh0, /* Default PRS channel is selected. */ \
<> 144:ef7eb2e8f9f7 522 lesenseScanConfDirMap, /* Direct mapping SCANCONF register usage strategy. */ \
<> 144:ef7eb2e8f9f7 523 false, /* Don't invert ACMP0 output. */ \
<> 144:ef7eb2e8f9f7 524 false, /* Don't invert ACMP1 output. */ \
<> 144:ef7eb2e8f9f7 525 false, /* Disable dual sampling. */ \
<> 144:ef7eb2e8f9f7 526 true, /* Store scan result after each scan. */ \
<> 144:ef7eb2e8f9f7 527 true, /* Overwrite result buffer register even if it is full. */ \
<> 144:ef7eb2e8f9f7 528 lesenseBufTrigHalf, /* Trigger interrupt and DMA request if result buffer is half full. */ \
<> 144:ef7eb2e8f9f7 529 lesenseDMAWakeUpDisable, /* Don't wake up on DMA from EM2. */ \
<> 144:ef7eb2e8f9f7 530 lesenseBiasModeDontTouch, /* Don't touch bias configuration. */ \
<> 144:ef7eb2e8f9f7 531 true /* Keep LESENSE running in debug mode. */ \
<> 144:ef7eb2e8f9f7 532 }
<> 144:ef7eb2e8f9f7 533
<> 144:ef7eb2e8f9f7 534
<> 144:ef7eb2e8f9f7 535 /** LESENSE timing control descriptor structure. */
<> 144:ef7eb2e8f9f7 536 typedef struct
<> 144:ef7eb2e8f9f7 537 {
<> 144:ef7eb2e8f9f7 538 /** Set the number of LFACLK cycles to delay sensor interaction on
<> 144:ef7eb2e8f9f7 539 * each channel. Valid range: 0-3 (2 bit). */
<> 144:ef7eb2e8f9f7 540 uint8_t startDelay;
<> 144:ef7eb2e8f9f7 541 } LESENSE_TimeCtrlDesc_TypeDef;
<> 144:ef7eb2e8f9f7 542
<> 144:ef7eb2e8f9f7 543 /** Default configuration for LESENSE_TimeCtrlDesc_TypeDef structure. */
<> 144:ef7eb2e8f9f7 544 #define LESENSE_TIMECTRL_DESC_DEFAULT \
<> 144:ef7eb2e8f9f7 545 { \
<> 144:ef7eb2e8f9f7 546 0U /* No sensor interaction delay. */ \
<> 144:ef7eb2e8f9f7 547 }
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549
<> 144:ef7eb2e8f9f7 550 /** LESENSE peripheral control descriptor structure. */
<> 144:ef7eb2e8f9f7 551 typedef struct
<> 144:ef7eb2e8f9f7 552 {
<> 144:ef7eb2e8f9f7 553 /** Configure DAC channel 0 data control. */
<> 144:ef7eb2e8f9f7 554 LESENSE_ControlDACData_TypeDef dacCh0Data;
<> 144:ef7eb2e8f9f7 555
<> 144:ef7eb2e8f9f7 556 /** Configure how LESENSE controls conversion on DAC channel 0. */
<> 144:ef7eb2e8f9f7 557 LESENSE_ControlDACConv_TypeDef dacCh0ConvMode;
<> 144:ef7eb2e8f9f7 558
<> 144:ef7eb2e8f9f7 559 /** Configure how LESENSE controls output on DAC channel 0. */
<> 144:ef7eb2e8f9f7 560 LESENSE_ControlDACOut_TypeDef dacCh0OutMode;
<> 144:ef7eb2e8f9f7 561
<> 144:ef7eb2e8f9f7 562 /** Configure DAC channel 1 data control. */
<> 144:ef7eb2e8f9f7 563 LESENSE_ControlDACData_TypeDef dacCh1Data;
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 /** Configure how LESENSE controls conversion on DAC channel 1. */
<> 144:ef7eb2e8f9f7 566 LESENSE_ControlDACConv_TypeDef dacCh1ConvMode;
<> 144:ef7eb2e8f9f7 567
<> 144:ef7eb2e8f9f7 568 /** Configure how LESENSE controls output on DAC channel 1. */
<> 144:ef7eb2e8f9f7 569 LESENSE_ControlDACOut_TypeDef dacCh1OutMode;
<> 144:ef7eb2e8f9f7 570
<> 144:ef7eb2e8f9f7 571 /** Configure the prescaling factor for the LESENSE - DAC interface.
<> 144:ef7eb2e8f9f7 572 * Valid range: 0-31 (5bit). */
<> 144:ef7eb2e8f9f7 573 uint8_t dacPresc;
<> 144:ef7eb2e8f9f7 574
<> 144:ef7eb2e8f9f7 575 /** Configure the DAC reference to be used. Set to #lesenseDACRefVdd to use
<> 144:ef7eb2e8f9f7 576 * VDD and set to #lesenseDACRefBandGap to use bandgap as reference. */
<> 144:ef7eb2e8f9f7 577 LESENSE_DACRef_TypeDef dacRef;
<> 144:ef7eb2e8f9f7 578
<> 144:ef7eb2e8f9f7 579 /** Configure how LESENSE controls ACMP 0. */
<> 144:ef7eb2e8f9f7 580 LESENSE_ControlACMP_TypeDef acmp0Mode;
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 /** Configure how LESENSE controls ACMP 1. */
<> 144:ef7eb2e8f9f7 583 LESENSE_ControlACMP_TypeDef acmp1Mode;
<> 144:ef7eb2e8f9f7 584
<> 144:ef7eb2e8f9f7 585 /** Configure how LESENSE controls ACMPs and the DAC in idle mode. */
<> 144:ef7eb2e8f9f7 586 LESENSE_WarmupMode_TypeDef warmupMode;
<> 144:ef7eb2e8f9f7 587 } LESENSE_PerCtrlDesc_TypeDef;
<> 144:ef7eb2e8f9f7 588
<> 144:ef7eb2e8f9f7 589 /** Default configuration for LESENSE_PerCtrl_TypeDef structure. */
<> 144:ef7eb2e8f9f7 590 #define LESENSE_PERCTRL_DESC_DEFAULT \
<> 144:ef7eb2e8f9f7 591 { \
<> 144:ef7eb2e8f9f7 592 lesenseDACIfData, /**/ \
<> 144:ef7eb2e8f9f7 593 lesenseDACConvModeDisable, /**/ \
<> 144:ef7eb2e8f9f7 594 lesenseDACOutModeDisable, /**/ \
<> 144:ef7eb2e8f9f7 595 lesenseDACIfData, /**/ \
<> 144:ef7eb2e8f9f7 596 lesenseDACConvModeDisable, /**/ \
<> 144:ef7eb2e8f9f7 597 lesenseDACOutModeDisable, /**/ \
<> 144:ef7eb2e8f9f7 598 0U, /**/ \
<> 144:ef7eb2e8f9f7 599 lesenseDACRefVdd, /**/ \
<> 144:ef7eb2e8f9f7 600 lesenseACMPModeMuxThres, /**/ \
<> 144:ef7eb2e8f9f7 601 lesenseACMPModeMuxThres, /**/ \
<> 144:ef7eb2e8f9f7 602 lesenseWarmupModeKeepWarm, /**/ \
<> 144:ef7eb2e8f9f7 603 }
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605
<> 144:ef7eb2e8f9f7 606 /** LESENSE decoder control descriptor structure. */
<> 144:ef7eb2e8f9f7 607 typedef struct
<> 144:ef7eb2e8f9f7 608 {
<> 144:ef7eb2e8f9f7 609 /** Select the input to the LESENSE decoder. */
<> 144:ef7eb2e8f9f7 610 LESENSE_DecInput_TypeDef decInput;
<> 144:ef7eb2e8f9f7 611
<> 144:ef7eb2e8f9f7 612 /** Initial state of the LESENSE decoder. */
<> 144:ef7eb2e8f9f7 613 uint32_t initState;
<> 144:ef7eb2e8f9f7 614
<> 144:ef7eb2e8f9f7 615 /** Set to enable the decoder to check the present state in addition
<> 144:ef7eb2e8f9f7 616 * to the states defined in DECCONF. */
<> 144:ef7eb2e8f9f7 617 bool chkState;
<> 144:ef7eb2e8f9f7 618
<> 144:ef7eb2e8f9f7 619 /** When set, a transition from state x in the decoder will set interrupt flag
<> 144:ef7eb2e8f9f7 620 * CHx. */
<> 144:ef7eb2e8f9f7 621 bool intMap;
<> 144:ef7eb2e8f9f7 622
<> 144:ef7eb2e8f9f7 623 /** Set to enable hysteresis in the decoder for suppressing changes on PRS
<> 144:ef7eb2e8f9f7 624 * channel 0. */
<> 144:ef7eb2e8f9f7 625 bool hystPRS0;
<> 144:ef7eb2e8f9f7 626
<> 144:ef7eb2e8f9f7 627 /** Set to enable hysteresis in the decoder for suppressing changes on PRS
<> 144:ef7eb2e8f9f7 628 * channel 1. */
<> 144:ef7eb2e8f9f7 629 bool hystPRS1;
<> 144:ef7eb2e8f9f7 630
<> 144:ef7eb2e8f9f7 631 /** Set to enable hysteresis in the decoder for suppressing changes on PRS
<> 144:ef7eb2e8f9f7 632 * channel 2. */
<> 144:ef7eb2e8f9f7 633 bool hystPRS2;
<> 144:ef7eb2e8f9f7 634
<> 144:ef7eb2e8f9f7 635 /** Set to enable hysteresis in the decoder for suppressing interrupt
<> 144:ef7eb2e8f9f7 636 * requests. */
<> 144:ef7eb2e8f9f7 637 bool hystIRQ;
<> 144:ef7eb2e8f9f7 638
<> 144:ef7eb2e8f9f7 639 /** Set to enable count mode on decoder PRS channels 0 and 1 to produce
<> 144:ef7eb2e8f9f7 640 * outputs which can be used by a PCNT to count up or down. */
<> 144:ef7eb2e8f9f7 641 bool prsCount;
<> 144:ef7eb2e8f9f7 642
<> 144:ef7eb2e8f9f7 643 /** Select PRS channel input for bit 0 of the LESENSE decoder. */
<> 144:ef7eb2e8f9f7 644 LESENSE_PRSSel_TypeDef prsChSel0;
<> 144:ef7eb2e8f9f7 645
<> 144:ef7eb2e8f9f7 646 /** Select PRS channel input for bit 1 of the LESENSE decoder. */
<> 144:ef7eb2e8f9f7 647 LESENSE_PRSSel_TypeDef prsChSel1;
<> 144:ef7eb2e8f9f7 648
<> 144:ef7eb2e8f9f7 649 /** Select PRS channel input for bit 2 of the LESENSE decoder. */
<> 144:ef7eb2e8f9f7 650 LESENSE_PRSSel_TypeDef prsChSel2;
<> 144:ef7eb2e8f9f7 651
<> 144:ef7eb2e8f9f7 652 /** Select PRS channel input for bit 3 of the LESENSE decoder. */
<> 144:ef7eb2e8f9f7 653 LESENSE_PRSSel_TypeDef prsChSel3;
<> 144:ef7eb2e8f9f7 654 } LESENSE_DecCtrlDesc_TypeDef;
<> 144:ef7eb2e8f9f7 655
<> 144:ef7eb2e8f9f7 656 /** Default configuration for LESENSE_PerCtrl_TypeDef structure. */
<> 144:ef7eb2e8f9f7 657 #define LESENSE_DECCTRL_DESC_DEFAULT \
<> 144:ef7eb2e8f9f7 658 { \
<> 144:ef7eb2e8f9f7 659 lesenseDecInputSensorSt, /**/ \
<> 144:ef7eb2e8f9f7 660 0U, /**/ \
<> 144:ef7eb2e8f9f7 661 false, /**/ \
<> 144:ef7eb2e8f9f7 662 true, /**/ \
<> 144:ef7eb2e8f9f7 663 true, /**/ \
<> 144:ef7eb2e8f9f7 664 true, /**/ \
<> 144:ef7eb2e8f9f7 665 true, /**/ \
<> 144:ef7eb2e8f9f7 666 true, /**/ \
<> 144:ef7eb2e8f9f7 667 false, /**/ \
<> 144:ef7eb2e8f9f7 668 lesensePRSCh0, /**/ \
<> 144:ef7eb2e8f9f7 669 lesensePRSCh1, /**/ \
<> 144:ef7eb2e8f9f7 670 lesensePRSCh2, /**/ \
<> 144:ef7eb2e8f9f7 671 lesensePRSCh3, /**/ \
<> 144:ef7eb2e8f9f7 672 }
<> 144:ef7eb2e8f9f7 673
<> 144:ef7eb2e8f9f7 674
<> 144:ef7eb2e8f9f7 675 /** LESENSE module initialization structure. */
<> 144:ef7eb2e8f9f7 676 typedef struct
<> 144:ef7eb2e8f9f7 677 {
<> 144:ef7eb2e8f9f7 678 /** LESENSE core configuration parameters. */
<> 144:ef7eb2e8f9f7 679 LESENSE_CoreCtrlDesc_TypeDef coreCtrl;
<> 144:ef7eb2e8f9f7 680
<> 144:ef7eb2e8f9f7 681 /** LESENSE timing configuration parameters. */
<> 144:ef7eb2e8f9f7 682 LESENSE_TimeCtrlDesc_TypeDef timeCtrl;
<> 144:ef7eb2e8f9f7 683
<> 144:ef7eb2e8f9f7 684 /** LESENSE peripheral configuration parameters. */
<> 144:ef7eb2e8f9f7 685 LESENSE_PerCtrlDesc_TypeDef perCtrl;
<> 144:ef7eb2e8f9f7 686
<> 144:ef7eb2e8f9f7 687 /** LESENSE decoder configuration parameters. */
<> 144:ef7eb2e8f9f7 688 LESENSE_DecCtrlDesc_TypeDef decCtrl;
<> 144:ef7eb2e8f9f7 689 } LESENSE_Init_TypeDef;
<> 144:ef7eb2e8f9f7 690
<> 144:ef7eb2e8f9f7 691 /** Default configuration for LESENSE_Init_TypeDef structure. */
<> 144:ef7eb2e8f9f7 692 #define LESENSE_INIT_DEFAULT \
<> 144:ef7eb2e8f9f7 693 { \
<> 144:ef7eb2e8f9f7 694 .coreCtrl = LESENSE_CORECTRL_DESC_DEFAULT, /* Default core control parameters. */ \
<> 144:ef7eb2e8f9f7 695 .timeCtrl = LESENSE_TIMECTRL_DESC_DEFAULT, /* Default time control parameters. */ \
<> 144:ef7eb2e8f9f7 696 .perCtrl = LESENSE_PERCTRL_DESC_DEFAULT, /* Default peripheral control parameters. */ \
<> 144:ef7eb2e8f9f7 697 .decCtrl = LESENSE_DECCTRL_DESC_DEFAULT /* Default decoder control parameters. */ \
<> 144:ef7eb2e8f9f7 698 }
<> 144:ef7eb2e8f9f7 699
<> 144:ef7eb2e8f9f7 700
<> 144:ef7eb2e8f9f7 701 /** Channel descriptor structure. */
<> 144:ef7eb2e8f9f7 702 typedef struct
<> 144:ef7eb2e8f9f7 703 {
<> 144:ef7eb2e8f9f7 704 /** Set to enable scan channel CHx. */
<> 144:ef7eb2e8f9f7 705 bool enaScanCh;
<> 144:ef7eb2e8f9f7 706
<> 144:ef7eb2e8f9f7 707 /** Set to enable CHx pin. */
<> 144:ef7eb2e8f9f7 708 bool enaPin;
<> 144:ef7eb2e8f9f7 709
<> 144:ef7eb2e8f9f7 710 /** Enable/disable channel interrupts after configuring all the sensor channel
<> 144:ef7eb2e8f9f7 711 * parameters. */
<> 144:ef7eb2e8f9f7 712 bool enaInt;
<> 144:ef7eb2e8f9f7 713
<> 144:ef7eb2e8f9f7 714 /** Configure channel pin mode for the excitation phase of the scan sequence.
<> 144:ef7eb2e8f9f7 715 * Note: OPAOUT is only available on channels 2, 3, 4, and 5. */
<> 144:ef7eb2e8f9f7 716 LESENSE_ChPinExMode_TypeDef chPinExMode;
<> 144:ef7eb2e8f9f7 717
<> 144:ef7eb2e8f9f7 718 /** Configure channel pin idle setup in LESENSE idle phase. */
<> 144:ef7eb2e8f9f7 719 LESENSE_ChPinIdleMode_TypeDef chPinIdleMode;
<> 144:ef7eb2e8f9f7 720
<> 144:ef7eb2e8f9f7 721 /** Set to use alternate excite pin for excitation. */
<> 144:ef7eb2e8f9f7 722 bool useAltEx;
<> 144:ef7eb2e8f9f7 723
<> 144:ef7eb2e8f9f7 724 /** Set to enable the result from this channel being shifted into the decoder
<> 144:ef7eb2e8f9f7 725 * register. */
<> 144:ef7eb2e8f9f7 726 bool shiftRes;
<> 144:ef7eb2e8f9f7 727
<> 144:ef7eb2e8f9f7 728 /** Set to invert the result bit stored in SCANRES register. */
<> 144:ef7eb2e8f9f7 729 bool invRes;
<> 144:ef7eb2e8f9f7 730
<> 144:ef7eb2e8f9f7 731 /** Set to store the counter value in RAM (accessible via RESDATA) and make
<> 144:ef7eb2e8f9f7 732 * the comparison result available in the SCANRES register. */
<> 144:ef7eb2e8f9f7 733 bool storeCntRes;
<> 144:ef7eb2e8f9f7 734
<> 144:ef7eb2e8f9f7 735 /** Select clock used for excitation timing. */
<> 144:ef7eb2e8f9f7 736 LESENSE_ChClk_TypeDef exClk;
<> 144:ef7eb2e8f9f7 737
<> 144:ef7eb2e8f9f7 738 /** Select clock used for sample delay timing. */
<> 144:ef7eb2e8f9f7 739 LESENSE_ChClk_TypeDef sampleClk;
<> 144:ef7eb2e8f9f7 740
<> 144:ef7eb2e8f9f7 741 /** Configure excitation time. Excitation will last exTime+1 excitation clock
<> 144:ef7eb2e8f9f7 742 * cycles. Valid range: 0-63 (6 bits). */
<> 144:ef7eb2e8f9f7 743 uint8_t exTime;
<> 144:ef7eb2e8f9f7 744
<> 144:ef7eb2e8f9f7 745 /** Configure sample delay. Sampling will occur after sampleDelay+1 sample
<> 144:ef7eb2e8f9f7 746 * clock cycles. Valid range: 0-127 (7 bits). */
<> 144:ef7eb2e8f9f7 747 uint8_t sampleDelay;
<> 144:ef7eb2e8f9f7 748
<> 144:ef7eb2e8f9f7 749 /** Configure measure delay. Sensor measuring is delayed for measDelay
<> 144:ef7eb2e8f9f7 750 * excitation clock cycles. Valid range: 0-127 (7 bits). */
<> 144:ef7eb2e8f9f7 751 uint8_t measDelay;
<> 144:ef7eb2e8f9f7 752
<> 144:ef7eb2e8f9f7 753 /** Configure ACMP threshold.
<> 144:ef7eb2e8f9f7 754 * If perCtrl.dacCh0Data or perCtrl.dacCh1Data is set to #lesenseDACIfData,
<> 144:ef7eb2e8f9f7 755 * acmpThres defines the 12-bit DAC data in the corresponding data register
<> 144:ef7eb2e8f9f7 756 * of the DAC interface (DACn_CH0DATA and DACn_CH1DATA).
<> 144:ef7eb2e8f9f7 757 * In this case, the valid range is: 0-4095 (12 bits).
<> 144:ef7eb2e8f9f7 758 * If perCtrl.dacCh0Data or perCtrl.dacCh1Data is set to #lesenseACMPThres,
<> 144:ef7eb2e8f9f7 759 * acmpThres defines the 6-bit Vdd scaling factor of ACMP negative input
<> 144:ef7eb2e8f9f7 760 * (VDDLEVEL in ACMP_INPUTSEL register).
<> 144:ef7eb2e8f9f7 761 * In this case, the valid range is: 0-63 (6 bits). */
<> 144:ef7eb2e8f9f7 762 uint16_t acmpThres;
<> 144:ef7eb2e8f9f7 763
<> 144:ef7eb2e8f9f7 764 /** Select if ACMP output or counter output should be used in comparison. */
<> 144:ef7eb2e8f9f7 765 LESENSE_ChSampleMode_TypeDef sampleMode;
<> 144:ef7eb2e8f9f7 766
<> 144:ef7eb2e8f9f7 767 /** Configure interrupt generation mode for CHx interrupt flag. */
<> 144:ef7eb2e8f9f7 768 LESENSE_ChIntMode_TypeDef intMode;
<> 144:ef7eb2e8f9f7 769
<> 144:ef7eb2e8f9f7 770 /** Configure decision threshold for counter comparison.
<> 144:ef7eb2e8f9f7 771 * Valid range: 0-65535 (16 bits). */
<> 144:ef7eb2e8f9f7 772 uint16_t cntThres;
<> 144:ef7eb2e8f9f7 773
<> 144:ef7eb2e8f9f7 774 /** Select mode for counter comparison. */
<> 144:ef7eb2e8f9f7 775 LESENSE_ChCompMode_TypeDef compMode;
<> 144:ef7eb2e8f9f7 776 } LESENSE_ChDesc_TypeDef;
<> 144:ef7eb2e8f9f7 777
<> 144:ef7eb2e8f9f7 778
<> 144:ef7eb2e8f9f7 779 /** Configuration structure for all scan channels. */
<> 144:ef7eb2e8f9f7 780 typedef struct
<> 144:ef7eb2e8f9f7 781 {
<> 144:ef7eb2e8f9f7 782 /** Channel descriptor for all 16 channels. */
<> 144:ef7eb2e8f9f7 783 LESENSE_ChDesc_TypeDef Ch[16];
<> 144:ef7eb2e8f9f7 784 } LESENSE_ChAll_TypeDef;
<> 144:ef7eb2e8f9f7 785
<> 144:ef7eb2e8f9f7 786 /** Default configuration for scan channel. */
<> 144:ef7eb2e8f9f7 787 #define LESENSE_CH_CONF_DEFAULT \
<> 144:ef7eb2e8f9f7 788 { \
<> 144:ef7eb2e8f9f7 789 true, /* Enable scan channel. */ \
<> 144:ef7eb2e8f9f7 790 true, /* Enable the assigned pin on scan channel. */ \
<> 144:ef7eb2e8f9f7 791 true, /* Enable interrupts on channel. */ \
<> 144:ef7eb2e8f9f7 792 lesenseChPinExHigh, /* Channel pin is high during the excitation period. */ \
<> 144:ef7eb2e8f9f7 793 lesenseChPinIdleLow, /* Channel pin is low during the idle period. */ \
<> 144:ef7eb2e8f9f7 794 false, /* Don't use alternate excitation pins for excitation. */ \
<> 144:ef7eb2e8f9f7 795 false, /* Disabled to shift results from this channel to the decoder register. */ \
<> 144:ef7eb2e8f9f7 796 false, /* Disabled to invert the scan result bit. */ \
<> 144:ef7eb2e8f9f7 797 false, /* Disabled to store counter value in the result buffer. */ \
<> 144:ef7eb2e8f9f7 798 lesenseClkLF, /* Use the LF clock for excitation timing. */ \
<> 144:ef7eb2e8f9f7 799 lesenseClkLF, /* Use the LF clock for sample timing. */ \
<> 144:ef7eb2e8f9f7 800 0x03U, /* Excitation time is set to 3(+1) excitation clock cycles. */ \
<> 144:ef7eb2e8f9f7 801 0x09U, /* Sample delay is set to 9(+1) sample clock cycles. */ \
<> 144:ef7eb2e8f9f7 802 0x06U, /* Measure delay is set to 6 excitation clock cycles.*/ \
<> 144:ef7eb2e8f9f7 803 0x00U, /* ACMP threshold has been set to 0. */ \
<> 144:ef7eb2e8f9f7 804 lesenseSampleModeACMP, /* ACMP output will be used in comparison. */ \
<> 144:ef7eb2e8f9f7 805 lesenseSetIntNone, /* No interrupt is generated by the channel. */ \
<> 144:ef7eb2e8f9f7 806 0xFFU, /* Counter threshold has bee set to 0xFF. */ \
<> 144:ef7eb2e8f9f7 807 lesenseCompModeLess /* Compare mode has been set to trigger interrupt on "less". */ \
<> 144:ef7eb2e8f9f7 808 }
<> 144:ef7eb2e8f9f7 809
<> 144:ef7eb2e8f9f7 810 /** Default configuration for all sensor channels. */
<> 144:ef7eb2e8f9f7 811 #define LESENSE_SCAN_CONF_DEFAULT \
<> 144:ef7eb2e8f9f7 812 { \
<> 144:ef7eb2e8f9f7 813 { \
<> 144:ef7eb2e8f9f7 814 LESENSE_CH_CONF_DEFAULT, /* Scan channel 0. */ \
<> 144:ef7eb2e8f9f7 815 LESENSE_CH_CONF_DEFAULT, /* Scan channel 1. */ \
<> 144:ef7eb2e8f9f7 816 LESENSE_CH_CONF_DEFAULT, /* Scan channel 2. */ \
<> 144:ef7eb2e8f9f7 817 LESENSE_CH_CONF_DEFAULT, /* Scan channel 3. */ \
<> 144:ef7eb2e8f9f7 818 LESENSE_CH_CONF_DEFAULT, /* Scan channel 4. */ \
<> 144:ef7eb2e8f9f7 819 LESENSE_CH_CONF_DEFAULT, /* Scan channel 5. */ \
<> 144:ef7eb2e8f9f7 820 LESENSE_CH_CONF_DEFAULT, /* Scan channel 6. */ \
<> 144:ef7eb2e8f9f7 821 LESENSE_CH_CONF_DEFAULT, /* Scan channel 7. */ \
<> 144:ef7eb2e8f9f7 822 LESENSE_CH_CONF_DEFAULT, /* Scan channel 8. */ \
<> 144:ef7eb2e8f9f7 823 LESENSE_CH_CONF_DEFAULT, /* Scan channel 9. */ \
<> 144:ef7eb2e8f9f7 824 LESENSE_CH_CONF_DEFAULT, /* Scan channel 10. */ \
<> 144:ef7eb2e8f9f7 825 LESENSE_CH_CONF_DEFAULT, /* Scan channel 11. */ \
<> 144:ef7eb2e8f9f7 826 LESENSE_CH_CONF_DEFAULT, /* Scan channel 12. */ \
<> 144:ef7eb2e8f9f7 827 LESENSE_CH_CONF_DEFAULT, /* Scan channel 13. */ \
<> 144:ef7eb2e8f9f7 828 LESENSE_CH_CONF_DEFAULT, /* Scan channel 14. */ \
<> 144:ef7eb2e8f9f7 829 LESENSE_CH_CONF_DEFAULT, /* Scan channel 15. */ \
<> 144:ef7eb2e8f9f7 830 } \
<> 144:ef7eb2e8f9f7 831 }
<> 144:ef7eb2e8f9f7 832
<> 144:ef7eb2e8f9f7 833
<> 144:ef7eb2e8f9f7 834 /** Alternate excitation descriptor structure. */
<> 144:ef7eb2e8f9f7 835 typedef struct
<> 144:ef7eb2e8f9f7 836 {
<> 144:ef7eb2e8f9f7 837 /** Configure alternate excitation pins. If set, the corresponding alternate
<> 144:ef7eb2e8f9f7 838 * excitation pin/signal is enabled. */
<> 144:ef7eb2e8f9f7 839 bool enablePin;
<> 144:ef7eb2e8f9f7 840
<> 144:ef7eb2e8f9f7 841 /** Configure idle phase setup of alternate excitation pins.
<> 144:ef7eb2e8f9f7 842 The idleConf parameter is not valid when altExMap==lesenseAltExMapACMP. */
<> 144:ef7eb2e8f9f7 843 LESENSE_AltExPinIdle_TypeDef idleConf;
<> 144:ef7eb2e8f9f7 844
<> 144:ef7eb2e8f9f7 845 /** Configure how to control the external alternate excitation pins. Only
<> 144:ef7eb2e8f9f7 846 * applies if altExMap has been set to lesenseAltExMapALTEX.
<> 144:ef7eb2e8f9f7 847 * If true, the excitation happens on the corresponding alternate excitation
<> 144:ef7eb2e8f9f7 848 * pin during the excitation periods of all enabled channels.
<> 144:ef7eb2e8f9f7 849 * If false, the excitation happens on the corresponding alternate excitation
<> 144:ef7eb2e8f9f7 850 * pin ONLY during the excitation period of the corresponding channel.
<> 144:ef7eb2e8f9f7 851 * The alwaysEx parameter is not valid when altExMap==lesenseAltExMapACMP. */
<> 144:ef7eb2e8f9f7 852 bool alwaysEx;
<> 144:ef7eb2e8f9f7 853 } LESENSE_AltExDesc_TypeDef;
<> 144:ef7eb2e8f9f7 854
<> 144:ef7eb2e8f9f7 855
<> 144:ef7eb2e8f9f7 856 /** Configuration structure for alternate excitation. */
<> 144:ef7eb2e8f9f7 857 typedef struct
<> 144:ef7eb2e8f9f7 858 {
<> 144:ef7eb2e8f9f7 859 /** Select alternate excitation mapping. */
<> 144:ef7eb2e8f9f7 860 LESENSE_AltExMap_TypeDef altExMap;
<> 144:ef7eb2e8f9f7 861
<> 144:ef7eb2e8f9f7 862 /** Alternate excitation channel descriptors.
<> 144:ef7eb2e8f9f7 863 * When altExMap==lesenseAltExMapALTEX only the 8 first descriptors are used.
<> 144:ef7eb2e8f9f7 864 * In this mode they describe the configuration of the LES_ALTEX0-7 pins.
<> 144:ef7eb2e8f9f7 865 * When altExMap==lesenseAltExMapACMP all 16 descriptors are used. In this
<> 144:ef7eb2e8f9f7 866 * mode they describe the configuration of the 16 possible ACMP0-1 excitation
<> 144:ef7eb2e8f9f7 867 * channels. Please refer to the user manual for a complete mapping of the
<> 144:ef7eb2e8f9f7 868 * routing.
<> 144:ef7eb2e8f9f7 869 * NOTE:
<> 144:ef7eb2e8f9f7 870 * Some parameters in the descriptors are not valid when
<> 144:ef7eb2e8f9f7 871 * altExMap==lesenseAltExMapACMP. Please refer to the definition of the
<> 144:ef7eb2e8f9f7 872 * LESENSE_AltExDesc_TypeDef structure for details regarding which parameters
<> 144:ef7eb2e8f9f7 873 * are valid. */
<> 144:ef7eb2e8f9f7 874 LESENSE_AltExDesc_TypeDef AltEx[16];
<> 144:ef7eb2e8f9f7 875
<> 144:ef7eb2e8f9f7 876 } LESENSE_ConfAltEx_TypeDef;
<> 144:ef7eb2e8f9f7 877
<> 144:ef7eb2e8f9f7 878
<> 144:ef7eb2e8f9f7 879 /** Default configuration for alternate excitation channel. */
<> 144:ef7eb2e8f9f7 880 #define LESENSE_ALTEX_CH_CONF_DEFAULT \
<> 144:ef7eb2e8f9f7 881 { \
<> 144:ef7eb2e8f9f7 882 true, /* Alternate excitation enabled.*/ \
<> 144:ef7eb2e8f9f7 883 lesenseAltExPinIdleDis,/* Alternate excitation pin is disabled in idle. */ \
<> 144:ef7eb2e8f9f7 884 false /* Excite only for corresponding channel. */ \
<> 144:ef7eb2e8f9f7 885 }
<> 144:ef7eb2e8f9f7 886
<> 144:ef7eb2e8f9f7 887 /** Default configuration for all alternate excitation channels. */
<> 144:ef7eb2e8f9f7 888 #define LESENSE_ALTEX_CONF_DEFAULT \
<> 144:ef7eb2e8f9f7 889 { \
<> 144:ef7eb2e8f9f7 890 lesenseAltExMapACMP, \
<> 144:ef7eb2e8f9f7 891 { \
<> 144:ef7eb2e8f9f7 892 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 0. */ \
<> 144:ef7eb2e8f9f7 893 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 1. */ \
<> 144:ef7eb2e8f9f7 894 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 2. */ \
<> 144:ef7eb2e8f9f7 895 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 3. */ \
<> 144:ef7eb2e8f9f7 896 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 4. */ \
<> 144:ef7eb2e8f9f7 897 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 5. */ \
<> 144:ef7eb2e8f9f7 898 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 6. */ \
<> 144:ef7eb2e8f9f7 899 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 7. */ \
<> 144:ef7eb2e8f9f7 900 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 8. */ \
<> 144:ef7eb2e8f9f7 901 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 9. */ \
<> 144:ef7eb2e8f9f7 902 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 10. */ \
<> 144:ef7eb2e8f9f7 903 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 11. */ \
<> 144:ef7eb2e8f9f7 904 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 12. */ \
<> 144:ef7eb2e8f9f7 905 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 13. */ \
<> 144:ef7eb2e8f9f7 906 LESENSE_ALTEX_CH_CONF_DEFAULT, /* Alternate excitation channel 14. */ \
<> 144:ef7eb2e8f9f7 907 LESENSE_ALTEX_CH_CONF_DEFAULT /* Alternate excitation channel 15. */ \
<> 144:ef7eb2e8f9f7 908 } \
<> 144:ef7eb2e8f9f7 909 }
<> 144:ef7eb2e8f9f7 910
<> 144:ef7eb2e8f9f7 911
<> 144:ef7eb2e8f9f7 912 /** Decoder state condition descriptor structure. */
<> 144:ef7eb2e8f9f7 913 typedef struct
<> 144:ef7eb2e8f9f7 914 {
<> 144:ef7eb2e8f9f7 915 /** Configure compare value. State transition is triggered when sensor state
<> 144:ef7eb2e8f9f7 916 * equals to this value. Valid range: 0-15 (4 bits). */
<> 144:ef7eb2e8f9f7 917 uint8_t compVal;
<> 144:ef7eb2e8f9f7 918
<> 144:ef7eb2e8f9f7 919 /** Configure compare mask. Set bit X to exclude sensor X from evaluation.
<> 144:ef7eb2e8f9f7 920 * Note: decoder can handle sensor inputs from up to 4 sensors, therefore
<> 144:ef7eb2e8f9f7 921 * this mask is 4 bit long. */
<> 144:ef7eb2e8f9f7 922 uint8_t compMask;
<> 144:ef7eb2e8f9f7 923
<> 144:ef7eb2e8f9f7 924 /** Configure index of state to be entered if the sensor state equals to
<> 144:ef7eb2e8f9f7 925 * compVal. Valid range: 0-15 (4 bits). */
<> 144:ef7eb2e8f9f7 926 uint8_t nextState;
<> 144:ef7eb2e8f9f7 927
<> 144:ef7eb2e8f9f7 928 /** Configure which PRS action to perform when sensor state equals to
<> 144:ef7eb2e8f9f7 929 * compVal. */
<> 144:ef7eb2e8f9f7 930 LESENSE_StTransAct_TypeDef prsAct;
<> 144:ef7eb2e8f9f7 931
<> 144:ef7eb2e8f9f7 932 /** If enabled, interrupt flag is set when sensor state equals to compVal. */
<> 144:ef7eb2e8f9f7 933 bool setInt;
<> 144:ef7eb2e8f9f7 934 } LESENSE_DecStCond_TypeDef;
<> 144:ef7eb2e8f9f7 935
<> 144:ef7eb2e8f9f7 936 /** Default configuration for decoder state condition. */
<> 144:ef7eb2e8f9f7 937 #define LESENSE_ST_CONF_DEFAULT \
<> 144:ef7eb2e8f9f7 938 { \
<> 144:ef7eb2e8f9f7 939 0x0FU, /* Compare value set to 0x0F. */ \
<> 144:ef7eb2e8f9f7 940 0x00U, /* All decoder inputs masked. */ \
<> 144:ef7eb2e8f9f7 941 0U, /* Next state is state 0. */ \
<> 144:ef7eb2e8f9f7 942 lesenseTransActNone, /* No PRS action performed on compare match. */ \
<> 144:ef7eb2e8f9f7 943 false /* No interrupt triggered on compare match. */ \
<> 144:ef7eb2e8f9f7 944 }
<> 144:ef7eb2e8f9f7 945
<> 144:ef7eb2e8f9f7 946
<> 144:ef7eb2e8f9f7 947 /** Decoder state x configuration structure. */
<> 144:ef7eb2e8f9f7 948 typedef struct
<> 144:ef7eb2e8f9f7 949 {
<> 144:ef7eb2e8f9f7 950 /** If enabled, the state descriptor pair in the next location will also be
<> 144:ef7eb2e8f9f7 951 * evaluated. */
<> 144:ef7eb2e8f9f7 952 bool chainDesc;
<> 144:ef7eb2e8f9f7 953
<> 144:ef7eb2e8f9f7 954 /** State condition descriptor A (high level descriptor of
<> 144:ef7eb2e8f9f7 955 * LESENSE_STx_DECCONFA). */
<> 144:ef7eb2e8f9f7 956 LESENSE_DecStCond_TypeDef confA;
<> 144:ef7eb2e8f9f7 957
<> 144:ef7eb2e8f9f7 958 /** State condition descriptor B (high level descriptor of
<> 144:ef7eb2e8f9f7 959 * LESENSE_STx_DECCONFB). */
<> 144:ef7eb2e8f9f7 960 LESENSE_DecStCond_TypeDef confB;
<> 144:ef7eb2e8f9f7 961 } LESENSE_DecStDesc_TypeDef;
<> 144:ef7eb2e8f9f7 962
<> 144:ef7eb2e8f9f7 963
<> 144:ef7eb2e8f9f7 964 /** Configuration structure for the decoder. */
<> 144:ef7eb2e8f9f7 965 typedef struct
<> 144:ef7eb2e8f9f7 966 {
<> 144:ef7eb2e8f9f7 967 /** Descriptor of the 16 decoder states. */
<> 144:ef7eb2e8f9f7 968 LESENSE_DecStDesc_TypeDef St[16];
<> 144:ef7eb2e8f9f7 969 } LESENSE_DecStAll_TypeDef;
<> 144:ef7eb2e8f9f7 970
<> 144:ef7eb2e8f9f7 971 /** Default configuration for all decoder states. */
<> 144:ef7eb2e8f9f7 972 #define LESENSE_DECODER_CONF_DEFAULT \
<> 144:ef7eb2e8f9f7 973 { /* chain | Descriptor A | Descriptor B */ \
<> 144:ef7eb2e8f9f7 974 { \
<> 144:ef7eb2e8f9f7 975 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 0. */ \
<> 144:ef7eb2e8f9f7 976 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 1. */ \
<> 144:ef7eb2e8f9f7 977 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 2. */ \
<> 144:ef7eb2e8f9f7 978 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 3. */ \
<> 144:ef7eb2e8f9f7 979 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 4. */ \
<> 144:ef7eb2e8f9f7 980 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 5. */ \
<> 144:ef7eb2e8f9f7 981 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 6. */ \
<> 144:ef7eb2e8f9f7 982 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 7. */ \
<> 144:ef7eb2e8f9f7 983 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 8. */ \
<> 144:ef7eb2e8f9f7 984 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 9. */ \
<> 144:ef7eb2e8f9f7 985 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 10. */ \
<> 144:ef7eb2e8f9f7 986 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 11. */ \
<> 144:ef7eb2e8f9f7 987 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 12. */ \
<> 144:ef7eb2e8f9f7 988 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 13. */ \
<> 144:ef7eb2e8f9f7 989 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT }, /* Decoder state 14. */ \
<> 144:ef7eb2e8f9f7 990 { false, LESENSE_ST_CONF_DEFAULT, LESENSE_ST_CONF_DEFAULT } /* Decoder state 15. */ \
<> 144:ef7eb2e8f9f7 991 } \
<> 144:ef7eb2e8f9f7 992 }
<> 144:ef7eb2e8f9f7 993
<> 144:ef7eb2e8f9f7 994 /*******************************************************************************
<> 144:ef7eb2e8f9f7 995 ***************************** PROTOTYPES **********************************
<> 144:ef7eb2e8f9f7 996 ******************************************************************************/
<> 144:ef7eb2e8f9f7 997 void LESENSE_Init(LESENSE_Init_TypeDef const *init, bool const reqReset);
<> 144:ef7eb2e8f9f7 998 void LESENSE_Reset(void);
<> 144:ef7eb2e8f9f7 999
<> 144:ef7eb2e8f9f7 1000 uint32_t LESENSE_ScanFreqSet(uint32_t refFreq, uint32_t const scanFreq);
<> 144:ef7eb2e8f9f7 1001 void LESENSE_ScanModeSet(LESENSE_ScanMode_TypeDef const scanMode,
<> 144:ef7eb2e8f9f7 1002 bool const start);
<> 144:ef7eb2e8f9f7 1003
<> 144:ef7eb2e8f9f7 1004 void LESENSE_StartDelaySet(uint8_t const startDelay);
<> 144:ef7eb2e8f9f7 1005
<> 144:ef7eb2e8f9f7 1006 void LESENSE_ClkDivSet(LESENSE_ChClk_TypeDef const clk,
<> 144:ef7eb2e8f9f7 1007 LESENSE_ClkPresc_TypeDef const clkDiv);
<> 144:ef7eb2e8f9f7 1008
<> 144:ef7eb2e8f9f7 1009 void LESENSE_ChannelAllConfig(LESENSE_ChAll_TypeDef const *confChAll);
<> 144:ef7eb2e8f9f7 1010 void LESENSE_ChannelConfig(LESENSE_ChDesc_TypeDef const *confCh,
<> 144:ef7eb2e8f9f7 1011 uint32_t const chIdx);
<> 144:ef7eb2e8f9f7 1012 void LESENSE_ChannelEnable(uint8_t const chIdx,
<> 144:ef7eb2e8f9f7 1013 bool const enaScanCh,
<> 144:ef7eb2e8f9f7 1014 bool const enaPin);
<> 144:ef7eb2e8f9f7 1015 void LESENSE_ChannelEnableMask(uint16_t chMask, uint16_t pinMask);
<> 144:ef7eb2e8f9f7 1016 void LESENSE_ChannelTimingSet(uint8_t const chIdx,
<> 144:ef7eb2e8f9f7 1017 uint8_t const exTime,
<> 144:ef7eb2e8f9f7 1018 uint8_t const sampleDelay,
<> 144:ef7eb2e8f9f7 1019 uint8_t const measDelay);
<> 144:ef7eb2e8f9f7 1020 void LESENSE_ChannelThresSet(uint8_t const chIdx,
<> 144:ef7eb2e8f9f7 1021 uint16_t const acmpThres,
<> 144:ef7eb2e8f9f7 1022 uint16_t const cntThres);
<> 144:ef7eb2e8f9f7 1023
<> 144:ef7eb2e8f9f7 1024 void LESENSE_AltExConfig(LESENSE_ConfAltEx_TypeDef const *confAltEx);
<> 144:ef7eb2e8f9f7 1025
<> 144:ef7eb2e8f9f7 1026 void LESENSE_DecoderStateAllConfig(LESENSE_DecStAll_TypeDef const *confDecStAll);
<> 144:ef7eb2e8f9f7 1027 void LESENSE_DecoderStateConfig(LESENSE_DecStDesc_TypeDef const *confDecSt,
<> 144:ef7eb2e8f9f7 1028 uint32_t const decSt);
<> 144:ef7eb2e8f9f7 1029 void LESENSE_DecoderStateSet(uint32_t decSt);
<> 144:ef7eb2e8f9f7 1030 uint32_t LESENSE_DecoderStateGet(void);
<> 144:ef7eb2e8f9f7 1031
<> 144:ef7eb2e8f9f7 1032 void LESENSE_ScanStart(void);
<> 144:ef7eb2e8f9f7 1033 void LESENSE_ScanStop(void);
<> 144:ef7eb2e8f9f7 1034 void LESENSE_DecoderStart(void);
<> 144:ef7eb2e8f9f7 1035 void LESENSE_ResultBufferClear(void);
<> 144:ef7eb2e8f9f7 1036
<> 144:ef7eb2e8f9f7 1037
<> 144:ef7eb2e8f9f7 1038 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1039 * @brief
<> 144:ef7eb2e8f9f7 1040 * Stop LESENSE decoder.
<> 144:ef7eb2e8f9f7 1041 *
<> 144:ef7eb2e8f9f7 1042 * @details
<> 144:ef7eb2e8f9f7 1043 * This function disables the LESENSE decoder by setting the command to the
<> 144:ef7eb2e8f9f7 1044 * LESENSE_DECCTRL register.
<> 144:ef7eb2e8f9f7 1045 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1046 __STATIC_INLINE void LESENSE_DecoderStop(void)
<> 144:ef7eb2e8f9f7 1047 {
<> 144:ef7eb2e8f9f7 1048 /* Stop the decoder */
<> 144:ef7eb2e8f9f7 1049 LESENSE->DECCTRL |= LESENSE_DECCTRL_DISABLE;
<> 144:ef7eb2e8f9f7 1050 }
<> 144:ef7eb2e8f9f7 1051
<> 144:ef7eb2e8f9f7 1052
<> 144:ef7eb2e8f9f7 1053 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1054 * @brief
<> 144:ef7eb2e8f9f7 1055 * Get the current status of LESENSE.
<> 144:ef7eb2e8f9f7 1056 *
<> 144:ef7eb2e8f9f7 1057 * @return
<> 144:ef7eb2e8f9f7 1058 * This function returns the value of LESENSE_STATUS register that
<> 144:ef7eb2e8f9f7 1059 * contains the OR combination of the following status bits:
<> 144:ef7eb2e8f9f7 1060 * @li LESENSE_STATUS_RESV - Result data valid. Set when data is available
<> 144:ef7eb2e8f9f7 1061 * in the result buffer. Cleared when the buffer is empty.
<> 144:ef7eb2e8f9f7 1062 * @li LESENSE_STATUS_RESFULL - Result buffer full. Set when the result
<> 144:ef7eb2e8f9f7 1063 * buffer is full.
<> 144:ef7eb2e8f9f7 1064 * @li LESENSE_STATUS_RUNNING - LESENSE is active.
<> 144:ef7eb2e8f9f7 1065 * @li LESENSE_STATUS_SCANACTIVE - LESENSE is currently interfacing sensors.
<> 144:ef7eb2e8f9f7 1066 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1067 __STATIC_INLINE uint32_t LESENSE_StatusGet(void)
<> 144:ef7eb2e8f9f7 1068 {
<> 144:ef7eb2e8f9f7 1069 return LESENSE->STATUS;
<> 144:ef7eb2e8f9f7 1070 }
<> 144:ef7eb2e8f9f7 1071
<> 144:ef7eb2e8f9f7 1072
<> 144:ef7eb2e8f9f7 1073 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1074 * @brief
<> 144:ef7eb2e8f9f7 1075 * Wait until the status of LESENSE is equal to what requested.
<> 144:ef7eb2e8f9f7 1076 *
<> 144:ef7eb2e8f9f7 1077 * @details
<> 144:ef7eb2e8f9f7 1078 * This function is polling the LESENSE_STATUS register and waits until the
<> 144:ef7eb2e8f9f7 1079 * requested combination of flags are set.
<> 144:ef7eb2e8f9f7 1080 *
<> 144:ef7eb2e8f9f7 1081 * @param[in] flag
<> 144:ef7eb2e8f9f7 1082 * The OR combination of the following status bits:
<> 144:ef7eb2e8f9f7 1083 * @li LESENSE_STATUS_BUFDATAV - Result data valid. Set when data is available
<> 144:ef7eb2e8f9f7 1084 * in the result buffer. Cleared when the buffer is empty.
<> 144:ef7eb2e8f9f7 1085 * @li LESENSE_STATUS_BUFHALFFULL - Result buffer half full. Set when the
<> 144:ef7eb2e8f9f7 1086 * result buffer is half full.
<> 144:ef7eb2e8f9f7 1087 * @li LESENSE_STATUS_BUFFULL - Result buffer full. Set when the result
<> 144:ef7eb2e8f9f7 1088 * buffer is full.
<> 144:ef7eb2e8f9f7 1089 * @li LESENSE_STATUS_RUNNING - LESENSE is active.
<> 144:ef7eb2e8f9f7 1090 * @li LESENSE_STATUS_SCANACTIVE - LESENSE is currently interfacing sensors.
<> 144:ef7eb2e8f9f7 1091 * @li LESENSE_STATUS_DACACTIVE - The DAC interface is currently active.
<> 144:ef7eb2e8f9f7 1092 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1093 __STATIC_INLINE void LESENSE_StatusWait(uint32_t flag)
<> 144:ef7eb2e8f9f7 1094 {
<> 144:ef7eb2e8f9f7 1095 while (!(LESENSE->STATUS & flag))
<> 144:ef7eb2e8f9f7 1096 ;
<> 144:ef7eb2e8f9f7 1097 }
<> 144:ef7eb2e8f9f7 1098
<> 144:ef7eb2e8f9f7 1099
<> 144:ef7eb2e8f9f7 1100 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1101 * @brief
<> 144:ef7eb2e8f9f7 1102 * Get the currently active channel index.
<> 144:ef7eb2e8f9f7 1103 *
<> 144:ef7eb2e8f9f7 1104 * @return
<> 144:ef7eb2e8f9f7 1105 * This function returns the value of LESENSE_CHINDEX register that
<> 144:ef7eb2e8f9f7 1106 * contains the index of the currently active channel (0-15).
<> 144:ef7eb2e8f9f7 1107 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1108 __STATIC_INLINE uint32_t LESENSE_ChannelActiveGet(void)
<> 144:ef7eb2e8f9f7 1109 {
<> 144:ef7eb2e8f9f7 1110 return LESENSE->CURCH;
<> 144:ef7eb2e8f9f7 1111 }
<> 144:ef7eb2e8f9f7 1112
<> 144:ef7eb2e8f9f7 1113
<> 144:ef7eb2e8f9f7 1114 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1115 * @brief
<> 144:ef7eb2e8f9f7 1116 * Get the latest scan comparison result (1 bit / channel).
<> 144:ef7eb2e8f9f7 1117 *
<> 144:ef7eb2e8f9f7 1118 * @return
<> 144:ef7eb2e8f9f7 1119 * This function returns the value of LESENSE_SCANRES register that
<> 144:ef7eb2e8f9f7 1120 * contains the comparison result of the last scan on all channels.
<> 144:ef7eb2e8f9f7 1121 * Bit x is set if a comparison triggered on channel x, which means that the
<> 144:ef7eb2e8f9f7 1122 * LESENSE counter met the comparison criteria set in LESENSE_CHx_EVAL by
<> 144:ef7eb2e8f9f7 1123 * COMPMODE and CNTTHRES.
<> 144:ef7eb2e8f9f7 1124 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1125 __STATIC_INLINE uint32_t LESENSE_ScanResultGet(void)
<> 144:ef7eb2e8f9f7 1126 {
<> 144:ef7eb2e8f9f7 1127 return LESENSE->SCANRES;
<> 144:ef7eb2e8f9f7 1128 }
<> 144:ef7eb2e8f9f7 1129
<> 144:ef7eb2e8f9f7 1130
<> 144:ef7eb2e8f9f7 1131 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1132 * @brief
<> 144:ef7eb2e8f9f7 1133 * Get the oldest unread data from the result buffer.
<> 144:ef7eb2e8f9f7 1134 *
<> 144:ef7eb2e8f9f7 1135 * @note
<> 144:ef7eb2e8f9f7 1136 * Make sure that the STORERES bit is set in LESENSE_CHx_EVAL, or
<> 144:ef7eb2e8f9f7 1137 * STRSCANRES bit is set in LESENSE_CTRL, otherwise this function will return
<> 144:ef7eb2e8f9f7 1138 * undefined value.
<> 144:ef7eb2e8f9f7 1139 *
<> 144:ef7eb2e8f9f7 1140 * @return
<> 144:ef7eb2e8f9f7 1141 * This function returns the value of LESENSE_RESDATA register that
<> 144:ef7eb2e8f9f7 1142 * contains the oldest unread counter result from the result buffer.
<> 144:ef7eb2e8f9f7 1143 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1144 __STATIC_INLINE uint32_t LESENSE_ScanResultDataGet(void)
<> 144:ef7eb2e8f9f7 1145 {
<> 144:ef7eb2e8f9f7 1146 return LESENSE->BUFDATA;
<> 144:ef7eb2e8f9f7 1147 }
<> 144:ef7eb2e8f9f7 1148
<> 144:ef7eb2e8f9f7 1149
<> 144:ef7eb2e8f9f7 1150 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1151 * @brief
<> 144:ef7eb2e8f9f7 1152 * Get data from the result data buffer.
<> 144:ef7eb2e8f9f7 1153 *
<> 144:ef7eb2e8f9f7 1154 * @note
<> 144:ef7eb2e8f9f7 1155 * Make sure that the STORERES bit is set in LESENSE_CHx_EVAL, or
<> 144:ef7eb2e8f9f7 1156 * STRSCANRES bit is set in LESENSE_CTRL, otherwise this function will return
<> 144:ef7eb2e8f9f7 1157 * undefined value.
<> 144:ef7eb2e8f9f7 1158 *
<> 144:ef7eb2e8f9f7 1159 * @param[in] idx
<> 144:ef7eb2e8f9f7 1160 * Result data buffer index. Valid range: 0-15.
<> 144:ef7eb2e8f9f7 1161 *
<> 144:ef7eb2e8f9f7 1162 * @return
<> 144:ef7eb2e8f9f7 1163 * This function returns the selected word from the result data buffer.
<> 144:ef7eb2e8f9f7 1164 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1165 __STATIC_INLINE uint32_t LESENSE_ScanResultDataBufferGet(uint32_t idx)
<> 144:ef7eb2e8f9f7 1166 {
<> 144:ef7eb2e8f9f7 1167 /* Note: masking is needed to avoid over-indexing! */
<> 144:ef7eb2e8f9f7 1168 return LESENSE->BUF[idx & 0x0FU].DATA;
<> 144:ef7eb2e8f9f7 1169 }
<> 144:ef7eb2e8f9f7 1170
<> 144:ef7eb2e8f9f7 1171 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1172 * @brief
<> 144:ef7eb2e8f9f7 1173 * Get the current state of the LESENSE sensor.
<> 144:ef7eb2e8f9f7 1174 *
<> 144:ef7eb2e8f9f7 1175 * @return
<> 144:ef7eb2e8f9f7 1176 * This function returns the value of LESENSE_SENSORSTATE register that
<> 144:ef7eb2e8f9f7 1177 * represents the current state of the LESENSE sensor.
<> 144:ef7eb2e8f9f7 1178 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1179 __STATIC_INLINE uint32_t LESENSE_SensorStateGet(void)
<> 144:ef7eb2e8f9f7 1180 {
<> 144:ef7eb2e8f9f7 1181 return LESENSE->SENSORSTATE;
<> 144:ef7eb2e8f9f7 1182 }
<> 144:ef7eb2e8f9f7 1183
<> 144:ef7eb2e8f9f7 1184
<> 144:ef7eb2e8f9f7 1185 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1186 * @brief
<> 144:ef7eb2e8f9f7 1187 * Shut off power to the LESENSE RAM, disables LESENSE.
<> 144:ef7eb2e8f9f7 1188 *
<> 144:ef7eb2e8f9f7 1189 * @details
<> 144:ef7eb2e8f9f7 1190 * This function shuts off the LESENSE RAM in order to decrease the leakage
<> 144:ef7eb2e8f9f7 1191 * current of the mcu if LESENSE is not used in your application.
<> 144:ef7eb2e8f9f7 1192 *
<> 144:ef7eb2e8f9f7 1193 * @note
<> 144:ef7eb2e8f9f7 1194 * Warning! Once the LESENSE RAM is powered down, it cannot be powered up
<> 144:ef7eb2e8f9f7 1195 * again.
<> 144:ef7eb2e8f9f7 1196 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1197 __STATIC_INLINE void LESENSE_RAMPowerDown(void)
<> 144:ef7eb2e8f9f7 1198 {
<> 144:ef7eb2e8f9f7 1199 /* Power down LESENSE RAM */
<> 144:ef7eb2e8f9f7 1200 LESENSE->POWERDOWN = LESENSE_POWERDOWN_RAM;
<> 144:ef7eb2e8f9f7 1201 }
<> 144:ef7eb2e8f9f7 1202
<> 144:ef7eb2e8f9f7 1203
<> 144:ef7eb2e8f9f7 1204 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1205 * @brief
<> 144:ef7eb2e8f9f7 1206 * Clear one or more pending LESENSE interrupts.
<> 144:ef7eb2e8f9f7 1207 *
<> 144:ef7eb2e8f9f7 1208 * @param[in] flags
<> 144:ef7eb2e8f9f7 1209 * Pending LESENSE interrupt sources to clear. Use a set of interrupt flags
<> 144:ef7eb2e8f9f7 1210 * OR-ed together to clear multiple interrupt sources of the LESENSE module
<> 144:ef7eb2e8f9f7 1211 * (LESENSE_IF_nnn).
<> 144:ef7eb2e8f9f7 1212 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1213 __STATIC_INLINE void LESENSE_IntClear(uint32_t flags)
<> 144:ef7eb2e8f9f7 1214 {
<> 144:ef7eb2e8f9f7 1215 LESENSE->IFC = flags;
<> 144:ef7eb2e8f9f7 1216 }
<> 144:ef7eb2e8f9f7 1217
<> 144:ef7eb2e8f9f7 1218
<> 144:ef7eb2e8f9f7 1219 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1220 * @brief
<> 144:ef7eb2e8f9f7 1221 * Enable one or more LESENSE interrupts.
<> 144:ef7eb2e8f9f7 1222 *
<> 144:ef7eb2e8f9f7 1223 * @param[in] flags
<> 144:ef7eb2e8f9f7 1224 * LESENSE interrupt sources to enable. Use a set of interrupt flags OR-ed
<> 144:ef7eb2e8f9f7 1225 * together to enable multiple interrupt sources of the LESENSE module
<> 144:ef7eb2e8f9f7 1226 * (LESENSE_IF_nnn).
<> 144:ef7eb2e8f9f7 1227 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1228 __STATIC_INLINE void LESENSE_IntEnable(uint32_t flags)
<> 144:ef7eb2e8f9f7 1229 {
<> 144:ef7eb2e8f9f7 1230 LESENSE->IEN |= flags;
<> 144:ef7eb2e8f9f7 1231 }
<> 144:ef7eb2e8f9f7 1232
<> 144:ef7eb2e8f9f7 1233
<> 144:ef7eb2e8f9f7 1234 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1235 * @brief
<> 144:ef7eb2e8f9f7 1236 * Disable one or more LESENSE interrupts.
<> 144:ef7eb2e8f9f7 1237 *
<> 144:ef7eb2e8f9f7 1238 * @param[in] flags
<> 144:ef7eb2e8f9f7 1239 * LESENSE interrupt sources to disable. Use a set of interrupt flags OR-ed
<> 144:ef7eb2e8f9f7 1240 * together to disable multiple interrupt sources of the LESENSE module
<> 144:ef7eb2e8f9f7 1241 * (LESENSE_IF_nnn).
<> 144:ef7eb2e8f9f7 1242 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1243 __STATIC_INLINE void LESENSE_IntDisable(uint32_t flags)
<> 144:ef7eb2e8f9f7 1244 {
<> 144:ef7eb2e8f9f7 1245 LESENSE->IEN &= ~flags;
<> 144:ef7eb2e8f9f7 1246 }
<> 144:ef7eb2e8f9f7 1247
<> 144:ef7eb2e8f9f7 1248
<> 144:ef7eb2e8f9f7 1249 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1250 * @brief
<> 144:ef7eb2e8f9f7 1251 * Set one or more pending LESENSE interrupts from SW.
<> 144:ef7eb2e8f9f7 1252 *
<> 144:ef7eb2e8f9f7 1253 * @param[in] flags
<> 144:ef7eb2e8f9f7 1254 * LESENSE interrupt sources to set to pending. Use a set of interrupt
<> 144:ef7eb2e8f9f7 1255 * flags OR-ed together to set multiple interrupt sources of the LESENSE
<> 144:ef7eb2e8f9f7 1256 * module (LESENSE_IFS_nnn).
<> 144:ef7eb2e8f9f7 1257 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1258 __STATIC_INLINE void LESENSE_IntSet(uint32_t flags)
<> 144:ef7eb2e8f9f7 1259 {
<> 144:ef7eb2e8f9f7 1260 LESENSE->IFS = flags;
<> 144:ef7eb2e8f9f7 1261 }
<> 144:ef7eb2e8f9f7 1262
<> 144:ef7eb2e8f9f7 1263
<> 144:ef7eb2e8f9f7 1264 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1265 * @brief
<> 144:ef7eb2e8f9f7 1266 * Get pending LESENSE interrupt flags.
<> 144:ef7eb2e8f9f7 1267 *
<> 144:ef7eb2e8f9f7 1268 * @note
<> 144:ef7eb2e8f9f7 1269 * The event bits are not cleared by the use of this function.
<> 144:ef7eb2e8f9f7 1270 *
<> 144:ef7eb2e8f9f7 1271 * @return
<> 144:ef7eb2e8f9f7 1272 * Pending LESENSE interrupt sources. The OR combination of valid interrupt
<> 144:ef7eb2e8f9f7 1273 * flags of the LESENSE module (LESENSE_IF_nnn).
<> 144:ef7eb2e8f9f7 1274 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1275 __STATIC_INLINE uint32_t LESENSE_IntGet(void)
<> 144:ef7eb2e8f9f7 1276 {
<> 144:ef7eb2e8f9f7 1277 return LESENSE->IF;
<> 144:ef7eb2e8f9f7 1278 }
<> 144:ef7eb2e8f9f7 1279
<> 144:ef7eb2e8f9f7 1280
<> 144:ef7eb2e8f9f7 1281 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 1282 * @brief
<> 144:ef7eb2e8f9f7 1283 * Get enabled and pending LESENSE interrupt flags.
<> 144:ef7eb2e8f9f7 1284 *
<> 144:ef7eb2e8f9f7 1285 * @details
<> 144:ef7eb2e8f9f7 1286 * Useful for handling more interrupt sources in the same interrupt handler.
<> 144:ef7eb2e8f9f7 1287 *
<> 144:ef7eb2e8f9f7 1288 * @note
<> 144:ef7eb2e8f9f7 1289 * The event bits are not cleared by the use of this function.
<> 144:ef7eb2e8f9f7 1290 *
<> 144:ef7eb2e8f9f7 1291 * @return
<> 144:ef7eb2e8f9f7 1292 * Pending and enabled LESENSE interrupt sources.
<> 144:ef7eb2e8f9f7 1293 * The return value is the bitwise AND combination of
<> 144:ef7eb2e8f9f7 1294 * - the OR combination of enabled interrupt sources in LESENSE_IEN_nnn
<> 144:ef7eb2e8f9f7 1295 * register (LESENSE_IEN_nnn) and
<> 144:ef7eb2e8f9f7 1296 * - the OR combination of valid interrupt flags of the LESENSE module
<> 144:ef7eb2e8f9f7 1297 * (LESENSE_IF_nnn).
<> 144:ef7eb2e8f9f7 1298 ******************************************************************************/
<> 144:ef7eb2e8f9f7 1299 __STATIC_INLINE uint32_t LESENSE_IntGetEnabled(void)
<> 144:ef7eb2e8f9f7 1300 {
<> 144:ef7eb2e8f9f7 1301 uint32_t tmp;
<> 144:ef7eb2e8f9f7 1302
<> 144:ef7eb2e8f9f7 1303 /* Store LESENSE->IEN in temporary variable in order to define explicit order
<> 144:ef7eb2e8f9f7 1304 * of volatile accesses. */
<> 144:ef7eb2e8f9f7 1305 tmp = LESENSE->IEN;
<> 144:ef7eb2e8f9f7 1306
<> 144:ef7eb2e8f9f7 1307 /* Bitwise AND of pending and enabled interrupts */
<> 144:ef7eb2e8f9f7 1308 return LESENSE->IF & tmp;
<> 144:ef7eb2e8f9f7 1309 }
<> 144:ef7eb2e8f9f7 1310
<> 144:ef7eb2e8f9f7 1311
<> 144:ef7eb2e8f9f7 1312 /** @} (end addtogroup LESENSE) */
<> 144:ef7eb2e8f9f7 1313 /** @} (end addtogroup EM_Library) */
<> 144:ef7eb2e8f9f7 1314
<> 144:ef7eb2e8f9f7 1315 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 1316 }
<> 144:ef7eb2e8f9f7 1317 #endif
<> 144:ef7eb2e8f9f7 1318
<> 144:ef7eb2e8f9f7 1319 #endif /* defined(LESENSE_COUNT) && (LESENSE_COUNT > 0) */
<> 144:ef7eb2e8f9f7 1320
<> 144:ef7eb2e8f9f7 1321 #endif /* __SILICON_LABS_EM_LESENSE_H__ */