Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_flexio_i2s.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30 #ifndef _FSL_FLEXIO_I2S_H_
<> 144:ef7eb2e8f9f7 31 #define _FSL_FLEXIO_I2S_H_
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "fsl_common.h"
<> 144:ef7eb2e8f9f7 34 #include "fsl_flexio.h"
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /*!
<> 144:ef7eb2e8f9f7 37 * @addtogroup flexio_i2s
<> 144:ef7eb2e8f9f7 38 * @{
<> 144:ef7eb2e8f9f7 39 */
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 /*! @file */
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /*******************************************************************************
<> 144:ef7eb2e8f9f7 44 * Definitions
<> 144:ef7eb2e8f9f7 45 ******************************************************************************/
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /*! @name Driver version */
<> 144:ef7eb2e8f9f7 48 /*@{*/
<> 144:ef7eb2e8f9f7 49 /*! @brief FlexIO I2S driver version 2.1.0. */
<> 144:ef7eb2e8f9f7 50 #define FSL_FLEXIO_I2S_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
<> 144:ef7eb2e8f9f7 51 /*@}*/
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /*! @brief FlexIO I2S transfer status */
<> 144:ef7eb2e8f9f7 54 enum _flexio_i2s_status
<> 144:ef7eb2e8f9f7 55 {
<> 144:ef7eb2e8f9f7 56 kStatus_FLEXIO_I2S_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 0), /*!< FlexIO I2S is in idle state */
<> 144:ef7eb2e8f9f7 57 kStatus_FLEXIO_I2S_TxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 1), /*!< FlexIO I2S Tx is busy */
<> 144:ef7eb2e8f9f7 58 kStatus_FLEXIO_I2S_RxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 2), /*!< FlexIO I2S Tx is busy */
<> 144:ef7eb2e8f9f7 59 kStatus_FLEXIO_I2S_Error = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 3), /*!< FlexIO I2S error occurred */
<> 144:ef7eb2e8f9f7 60 kStatus_FLEXIO_I2S_QueueFull = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 4), /*!< FlexIO I2S transfer queue is full. */
<> 144:ef7eb2e8f9f7 61 };
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /*! @brief Define FlexIO I2S access structure typedef */
<> 144:ef7eb2e8f9f7 64 typedef struct _flexio_i2s_type
<> 144:ef7eb2e8f9f7 65 {
<> 144:ef7eb2e8f9f7 66 FLEXIO_Type *flexioBase; /*!< FlexIO base pointer */
<> 144:ef7eb2e8f9f7 67 uint8_t txPinIndex; /*!< Tx data pin index in FlexIO pins */
<> 144:ef7eb2e8f9f7 68 uint8_t rxPinIndex; /*!< Rx data pin index */
<> 144:ef7eb2e8f9f7 69 uint8_t bclkPinIndex; /*!< Bit clock pin index */
<> 144:ef7eb2e8f9f7 70 uint8_t fsPinIndex; /*!< Frame sync pin index */
<> 144:ef7eb2e8f9f7 71 uint8_t txShifterIndex; /*!< Tx data shifter index */
<> 144:ef7eb2e8f9f7 72 uint8_t rxShifterIndex; /*!< Rx data shifter index */
<> 144:ef7eb2e8f9f7 73 uint8_t bclkTimerIndex; /*!< Bit clock timer index */
<> 144:ef7eb2e8f9f7 74 uint8_t fsTimerIndex; /*!< Frame sync timer index */
<> 144:ef7eb2e8f9f7 75 } FLEXIO_I2S_Type;
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /*! @brief Master or slave mode */
<> 144:ef7eb2e8f9f7 78 typedef enum _flexio_i2s_master_slave
<> 144:ef7eb2e8f9f7 79 {
<> 144:ef7eb2e8f9f7 80 kFLEXIO_I2S_Master = 0x0U, /*!< Master mode */
<> 144:ef7eb2e8f9f7 81 kFLEXIO_I2S_Slave = 0x1U /*!< Slave mode */
<> 144:ef7eb2e8f9f7 82 } flexio_i2s_master_slave_t;
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /*! @brief Define FlexIO FlexIO I2S interrupt mask. */
<> 144:ef7eb2e8f9f7 85 enum _flexio_i2s_interrupt_enable
<> 144:ef7eb2e8f9f7 86 {
<> 144:ef7eb2e8f9f7 87 kFLEXIO_I2S_TxDataRegEmptyInterruptEnable = 0x1U, /*!< Transmit buffer empty interrupt enable. */
<> 144:ef7eb2e8f9f7 88 kFLEXIO_I2S_RxDataRegFullInterruptEnable = 0x2U, /*!< Receive buffer full interrupt enable. */
<> 144:ef7eb2e8f9f7 89 };
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 /*! @brief Define FlexIO FlexIO I2S status mask. */
<> 144:ef7eb2e8f9f7 92 enum _flexio_i2s_status_flags
<> 144:ef7eb2e8f9f7 93 {
<> 144:ef7eb2e8f9f7 94 kFLEXIO_I2S_TxDataRegEmptyFlag = 0x1U, /*!< Transmit buffer empty flag. */
<> 144:ef7eb2e8f9f7 95 kFLEXIO_I2S_RxDataRegFullFlag = 0x2U, /*!< Receive buffer full flag. */
<> 144:ef7eb2e8f9f7 96 };
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 /*! @brief FlexIO I2S configure structure */
<> 144:ef7eb2e8f9f7 99 typedef struct _flexio_i2s_config
<> 144:ef7eb2e8f9f7 100 {
<> 144:ef7eb2e8f9f7 101 bool enableI2S; /*!< Enable FlexIO I2S */
<> 144:ef7eb2e8f9f7 102 flexio_i2s_master_slave_t masterSlave; /*!< Master or slave */
<> 144:ef7eb2e8f9f7 103 } flexio_i2s_config_t;
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 /*! @brief FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx */
<> 144:ef7eb2e8f9f7 106 typedef struct _flexio_i2s_format
<> 144:ef7eb2e8f9f7 107 {
<> 144:ef7eb2e8f9f7 108 uint8_t bitWidth; /*!< Bit width of audio data, always 8/16/24/32 bits */
<> 144:ef7eb2e8f9f7 109 uint32_t sampleRate_Hz; /*!< Sample rate of the audio data */
<> 144:ef7eb2e8f9f7 110 } flexio_i2s_format_t;
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 /*!@brief FlexIO I2S transfer queue size, user can refine it according to use case. */
<> 144:ef7eb2e8f9f7 113 #define FLEXIO_I2S_XFER_QUEUE_SIZE (4)
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 /*! @brief Audio sample rate */
<> 144:ef7eb2e8f9f7 116 typedef enum _flexio_i2s_sample_rate
<> 144:ef7eb2e8f9f7 117 {
<> 144:ef7eb2e8f9f7 118 kFLEXIO_I2S_SampleRate8KHz = 8000U, /*!< Sample rate 8000Hz */
<> 144:ef7eb2e8f9f7 119 kFLEXIO_I2S_SampleRate11025Hz = 11025U, /*!< Sample rate 11025Hz */
<> 144:ef7eb2e8f9f7 120 kFLEXIO_I2S_SampleRate12KHz = 12000U, /*!< Sample rate 12000Hz */
<> 144:ef7eb2e8f9f7 121 kFLEXIO_I2S_SampleRate16KHz = 16000U, /*!< Sample rate 16000Hz */
<> 144:ef7eb2e8f9f7 122 kFLEXIO_I2S_SampleRate22050Hz = 22050U, /*!< Sample rate 22050Hz */
<> 144:ef7eb2e8f9f7 123 kFLEXIO_I2S_SampleRate24KHz = 24000U, /*!< Sample rate 24000Hz */
<> 144:ef7eb2e8f9f7 124 kFLEXIO_I2S_SampleRate32KHz = 32000U, /*!< Sample rate 32000Hz */
<> 144:ef7eb2e8f9f7 125 kFLEXIO_I2S_SampleRate44100Hz = 44100U, /*!< Sample rate 44100Hz */
<> 144:ef7eb2e8f9f7 126 kFLEXIO_I2S_SampleRate48KHz = 48000U, /*!< Sample rate 48000Hz */
<> 144:ef7eb2e8f9f7 127 kFLEXIO_I2S_SampleRate96KHz = 96000U /*!< Sample rate 96000Hz */
<> 144:ef7eb2e8f9f7 128 } flexio_i2s_sample_rate_t;
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /*! @brief Audio word width */
<> 144:ef7eb2e8f9f7 131 typedef enum _flexio_i2s_word_width
<> 144:ef7eb2e8f9f7 132 {
<> 144:ef7eb2e8f9f7 133 kFLEXIO_I2S_WordWidth8bits = 8U, /*!< Audio data width 8 bits */
<> 144:ef7eb2e8f9f7 134 kFLEXIO_I2S_WordWidth16bits = 16U, /*!< Audio data width 16 bits */
<> 144:ef7eb2e8f9f7 135 kFLEXIO_I2S_WordWidth24bits = 24U, /*!< Audio data width 24 bits */
<> 144:ef7eb2e8f9f7 136 kFLEXIO_I2S_WordWidth32bits = 32U /*!< Audio data width 32 bits */
<> 144:ef7eb2e8f9f7 137 } flexio_i2s_word_width_t;
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 /*! @brief Define FlexIO I2S transfer structure. */
<> 144:ef7eb2e8f9f7 140 typedef struct _flexio_i2s_transfer
<> 144:ef7eb2e8f9f7 141 {
<> 144:ef7eb2e8f9f7 142 uint8_t *data; /*!< Data buffer start pointer */
<> 144:ef7eb2e8f9f7 143 size_t dataSize; /*!< Bytes to be transferred. */
<> 144:ef7eb2e8f9f7 144 } flexio_i2s_transfer_t;
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 typedef struct _flexio_i2s_handle flexio_i2s_handle_t;
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /*! @brief FlexIO I2S xfer callback prototype */
<> 144:ef7eb2e8f9f7 149 typedef void (*flexio_i2s_callback_t)(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 150 flexio_i2s_handle_t *handle,
<> 144:ef7eb2e8f9f7 151 status_t status,
<> 144:ef7eb2e8f9f7 152 void *userData);
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /*! @brief Define FlexIO I2S handle structure. */
<> 144:ef7eb2e8f9f7 155 struct _flexio_i2s_handle
<> 144:ef7eb2e8f9f7 156 {
<> 144:ef7eb2e8f9f7 157 uint32_t state; /*!< Internal state */
<> 144:ef7eb2e8f9f7 158 flexio_i2s_callback_t callback; /*!< Callback function called at transfer event*/
<> 144:ef7eb2e8f9f7 159 void *userData; /*!< Callback parameter passed to callback function*/
<> 144:ef7eb2e8f9f7 160 uint8_t bitWidth; /*!< Bit width for transfer, 8/16/24/32bits */
<> 144:ef7eb2e8f9f7 161 flexio_i2s_transfer_t queue[FLEXIO_I2S_XFER_QUEUE_SIZE]; /*!< Transfer queue storing queued transfer */
<> 144:ef7eb2e8f9f7 162 size_t transferSize[FLEXIO_I2S_XFER_QUEUE_SIZE]; /*!< Data bytes need to transfer */
<> 144:ef7eb2e8f9f7 163 volatile uint8_t queueUser; /*!< Index for user to queue transfer */
<> 144:ef7eb2e8f9f7 164 volatile uint8_t queueDriver; /*!< Index for driver to get the transfer data and size */
<> 144:ef7eb2e8f9f7 165 };
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 /*******************************************************************************
<> 144:ef7eb2e8f9f7 168 * API
<> 144:ef7eb2e8f9f7 169 ******************************************************************************/
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 172 extern "C" {
<> 144:ef7eb2e8f9f7 173 #endif /*_cplusplus*/
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /*!
<> 144:ef7eb2e8f9f7 176 * @name Initialization and deinitialization
<> 144:ef7eb2e8f9f7 177 * @{
<> 144:ef7eb2e8f9f7 178 */
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /*!
<> 144:ef7eb2e8f9f7 181 * @brief Initializes the FlexIO I2S.
<> 144:ef7eb2e8f9f7 182 *
<> 144:ef7eb2e8f9f7 183 * This API configures FlexIO pins and shifter to I2S and configure FlexIO I2S with configuration structure.
<> 144:ef7eb2e8f9f7 184 * The configuration structure can be filled by the user, or be set with default values by
<> 144:ef7eb2e8f9f7 185 * FLEXIO_I2S_GetDefaultConfig().
<> 144:ef7eb2e8f9f7 186 *
<> 144:ef7eb2e8f9f7 187 * @note This API should be called at the beginning of the application to use
<> 144:ef7eb2e8f9f7 188 * the FlexIO I2S driver, or any access to the FlexIO I2S module could cause hard fault
<> 144:ef7eb2e8f9f7 189 * because clock is not enabled.
<> 144:ef7eb2e8f9f7 190 *
<> 144:ef7eb2e8f9f7 191 * @param base FlexIO I2S base pointer
<> 144:ef7eb2e8f9f7 192 * @param config FlexIO I2S configure structure.
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194 void FLEXIO_I2S_Init(FLEXIO_I2S_Type *base, const flexio_i2s_config_t *config);
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /*!
<> 144:ef7eb2e8f9f7 197 * @brief Sets the FlexIO I2S configuration structure to default values.
<> 144:ef7eb2e8f9f7 198 *
<> 144:ef7eb2e8f9f7 199 * The purpose of this API is to get the configuration structure initialized for use in FLEXIO_I2S_Init().
<> 144:ef7eb2e8f9f7 200 * User may use the initialized structure unchanged in FLEXIO_I2S_Init(), or modify
<> 144:ef7eb2e8f9f7 201 * some fields of the structure before calling FLEXIO_I2S_Init().
<> 144:ef7eb2e8f9f7 202 *
<> 144:ef7eb2e8f9f7 203 * @param config pointer to master configuration structure
<> 144:ef7eb2e8f9f7 204 */
<> 144:ef7eb2e8f9f7 205 void FLEXIO_I2S_GetDefaultConfig(flexio_i2s_config_t *config);
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /*!
<> 144:ef7eb2e8f9f7 208 * @brief De-initializes the FlexIO I2S.
<> 144:ef7eb2e8f9f7 209 *
<> 144:ef7eb2e8f9f7 210 * Calling this API gates the FlexIO i2s clock. After calling this API, call the FLEXO_I2S_Init to use the
<> 144:ef7eb2e8f9f7 211 * FlexIO I2S module.
<> 144:ef7eb2e8f9f7 212 *
<> 144:ef7eb2e8f9f7 213 * @param base FlexIO I2S base pointer
<> 144:ef7eb2e8f9f7 214 */
<> 144:ef7eb2e8f9f7 215 void FLEXIO_I2S_Deinit(FLEXIO_I2S_Type *base);
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 /*!
<> 144:ef7eb2e8f9f7 218 * @brief Enables/disables the FlexIO I2S module operation.
<> 144:ef7eb2e8f9f7 219 *
<> 144:ef7eb2e8f9f7 220 * @param base pointer to FLEXIO_I2S_Type
<> 144:ef7eb2e8f9f7 221 * @param enable True to enable, false to disable.
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223 static inline void FLEXIO_I2S_Enable(FLEXIO_I2S_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 224 {
<> 144:ef7eb2e8f9f7 225 if (enable)
<> 144:ef7eb2e8f9f7 226 {
<> 144:ef7eb2e8f9f7 227 base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
<> 144:ef7eb2e8f9f7 228 }
<> 144:ef7eb2e8f9f7 229 else
<> 144:ef7eb2e8f9f7 230 {
<> 144:ef7eb2e8f9f7 231 base->flexioBase->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK;
<> 144:ef7eb2e8f9f7 232 }
<> 144:ef7eb2e8f9f7 233 }
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /*! @} */
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /*!
<> 144:ef7eb2e8f9f7 238 * @name Status
<> 144:ef7eb2e8f9f7 239 * @{
<> 144:ef7eb2e8f9f7 240 */
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 /*!
<> 144:ef7eb2e8f9f7 243 * @brief Gets the FlexIO I2S status flags.
<> 144:ef7eb2e8f9f7 244 *
<> 144:ef7eb2e8f9f7 245 * @param base pointer to FLEXIO_I2S_Type structure
<> 144:ef7eb2e8f9f7 246 * @return Status flag, which are ORed by the enumerators in the _flexio_i2s_status_flags.
<> 144:ef7eb2e8f9f7 247 */
<> 144:ef7eb2e8f9f7 248 uint32_t FLEXIO_I2S_GetStatusFlags(FLEXIO_I2S_Type *base);
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /*! @} */
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /*!
<> 144:ef7eb2e8f9f7 253 * @name Interrupts
<> 144:ef7eb2e8f9f7 254 * @{
<> 144:ef7eb2e8f9f7 255 */
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 /*!
<> 144:ef7eb2e8f9f7 258 * @brief Enables the FlexIO I2S interrupt.
<> 144:ef7eb2e8f9f7 259 *
<> 144:ef7eb2e8f9f7 260 * This function enables the FlexIO UART interrupt.
<> 144:ef7eb2e8f9f7 261 *
<> 144:ef7eb2e8f9f7 262 * @param base pointer to FLEXIO_I2S_Type structure
<> 144:ef7eb2e8f9f7 263 * @param mask interrupt source
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265 void FLEXIO_I2S_EnableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 /*!
<> 144:ef7eb2e8f9f7 268 * @brief Disables the FlexIO I2S interrupt.
<> 144:ef7eb2e8f9f7 269 *
<> 144:ef7eb2e8f9f7 270 * This function enables the FlexIO UART interrupt.
<> 144:ef7eb2e8f9f7 271 *
<> 144:ef7eb2e8f9f7 272 * @param base pointer to FLEXIO_I2S_Type structure
<> 144:ef7eb2e8f9f7 273 * @param mask interrupt source
<> 144:ef7eb2e8f9f7 274 */
<> 144:ef7eb2e8f9f7 275 void FLEXIO_I2S_DisableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /*! @} */
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 /*!
<> 144:ef7eb2e8f9f7 280 * @name DMA Control
<> 144:ef7eb2e8f9f7 281 * @{
<> 144:ef7eb2e8f9f7 282 */
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /*!
<> 144:ef7eb2e8f9f7 285 * @brief Enables/disables the FlexIO I2S Tx DMA requests.
<> 144:ef7eb2e8f9f7 286 *
<> 144:ef7eb2e8f9f7 287 * @param base FlexIO I2S base pointer
<> 144:ef7eb2e8f9f7 288 * @param enable True means enable DMA, false means disable DMA.
<> 144:ef7eb2e8f9f7 289 */
<> 144:ef7eb2e8f9f7 290 static inline void FLEXIO_I2S_TxEnableDMA(FLEXIO_I2S_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 291 {
<> 144:ef7eb2e8f9f7 292 FLEXIO_EnableShifterStatusDMA(base->flexioBase, 1 << base->txShifterIndex, enable);
<> 144:ef7eb2e8f9f7 293 }
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /*!
<> 144:ef7eb2e8f9f7 296 * @brief Enables/disables the FlexIO I2S Rx DMA requests.
<> 144:ef7eb2e8f9f7 297 *
<> 144:ef7eb2e8f9f7 298 * @param base FlexIO I2S base pointer
<> 144:ef7eb2e8f9f7 299 * @param enable True means enable DMA, false means disable DMA.
<> 144:ef7eb2e8f9f7 300 */
<> 144:ef7eb2e8f9f7 301 static inline void FLEXIO_I2S_RxEnableDMA(FLEXIO_I2S_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 302 {
<> 144:ef7eb2e8f9f7 303 FLEXIO_EnableShifterStatusDMA(base->flexioBase, 1 << base->rxShifterIndex, enable);
<> 144:ef7eb2e8f9f7 304 }
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /*!
<> 144:ef7eb2e8f9f7 307 * @brief Gets the FlexIO I2S send data register address.
<> 144:ef7eb2e8f9f7 308 *
<> 144:ef7eb2e8f9f7 309 * This function returns the I2S data register address, mainly used by DMA/eDMA.
<> 144:ef7eb2e8f9f7 310 *
<> 144:ef7eb2e8f9f7 311 * @param base pointer to FLEXIO_I2S_Type structure
<> 144:ef7eb2e8f9f7 312 * @return FlexIO i2s send data register address.
<> 144:ef7eb2e8f9f7 313 */
<> 144:ef7eb2e8f9f7 314 static inline uint32_t FLEXIO_I2S_TxGetDataRegisterAddress(FLEXIO_I2S_Type *base)
<> 144:ef7eb2e8f9f7 315 {
<> 144:ef7eb2e8f9f7 316 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped, base->txShifterIndex);
<> 144:ef7eb2e8f9f7 317 }
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /*!
<> 144:ef7eb2e8f9f7 320 * @brief Gets the FlexIO I2S receive data register address.
<> 144:ef7eb2e8f9f7 321 *
<> 144:ef7eb2e8f9f7 322 * This function returns the I2S data register address, mainly used by DMA/eDMA.
<> 144:ef7eb2e8f9f7 323 *
<> 144:ef7eb2e8f9f7 324 * @param base pointer to FLEXIO_I2S_Type structure
<> 144:ef7eb2e8f9f7 325 * @return FlexIO i2s receive data register address.
<> 144:ef7eb2e8f9f7 326 */
<> 144:ef7eb2e8f9f7 327 static inline uint32_t FLEXIO_I2S_RxGetDataRegisterAddress(FLEXIO_I2S_Type *base)
<> 144:ef7eb2e8f9f7 328 {
<> 144:ef7eb2e8f9f7 329 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped, base->rxShifterIndex);
<> 144:ef7eb2e8f9f7 330 }
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 /*! @} */
<> 144:ef7eb2e8f9f7 333
<> 144:ef7eb2e8f9f7 334 /*!
<> 144:ef7eb2e8f9f7 335 * @name Bus Operations
<> 144:ef7eb2e8f9f7 336 * @{
<> 144:ef7eb2e8f9f7 337 */
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /*!
<> 144:ef7eb2e8f9f7 340 * @brief Configures the FlexIO I2S audio format in master mode.
<> 144:ef7eb2e8f9f7 341 *
<> 144:ef7eb2e8f9f7 342 * Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data
<> 144:ef7eb2e8f9f7 343 * format to be transferred.
<> 144:ef7eb2e8f9f7 344 *
<> 144:ef7eb2e8f9f7 345 * @param base pointer to FLEXIO_I2S_Type structure
<> 144:ef7eb2e8f9f7 346 * @param format Pointer to FlexIO I2S audio data format structure.
<> 144:ef7eb2e8f9f7 347 * @param srcClock_Hz I2S master clock source frequency in Hz.
<> 144:ef7eb2e8f9f7 348 */
<> 144:ef7eb2e8f9f7 349 void FLEXIO_I2S_MasterSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format, uint32_t srcClock_Hz);
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /*!
<> 144:ef7eb2e8f9f7 352 * @brief Configures the FlexIO I2S audio format in slave mode.
<> 144:ef7eb2e8f9f7 353 *
<> 144:ef7eb2e8f9f7 354 * Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data
<> 144:ef7eb2e8f9f7 355 * format to be transferred.
<> 144:ef7eb2e8f9f7 356 *
<> 144:ef7eb2e8f9f7 357 * @param base pointer to FLEXIO_I2S_Type structure
<> 144:ef7eb2e8f9f7 358 * @param format Pointer to FlexIO I2S audio data format structure.
<> 144:ef7eb2e8f9f7 359 */
<> 144:ef7eb2e8f9f7 360 void FLEXIO_I2S_SlaveSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format);
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /*!
<> 144:ef7eb2e8f9f7 363 * @brief Sends a piece of data using a blocking method.
<> 144:ef7eb2e8f9f7 364 *
<> 144:ef7eb2e8f9f7 365 * @note This function blocks via polling until data is ready to be sent.
<> 144:ef7eb2e8f9f7 366 *
<> 144:ef7eb2e8f9f7 367 * @param base FlexIO I2S base pointer.
<> 144:ef7eb2e8f9f7 368 * @param bitWidth How many bits in a audio word, usually 8/16/24/32 bits.
<> 144:ef7eb2e8f9f7 369 * @param txData Pointer to the data to be written.
<> 144:ef7eb2e8f9f7 370 * @param size Bytes to be written.
<> 144:ef7eb2e8f9f7 371 */
<> 144:ef7eb2e8f9f7 372 void FLEXIO_I2S_WriteBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *txData, size_t size);
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 /*!
<> 144:ef7eb2e8f9f7 375 * @brief Writes a data into data register.
<> 144:ef7eb2e8f9f7 376 *
<> 144:ef7eb2e8f9f7 377 * @param base FlexIO I2S base pointer.
<> 144:ef7eb2e8f9f7 378 * @param bitWidth How many bits in a audio word, usually 8/16/24/32 bits.
<> 144:ef7eb2e8f9f7 379 * @param data Data to be written.
<> 144:ef7eb2e8f9f7 380 */
<> 144:ef7eb2e8f9f7 381 static inline void FLEXIO_I2S_WriteData(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint32_t data)
<> 144:ef7eb2e8f9f7 382 {
<> 144:ef7eb2e8f9f7 383 base->flexioBase->SHIFTBUFBIS[base->txShifterIndex] = (data << (32U - bitWidth));
<> 144:ef7eb2e8f9f7 384 }
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386 /*!
<> 144:ef7eb2e8f9f7 387 * @brief Receives a piece of data using a blocking method.
<> 144:ef7eb2e8f9f7 388 *
<> 144:ef7eb2e8f9f7 389 * @note This function blocks via polling until data is ready to be sent.
<> 144:ef7eb2e8f9f7 390 *
<> 144:ef7eb2e8f9f7 391 * @param base FlexIO I2S base pointer
<> 144:ef7eb2e8f9f7 392 * @param bitWidth How many bits in a audio word, usually 8/16/24/32 bits.
<> 144:ef7eb2e8f9f7 393 * @param rxData Pointer to the data to be read.
<> 144:ef7eb2e8f9f7 394 * @param size Bytes to be read.
<> 144:ef7eb2e8f9f7 395 */
<> 144:ef7eb2e8f9f7 396 void FLEXIO_I2S_ReadBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *rxData, size_t size);
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 /*!
<> 144:ef7eb2e8f9f7 399 * @brief Reads a data from the data register.
<> 144:ef7eb2e8f9f7 400 *
<> 144:ef7eb2e8f9f7 401 * @param base FlexIO I2S base pointer
<> 144:ef7eb2e8f9f7 402 * @return Data read from data register.
<> 144:ef7eb2e8f9f7 403 */
<> 144:ef7eb2e8f9f7 404 static inline uint32_t FLEXIO_I2S_ReadData(FLEXIO_I2S_Type *base)
<> 144:ef7eb2e8f9f7 405 {
<> 144:ef7eb2e8f9f7 406 return base->flexioBase->SHIFTBUFBIS[base->rxShifterIndex];
<> 144:ef7eb2e8f9f7 407 }
<> 144:ef7eb2e8f9f7 408
<> 144:ef7eb2e8f9f7 409 /*! @} */
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411 /*!
<> 144:ef7eb2e8f9f7 412 * @name Transactional
<> 144:ef7eb2e8f9f7 413 * @{
<> 144:ef7eb2e8f9f7 414 */
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 /*!
<> 144:ef7eb2e8f9f7 417 * @brief Initializes the FlexIO I2S handle.
<> 144:ef7eb2e8f9f7 418 *
<> 144:ef7eb2e8f9f7 419 * This function initializes the FlexIO I2S handle which can be used for other
<> 144:ef7eb2e8f9f7 420 * FlexIO I2S transactional APIs. Call this API once to get the
<> 144:ef7eb2e8f9f7 421 * initialized handle.
<> 144:ef7eb2e8f9f7 422 *
<> 144:ef7eb2e8f9f7 423 * @param base pointer to FLEXIO_I2S_Type structure
<> 144:ef7eb2e8f9f7 424 * @param handle pointer to flexio_i2s_handle_t structure to store the transfer state.
<> 144:ef7eb2e8f9f7 425 * @param callback FlexIO I2S callback function, which is called while finished a block.
<> 144:ef7eb2e8f9f7 426 * @param userData User parameter for the FlexIO I2S callback.
<> 144:ef7eb2e8f9f7 427 */
<> 144:ef7eb2e8f9f7 428 void FLEXIO_I2S_TransferTxCreateHandle(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 429 flexio_i2s_handle_t *handle,
<> 144:ef7eb2e8f9f7 430 flexio_i2s_callback_t callback,
<> 144:ef7eb2e8f9f7 431 void *userData);
<> 144:ef7eb2e8f9f7 432
<> 144:ef7eb2e8f9f7 433 /*!
<> 144:ef7eb2e8f9f7 434 * @brief Configures the FlexIO I2S audio format.
<> 144:ef7eb2e8f9f7 435 *
<> 144:ef7eb2e8f9f7 436 * Audio format can be changed in run-time of FlexIO i2s. This function configures the sample rate and audio data
<> 144:ef7eb2e8f9f7 437 * format to be transferred.
<> 144:ef7eb2e8f9f7 438 *
<> 144:ef7eb2e8f9f7 439 * @param base pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 440 * @param handle FlexIO I2S handle pointer.
<> 144:ef7eb2e8f9f7 441 * @param format Pointer to audio data format structure.
<> 144:ef7eb2e8f9f7 442 * @param srcClock_Hz FlexIO I2S bit clock source frequency in Hz. This parameter should be 0 while in slave mode.
<> 144:ef7eb2e8f9f7 443 */
<> 144:ef7eb2e8f9f7 444 void FLEXIO_I2S_TransferSetFormat(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 445 flexio_i2s_handle_t *handle,
<> 144:ef7eb2e8f9f7 446 flexio_i2s_format_t *format,
<> 144:ef7eb2e8f9f7 447 uint32_t srcClock_Hz);
<> 144:ef7eb2e8f9f7 448
<> 144:ef7eb2e8f9f7 449 /*!
<> 144:ef7eb2e8f9f7 450 * @brief Initializes the FlexIO I2S receive handle.
<> 144:ef7eb2e8f9f7 451 *
<> 144:ef7eb2e8f9f7 452 * This function initializes the FlexIO I2S handle which can be used for other
<> 144:ef7eb2e8f9f7 453 * FlexIO I2S transactional APIs. Usually, user only need to call this API once to get the
<> 144:ef7eb2e8f9f7 454 * initialized handle.
<> 144:ef7eb2e8f9f7 455 *
<> 144:ef7eb2e8f9f7 456 * @param base pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 457 * @param handle pointer to flexio_i2s_handle_t structure to store the transfer state.
<> 144:ef7eb2e8f9f7 458 * @param callback FlexIO I2S callback function, which is called while finished a block.
<> 144:ef7eb2e8f9f7 459 * @param userData User parameter for the FlexIO I2S callback.
<> 144:ef7eb2e8f9f7 460 */
<> 144:ef7eb2e8f9f7 461 void FLEXIO_I2S_TransferRxCreateHandle(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 462 flexio_i2s_handle_t *handle,
<> 144:ef7eb2e8f9f7 463 flexio_i2s_callback_t callback,
<> 144:ef7eb2e8f9f7 464 void *userData);
<> 144:ef7eb2e8f9f7 465
<> 144:ef7eb2e8f9f7 466 /*!
<> 144:ef7eb2e8f9f7 467 * @brief Performs an interrupt non-blocking send transfer on FlexIO I2S.
<> 144:ef7eb2e8f9f7 468 *
<> 144:ef7eb2e8f9f7 469 * @note Calling the API returns immediately after transfer initiates.
<> 144:ef7eb2e8f9f7 470 * Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status and check whether
<> 144:ef7eb2e8f9f7 471 * the transfer is finished. If the return status is 0, the transfer is finished.
<> 144:ef7eb2e8f9f7 472 *
<> 144:ef7eb2e8f9f7 473 * @param base pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 474 * @param handle pointer to flexio_i2s_handle_t structure which stores the transfer state
<> 144:ef7eb2e8f9f7 475 * @param xfer pointer to flexio_i2s_transfer_t structure
<> 144:ef7eb2e8f9f7 476 * @retval kStatus_Success Successfully start the data transmission.
<> 144:ef7eb2e8f9f7 477 * @retval kStatus_FLEXIO_I2S_TxBusy Previous transmission still not finished, data not all written to TX register yet.
<> 144:ef7eb2e8f9f7 478 * @retval kStatus_InvalidArgument The input parameter is invalid.
<> 144:ef7eb2e8f9f7 479 */
<> 144:ef7eb2e8f9f7 480 status_t FLEXIO_I2S_TransferSendNonBlocking(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 481 flexio_i2s_handle_t *handle,
<> 144:ef7eb2e8f9f7 482 flexio_i2s_transfer_t *xfer);
<> 144:ef7eb2e8f9f7 483
<> 144:ef7eb2e8f9f7 484 /*!
<> 144:ef7eb2e8f9f7 485 * @brief Performs an interrupt non-blocking receive transfer on FlexIO I2S.
<> 144:ef7eb2e8f9f7 486 *
<> 144:ef7eb2e8f9f7 487 * @note The API returns immediately after transfer initiates.
<> 144:ef7eb2e8f9f7 488 * Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status to check whether
<> 144:ef7eb2e8f9f7 489 * the transfer is finished. If the return status is 0, the transfer is finished.
<> 144:ef7eb2e8f9f7 490 *
<> 144:ef7eb2e8f9f7 491 * @param base pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 492 * @param handle pointer to flexio_i2s_handle_t structure which stores the transfer state
<> 144:ef7eb2e8f9f7 493 * @param xfer pointer to flexio_i2s_transfer_t structure
<> 144:ef7eb2e8f9f7 494 * @retval kStatus_Success Successfully start the data receive.
<> 144:ef7eb2e8f9f7 495 * @retval kStatus_FLEXIO_I2S_RxBusy Previous receive still not finished.
<> 144:ef7eb2e8f9f7 496 * @retval kStatus_InvalidArgument The input parameter is invalid.
<> 144:ef7eb2e8f9f7 497 */
<> 144:ef7eb2e8f9f7 498 status_t FLEXIO_I2S_TransferReceiveNonBlocking(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 499 flexio_i2s_handle_t *handle,
<> 144:ef7eb2e8f9f7 500 flexio_i2s_transfer_t *xfer);
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /*!
<> 144:ef7eb2e8f9f7 503 * @brief Aborts the current send.
<> 144:ef7eb2e8f9f7 504 *
<> 144:ef7eb2e8f9f7 505 * @note This API can be called at any time when interrupt non-blocking transfer initiates
<> 144:ef7eb2e8f9f7 506 * to abort the transfer in a early time.
<> 144:ef7eb2e8f9f7 507 *
<> 144:ef7eb2e8f9f7 508 * @param base pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 509 * @param handle pointer to flexio_i2s_handle_t structure which stores the transfer state
<> 144:ef7eb2e8f9f7 510 */
<> 144:ef7eb2e8f9f7 511 void FLEXIO_I2S_TransferAbortSend(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle);
<> 144:ef7eb2e8f9f7 512
<> 144:ef7eb2e8f9f7 513 /*!
<> 144:ef7eb2e8f9f7 514 * @brief Aborts the current receive.
<> 144:ef7eb2e8f9f7 515 *
<> 144:ef7eb2e8f9f7 516 * @note This API can be called at any time when interrupt non-blocking transfer initiates
<> 144:ef7eb2e8f9f7 517 * to abort the transfer in a early time.
<> 144:ef7eb2e8f9f7 518 *
<> 144:ef7eb2e8f9f7 519 * @param base pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 520 * @param handle pointer to flexio_i2s_handle_t structure which stores the transfer state
<> 144:ef7eb2e8f9f7 521 */
<> 144:ef7eb2e8f9f7 522 void FLEXIO_I2S_TransferAbortReceive(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle);
<> 144:ef7eb2e8f9f7 523
<> 144:ef7eb2e8f9f7 524 /*!
<> 144:ef7eb2e8f9f7 525 * @brief Gets the remaining bytes to be sent.
<> 144:ef7eb2e8f9f7 526 *
<> 144:ef7eb2e8f9f7 527 * @param base pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 528 * @param handle pointer to flexio_i2s_handle_t structure which stores the transfer state
<> 144:ef7eb2e8f9f7 529 * @param count Bytes sent.
<> 144:ef7eb2e8f9f7 530 * @retval kStatus_Success Succeed get the transfer count.
<> 144:ef7eb2e8f9f7 531 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
<> 144:ef7eb2e8f9f7 532 */
<> 144:ef7eb2e8f9f7 533 status_t FLEXIO_I2S_TransferGetSendCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count);
<> 144:ef7eb2e8f9f7 534
<> 144:ef7eb2e8f9f7 535 /*!
<> 144:ef7eb2e8f9f7 536 * @brief Gets the remaining bytes to be received.
<> 144:ef7eb2e8f9f7 537 *
<> 144:ef7eb2e8f9f7 538 * @param base pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 539 * @param handle pointer to flexio_i2s_handle_t structure which stores the transfer state
<> 144:ef7eb2e8f9f7 540 * @return count Bytes received.
<> 144:ef7eb2e8f9f7 541 * @retval kStatus_Success Succeed get the transfer count.
<> 144:ef7eb2e8f9f7 542 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
<> 144:ef7eb2e8f9f7 543 */
<> 144:ef7eb2e8f9f7 544 status_t FLEXIO_I2S_TransferGetReceiveCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count);
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546 /*!
<> 144:ef7eb2e8f9f7 547 * @brief Tx interrupt handler.
<> 144:ef7eb2e8f9f7 548 *
<> 144:ef7eb2e8f9f7 549 * @param i2sBase pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 550 * @param i2sHandle pointer to flexio_i2s_handle_t structure
<> 144:ef7eb2e8f9f7 551 */
<> 144:ef7eb2e8f9f7 552 void FLEXIO_I2S_TransferTxHandleIRQ(void *i2sBase, void *i2sHandle);
<> 144:ef7eb2e8f9f7 553
<> 144:ef7eb2e8f9f7 554 /*!
<> 144:ef7eb2e8f9f7 555 * @brief Rx interrupt handler.
<> 144:ef7eb2e8f9f7 556 *
<> 144:ef7eb2e8f9f7 557 * @param i2sBase pointer to FLEXIO_I2S_Type structure.
<> 144:ef7eb2e8f9f7 558 * @param i2sHandle pointer to flexio_i2s_handle_t structure
<> 144:ef7eb2e8f9f7 559 */
<> 144:ef7eb2e8f9f7 560 void FLEXIO_I2S_TransferRxHandleIRQ(void *i2sBase, void *i2sHandle);
<> 144:ef7eb2e8f9f7 561
<> 144:ef7eb2e8f9f7 562 /*! @} */
<> 144:ef7eb2e8f9f7 563
<> 144:ef7eb2e8f9f7 564 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 565 }
<> 144:ef7eb2e8f9f7 566 #endif /*_cplusplus*/
<> 144:ef7eb2e8f9f7 567
<> 144:ef7eb2e8f9f7 568 /*! @} */
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570 #endif /* _FSL_FLEXIO_I2S_H_ */