Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_flexio_i2c_master.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30 #ifndef _FSL_FLEXIO_I2C_MASTER_H_
<> 144:ef7eb2e8f9f7 31 #define _FSL_FLEXIO_I2C_MASTER_H_
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "fsl_common.h"
<> 144:ef7eb2e8f9f7 34 #include "fsl_flexio.h"
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /*!
<> 144:ef7eb2e8f9f7 37 * @addtogroup flexio_i2c_master
<> 144:ef7eb2e8f9f7 38 * @{
<> 144:ef7eb2e8f9f7 39 */
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 /*! @file */
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /*******************************************************************************
<> 144:ef7eb2e8f9f7 44 * Definitions
<> 144:ef7eb2e8f9f7 45 ******************************************************************************/
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /*! @name Driver version */
<> 144:ef7eb2e8f9f7 48 /*@{*/
<> 144:ef7eb2e8f9f7 49 /*! @brief FlexIO I2C master driver version 2.1.0. */
<> 144:ef7eb2e8f9f7 50 #define FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
<> 144:ef7eb2e8f9f7 51 /*@}*/
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /*! @brief FlexIO I2C transfer status*/
<> 144:ef7eb2e8f9f7 54 enum _flexio_i2c_status
<> 144:ef7eb2e8f9f7 55 {
<> 144:ef7eb2e8f9f7 56 kStatus_FLEXIO_I2C_Busy = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 0), /*!< I2C is busy doing transfer. */
<> 144:ef7eb2e8f9f7 57 kStatus_FLEXIO_I2C_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 1), /*!< I2C is busy doing transfer. */
<> 144:ef7eb2e8f9f7 58 kStatus_FLEXIO_I2C_Nak = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 2), /*!< NAK received during transfer. */
<> 144:ef7eb2e8f9f7 59 };
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /*! @brief Define FlexIO I2C master interrupt mask. */
<> 144:ef7eb2e8f9f7 62 enum _flexio_i2c_master_interrupt
<> 144:ef7eb2e8f9f7 63 {
<> 144:ef7eb2e8f9f7 64 kFLEXIO_I2C_TxEmptyInterruptEnable = 0x1U, /*!< Tx buffer empty interrupt enable. */
<> 144:ef7eb2e8f9f7 65 kFLEXIO_I2C_RxFullInterruptEnable = 0x2U, /*!< Rx buffer full interrupt enable. */
<> 144:ef7eb2e8f9f7 66 };
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /*! @brief Define FlexIO I2C master status mask. */
<> 144:ef7eb2e8f9f7 69 enum _flexio_i2c_master_status_flags
<> 144:ef7eb2e8f9f7 70 {
<> 144:ef7eb2e8f9f7 71 kFLEXIO_I2C_TxEmptyFlag = 0x1U, /*!< Tx shifter empty flag. */
<> 144:ef7eb2e8f9f7 72 kFLEXIO_I2C_RxFullFlag = 0x2U, /*!< Rx shifter full/Transfer complete flag. */
<> 144:ef7eb2e8f9f7 73 kFLEXIO_I2C_ReceiveNakFlag = 0x4U, /*!< Receive NAK flag. */
<> 144:ef7eb2e8f9f7 74 };
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 /*! @brief Direction of master transfer.*/
<> 144:ef7eb2e8f9f7 77 typedef enum _flexio_i2c_direction
<> 144:ef7eb2e8f9f7 78 {
<> 144:ef7eb2e8f9f7 79 kFLEXIO_I2C_Write = 0x0U, /*!< Master send to slave. */
<> 144:ef7eb2e8f9f7 80 kFLEXIO_I2C_Read = 0x1U, /*!< Master receive from slave. */
<> 144:ef7eb2e8f9f7 81 } flexio_i2c_direction_t;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /*! @brief Define FlexIO I2C master access structure typedef. */
<> 144:ef7eb2e8f9f7 84 typedef struct _flexio_i2c_type
<> 144:ef7eb2e8f9f7 85 {
<> 144:ef7eb2e8f9f7 86 FLEXIO_Type *flexioBase; /*!< FlexIO base pointer. */
<> 144:ef7eb2e8f9f7 87 uint8_t SDAPinIndex; /*!< Pin select for I2C SDA. */
<> 144:ef7eb2e8f9f7 88 uint8_t SCLPinIndex; /*!< Pin select for I2C SCL. */
<> 144:ef7eb2e8f9f7 89 uint8_t shifterIndex[2]; /*!< Shifter index used in FlexIO I2C. */
<> 144:ef7eb2e8f9f7 90 uint8_t timerIndex[2]; /*!< Timer index used in FlexIO I2C. */
<> 144:ef7eb2e8f9f7 91 } FLEXIO_I2C_Type;
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /*! @brief Define FlexIO I2C master user configuration structure. */
<> 144:ef7eb2e8f9f7 94 typedef struct _flexio_i2c_master_config
<> 144:ef7eb2e8f9f7 95 {
<> 144:ef7eb2e8f9f7 96 bool enableMaster; /*!< Enables the FLEXIO I2C peripheral at initialization time. */
<> 144:ef7eb2e8f9f7 97 bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */
<> 144:ef7eb2e8f9f7 98 bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */
<> 144:ef7eb2e8f9f7 99 bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, fast access requires
<> 144:ef7eb2e8f9f7 100 the FlexIO clock to be at least twice the frequency of the bus clock. */
<> 144:ef7eb2e8f9f7 101 uint32_t baudRate_Bps; /*!< Baud rate in Bps. */
<> 144:ef7eb2e8f9f7 102 } flexio_i2c_master_config_t;
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 /*! @brief Define FlexIO I2C master transfer structure. */
<> 144:ef7eb2e8f9f7 105 typedef struct _flexio_i2c_master_transfer
<> 144:ef7eb2e8f9f7 106 {
<> 144:ef7eb2e8f9f7 107 uint32_t flags; /*!< Transfer flag which controls the transfer, reserved for flexio i2c. */
<> 144:ef7eb2e8f9f7 108 uint8_t slaveAddress; /*!< 7-bit slave address. */
<> 144:ef7eb2e8f9f7 109 flexio_i2c_direction_t direction; /*!< Transfer direction, read or write. */
<> 144:ef7eb2e8f9f7 110 uint32_t subaddress; /*!< Sub address. Transferred MSB first. */
<> 144:ef7eb2e8f9f7 111 uint8_t subaddressSize; /*!< Size of command buffer. */
<> 144:ef7eb2e8f9f7 112 uint8_t volatile *data; /*!< Transfer buffer. */
<> 144:ef7eb2e8f9f7 113 volatile size_t dataSize; /*!< Transfer size. */
<> 144:ef7eb2e8f9f7 114 } flexio_i2c_master_transfer_t;
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 /*! @brief FlexIO I2C master handle typedef. */
<> 144:ef7eb2e8f9f7 117 typedef struct _flexio_i2c_master_handle flexio_i2c_master_handle_t;
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /*! @brief FlexIO I2C master transfer callback typedef. */
<> 144:ef7eb2e8f9f7 120 typedef void (*flexio_i2c_master_transfer_callback_t)(FLEXIO_I2C_Type *base,
<> 144:ef7eb2e8f9f7 121 flexio_i2c_master_handle_t *handle,
<> 144:ef7eb2e8f9f7 122 status_t status,
<> 144:ef7eb2e8f9f7 123 void *userData);
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 /*! @brief Define FlexIO I2C master handle structure. */
<> 144:ef7eb2e8f9f7 126 struct _flexio_i2c_master_handle
<> 144:ef7eb2e8f9f7 127 {
<> 144:ef7eb2e8f9f7 128 flexio_i2c_master_transfer_t transfer; /*!< FlexIO I2C master transfer copy. */
<> 144:ef7eb2e8f9f7 129 size_t transferSize; /*!< Total bytes to be transferred. */
<> 144:ef7eb2e8f9f7 130 uint8_t state; /*!< Transfer state maintained during transfer. */
<> 144:ef7eb2e8f9f7 131 flexio_i2c_master_transfer_callback_t completionCallback; /*!< Callback function called at transfer event. */
<> 144:ef7eb2e8f9f7 132 /*!< Callback function called at transfer event. */
<> 144:ef7eb2e8f9f7 133 void *userData; /*!< Callback parameter passed to callback function. */
<> 144:ef7eb2e8f9f7 134 };
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 /*******************************************************************************
<> 144:ef7eb2e8f9f7 137 * API
<> 144:ef7eb2e8f9f7 138 ******************************************************************************/
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 141 extern "C" {
<> 144:ef7eb2e8f9f7 142 #endif /*_cplusplus*/
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 /*!
<> 144:ef7eb2e8f9f7 145 * @name Initialization and deinitialization
<> 144:ef7eb2e8f9f7 146 * @{
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 /*!
<> 144:ef7eb2e8f9f7 150 * @brief Ungates the FlexIO clock, resets the FlexIO module, and configures the FlexIO I2C
<> 144:ef7eb2e8f9f7 151 * hardware configuration.
<> 144:ef7eb2e8f9f7 152 *
<> 144:ef7eb2e8f9f7 153 * Example
<> 144:ef7eb2e8f9f7 154 @code
<> 144:ef7eb2e8f9f7 155 FLEXIO_I2C_Type base = {
<> 144:ef7eb2e8f9f7 156 .flexioBase = FLEXIO,
<> 144:ef7eb2e8f9f7 157 .SDAPinIndex = 0,
<> 144:ef7eb2e8f9f7 158 .SCLPinIndex = 1,
<> 144:ef7eb2e8f9f7 159 .shifterIndex = {0,1},
<> 144:ef7eb2e8f9f7 160 .timerIndex = {0,1}
<> 144:ef7eb2e8f9f7 161 };
<> 144:ef7eb2e8f9f7 162 flexio_i2c_master_config_t config = {
<> 144:ef7eb2e8f9f7 163 .enableInDoze = false,
<> 144:ef7eb2e8f9f7 164 .enableInDebug = true,
<> 144:ef7eb2e8f9f7 165 .enableFastAccess = false,
<> 144:ef7eb2e8f9f7 166 .baudRate_Bps = 100000
<> 144:ef7eb2e8f9f7 167 };
<> 144:ef7eb2e8f9f7 168 FLEXIO_I2C_MasterInit(base, &config, srcClock_Hz);
<> 144:ef7eb2e8f9f7 169 @endcode
<> 144:ef7eb2e8f9f7 170 *
<> 144:ef7eb2e8f9f7 171 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 172 * @param masterConfig pointer to flexio_i2c_master_config_t structure.
<> 144:ef7eb2e8f9f7 173 * @param srcClock_Hz FlexIO source clock in Hz.
<> 144:ef7eb2e8f9f7 174 */
<> 144:ef7eb2e8f9f7 175 void FLEXIO_I2C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz);
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 /*!
<> 144:ef7eb2e8f9f7 178 * @brief De-initializes the FlexIO I2C master peripheral. Calling this API gates the FlexIO clock,
<> 144:ef7eb2e8f9f7 179 * so the FlexIO I2C master module can't work unless call FLEXIO_I2C_MasterInit.
<> 144:ef7eb2e8f9f7 180 *
<> 144:ef7eb2e8f9f7 181 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 182 */
<> 144:ef7eb2e8f9f7 183 void FLEXIO_I2C_MasterDeinit(FLEXIO_I2C_Type *base);
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 /*!
<> 144:ef7eb2e8f9f7 186 * @brief Gets the default configuration to configure the FlexIO module. The configuration
<> 144:ef7eb2e8f9f7 187 * can be used directly for calling FLEXIO_I2C_MasterInit().
<> 144:ef7eb2e8f9f7 188 *
<> 144:ef7eb2e8f9f7 189 * Example:
<> 144:ef7eb2e8f9f7 190 @code
<> 144:ef7eb2e8f9f7 191 flexio_i2c_master_config_t config;
<> 144:ef7eb2e8f9f7 192 FLEXIO_I2C_MasterGetDefaultConfig(&config);
<> 144:ef7eb2e8f9f7 193 @endcode
<> 144:ef7eb2e8f9f7 194 * @param masterConfig pointer to flexio_i2c_master_config_t structure.
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196 void FLEXIO_I2C_MasterGetDefaultConfig(flexio_i2c_master_config_t *masterConfig);
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /*!
<> 144:ef7eb2e8f9f7 199 * @brief Enables/disables the FlexIO module operation.
<> 144:ef7eb2e8f9f7 200 *
<> 144:ef7eb2e8f9f7 201 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 202 * @param enable pass true to enable module, false to disable module.
<> 144:ef7eb2e8f9f7 203 */
<> 144:ef7eb2e8f9f7 204 static inline void FLEXIO_I2C_MasterEnable(FLEXIO_I2C_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 205 {
<> 144:ef7eb2e8f9f7 206 if (enable)
<> 144:ef7eb2e8f9f7 207 {
<> 144:ef7eb2e8f9f7 208 base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
<> 144:ef7eb2e8f9f7 209 }
<> 144:ef7eb2e8f9f7 210 else
<> 144:ef7eb2e8f9f7 211 {
<> 144:ef7eb2e8f9f7 212 base->flexioBase->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK;
<> 144:ef7eb2e8f9f7 213 }
<> 144:ef7eb2e8f9f7 214 }
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /* @} */
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 /*!
<> 144:ef7eb2e8f9f7 219 * @name Status
<> 144:ef7eb2e8f9f7 220 * @{
<> 144:ef7eb2e8f9f7 221 */
<> 144:ef7eb2e8f9f7 222
<> 144:ef7eb2e8f9f7 223 /*!
<> 144:ef7eb2e8f9f7 224 * @brief Gets the FlexIO I2C master status flags.
<> 144:ef7eb2e8f9f7 225 *
<> 144:ef7eb2e8f9f7 226 * @param base pointer to FLEXIO_I2C_Type structure
<> 144:ef7eb2e8f9f7 227 * @return status flag, use status flag to AND #_flexio_i2c_master_status_flags could get the related status.
<> 144:ef7eb2e8f9f7 228 */
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 uint32_t FLEXIO_I2C_MasterGetStatusFlags(FLEXIO_I2C_Type *base);
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 /*!
<> 144:ef7eb2e8f9f7 233 * @brief Clears the FlexIO I2C master status flags.
<> 144:ef7eb2e8f9f7 234 *
<> 144:ef7eb2e8f9f7 235 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 236 * @param mask status flag.
<> 144:ef7eb2e8f9f7 237 * The parameter could be any combination of the following values:
<> 144:ef7eb2e8f9f7 238 * @arg kFLEXIO_I2C_RxFullFlag
<> 144:ef7eb2e8f9f7 239 * @arg kFLEXIO_I2C_ReceiveNakFlag
<> 144:ef7eb2e8f9f7 240 */
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 void FLEXIO_I2C_MasterClearStatusFlags(FLEXIO_I2C_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /*@}*/
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /*!
<> 144:ef7eb2e8f9f7 247 * @name Interrupts
<> 144:ef7eb2e8f9f7 248 * @{
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /*!
<> 144:ef7eb2e8f9f7 252 * @brief Enables the FlexIO i2c master interrupt requests.
<> 144:ef7eb2e8f9f7 253 *
<> 144:ef7eb2e8f9f7 254 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 255 * @param mask interrupt source.
<> 144:ef7eb2e8f9f7 256 * Currently only one interrupt request source:
<> 144:ef7eb2e8f9f7 257 * @arg kFLEXIO_I2C_TransferCompleteInterruptEnable
<> 144:ef7eb2e8f9f7 258 */
<> 144:ef7eb2e8f9f7 259 void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 /*!
<> 144:ef7eb2e8f9f7 262 * @brief Disables the FlexIO I2C master interrupt requests.
<> 144:ef7eb2e8f9f7 263 *
<> 144:ef7eb2e8f9f7 264 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 265 * @param mask interrupt source.
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267 void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 /*@}*/
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /*!
<> 144:ef7eb2e8f9f7 272 * @name Bus Operations
<> 144:ef7eb2e8f9f7 273 * @{
<> 144:ef7eb2e8f9f7 274 */
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 /*!
<> 144:ef7eb2e8f9f7 277 * @brief Sets the FlexIO I2C master transfer baudrate.
<> 144:ef7eb2e8f9f7 278 *
<> 144:ef7eb2e8f9f7 279 * @param base pointer to FLEXIO_I2C_Type structure
<> 144:ef7eb2e8f9f7 280 * @param baudRate_Bps the baud rate value in HZ
<> 144:ef7eb2e8f9f7 281 * @param srcClock_Hz source clock in HZ
<> 144:ef7eb2e8f9f7 282 */
<> 144:ef7eb2e8f9f7 283 void FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 /*!
<> 144:ef7eb2e8f9f7 286 * @brief Sends START + 7-bit address to the bus.
<> 144:ef7eb2e8f9f7 287 *
<> 144:ef7eb2e8f9f7 288 * @note This is API should be called when transfer configuration is ready to send a START signal
<> 144:ef7eb2e8f9f7 289 * and 7-bit address to the bus. This is a non-blocking API, which returns directly after the address
<> 144:ef7eb2e8f9f7 290 * is put into the data register but not address transfer finished on the bus. Ensure that
<> 144:ef7eb2e8f9f7 291 * the kFLEXIO_I2C_RxFullFlag status is asserted before calling this API.
<> 144:ef7eb2e8f9f7 292 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 293 * @param address 7-bit address.
<> 144:ef7eb2e8f9f7 294 * @param direction transfer direction.
<> 144:ef7eb2e8f9f7 295 * This parameter is one of the values in flexio_i2c_direction_t:
<> 144:ef7eb2e8f9f7 296 * @arg kFLEXIO_I2C_Write: Transmit
<> 144:ef7eb2e8f9f7 297 * @arg kFLEXIO_I2C_Read: Receive
<> 144:ef7eb2e8f9f7 298 */
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 void FLEXIO_I2C_MasterStart(FLEXIO_I2C_Type *base, uint8_t address, flexio_i2c_direction_t direction);
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 /*!
<> 144:ef7eb2e8f9f7 303 * @brief Sends the stop signal on the bus.
<> 144:ef7eb2e8f9f7 304 *
<> 144:ef7eb2e8f9f7 305 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 306 */
<> 144:ef7eb2e8f9f7 307 void FLEXIO_I2C_MasterStop(FLEXIO_I2C_Type *base);
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 /*!
<> 144:ef7eb2e8f9f7 310 * @brief Sends the repeated start signal on the bus.
<> 144:ef7eb2e8f9f7 311 *
<> 144:ef7eb2e8f9f7 312 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 313 */
<> 144:ef7eb2e8f9f7 314 void FLEXIO_I2C_MasterRepeatedStart(FLEXIO_I2C_Type *base);
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 /*!
<> 144:ef7eb2e8f9f7 317 * @brief Sends the stop signal when transfer is still on-going.
<> 144:ef7eb2e8f9f7 318 *
<> 144:ef7eb2e8f9f7 319 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 320 */
<> 144:ef7eb2e8f9f7 321 void FLEXIO_I2C_MasterAbortStop(FLEXIO_I2C_Type *base);
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 /*!
<> 144:ef7eb2e8f9f7 324 * @brief Configures the sent ACK/NAK for the following byte.
<> 144:ef7eb2e8f9f7 325 *
<> 144:ef7eb2e8f9f7 326 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 327 * @param enable true to configure send ACK, false configure to send NAK.
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329 void FLEXIO_I2C_MasterEnableAck(FLEXIO_I2C_Type *base, bool enable);
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 /*!
<> 144:ef7eb2e8f9f7 332 * @brief Sets the number of bytes to be transferred from a start signal to a stop signal.
<> 144:ef7eb2e8f9f7 333 *
<> 144:ef7eb2e8f9f7 334 * @note Call this API before a transfer begins because the timer generates a number of clocks according
<> 144:ef7eb2e8f9f7 335 * to the number of bytes that need to be transferred.
<> 144:ef7eb2e8f9f7 336 *
<> 144:ef7eb2e8f9f7 337 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 338 * @param count number of bytes need to be transferred from a start signal to a re-start/stop signal
<> 144:ef7eb2e8f9f7 339 * @retval kStatus_Success Successfully configured the count.
<> 144:ef7eb2e8f9f7 340 * @retval kStatus_InvalidArgument Input argument is invalid.
<> 144:ef7eb2e8f9f7 341 */
<> 144:ef7eb2e8f9f7 342 status_t FLEXIO_I2C_MasterSetTransferCount(FLEXIO_I2C_Type *base, uint8_t count);
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /*!
<> 144:ef7eb2e8f9f7 345 * @brief Writes one byte of data to the I2C bus.
<> 144:ef7eb2e8f9f7 346 *
<> 144:ef7eb2e8f9f7 347 * @note This is a non-blocking API, which returns directly after the data is put into the
<> 144:ef7eb2e8f9f7 348 * data register but not data transfer finished on the bus. Ensure that
<> 144:ef7eb2e8f9f7 349 * the TxEmptyFlag is asserted before calling this API.
<> 144:ef7eb2e8f9f7 350 *
<> 144:ef7eb2e8f9f7 351 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 352 * @param data a byte of data.
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354 static inline void FLEXIO_I2C_MasterWriteByte(FLEXIO_I2C_Type *base, uint32_t data)
<> 144:ef7eb2e8f9f7 355 {
<> 144:ef7eb2e8f9f7 356 base->flexioBase->SHIFTBUFBBS[base->shifterIndex[0]] = data;
<> 144:ef7eb2e8f9f7 357 }
<> 144:ef7eb2e8f9f7 358
<> 144:ef7eb2e8f9f7 359 /*!
<> 144:ef7eb2e8f9f7 360 * @brief Reads one byte of data from the I2C bus.
<> 144:ef7eb2e8f9f7 361 *
<> 144:ef7eb2e8f9f7 362 * @note This is a non-blocking API, which returns directly after the data is read from the
<> 144:ef7eb2e8f9f7 363 * data register. Ensure that the data is ready in the register.
<> 144:ef7eb2e8f9f7 364 *
<> 144:ef7eb2e8f9f7 365 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 366 * @return data byte read.
<> 144:ef7eb2e8f9f7 367 */
<> 144:ef7eb2e8f9f7 368 static inline uint8_t FLEXIO_I2C_MasterReadByte(FLEXIO_I2C_Type *base)
<> 144:ef7eb2e8f9f7 369 {
<> 144:ef7eb2e8f9f7 370 return base->flexioBase->SHIFTBUFBIS[base->shifterIndex[1]];
<> 144:ef7eb2e8f9f7 371 }
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /*!
<> 144:ef7eb2e8f9f7 374 * @brief Sends a buffer of data in bytes.
<> 144:ef7eb2e8f9f7 375 *
<> 144:ef7eb2e8f9f7 376 * @note This function blocks via polling until all bytes have been sent.
<> 144:ef7eb2e8f9f7 377 *
<> 144:ef7eb2e8f9f7 378 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 379 * @param txBuff The data bytes to send.
<> 144:ef7eb2e8f9f7 380 * @param txSize The number of data bytes to send.
<> 144:ef7eb2e8f9f7 381 * @retval kStatus_Success Successfully write data.
<> 144:ef7eb2e8f9f7 382 * @retval kStatus_FLEXIO_I2C_Nak Receive NAK during writing data.
<> 144:ef7eb2e8f9f7 383 */
<> 144:ef7eb2e8f9f7 384 status_t FLEXIO_I2C_MasterWriteBlocking(FLEXIO_I2C_Type *base, const uint8_t *txBuff, uint8_t txSize);
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386 /*!
<> 144:ef7eb2e8f9f7 387 * @brief Receives a buffer of bytes.
<> 144:ef7eb2e8f9f7 388 *
<> 144:ef7eb2e8f9f7 389 * @note This function blocks via polling until all bytes have been received.
<> 144:ef7eb2e8f9f7 390 *
<> 144:ef7eb2e8f9f7 391 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 392 * @param rxBuff The buffer to store the received bytes.
<> 144:ef7eb2e8f9f7 393 * @param rxSize The number of data bytes to be received.
<> 144:ef7eb2e8f9f7 394 */
<> 144:ef7eb2e8f9f7 395 void FLEXIO_I2C_MasterReadBlocking(FLEXIO_I2C_Type *base, uint8_t *rxBuff, uint8_t rxSize);
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 /*!
<> 144:ef7eb2e8f9f7 398 * @brief Performs a master polling transfer on the I2C bus.
<> 144:ef7eb2e8f9f7 399 *
<> 144:ef7eb2e8f9f7 400 * @note The API does not return until the transfer succeeds or fails due
<> 144:ef7eb2e8f9f7 401 * to receiving NAK.
<> 144:ef7eb2e8f9f7 402 *
<> 144:ef7eb2e8f9f7 403 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 404 * @param handle pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
<> 144:ef7eb2e8f9f7 405 * @param xfer pointer to flexio_i2c_master_transfer_t structure.
<> 144:ef7eb2e8f9f7 406 * @return status of status_t.
<> 144:ef7eb2e8f9f7 407 */
<> 144:ef7eb2e8f9f7 408 status_t FLEXIO_I2C_MasterTransferBlocking(FLEXIO_I2C_Type *base,
<> 144:ef7eb2e8f9f7 409 flexio_i2c_master_handle_t *handle,
<> 144:ef7eb2e8f9f7 410 flexio_i2c_master_transfer_t *xfer);
<> 144:ef7eb2e8f9f7 411 /*@}*/
<> 144:ef7eb2e8f9f7 412
<> 144:ef7eb2e8f9f7 413 /*Transactional APIs*/
<> 144:ef7eb2e8f9f7 414
<> 144:ef7eb2e8f9f7 415 /*!
<> 144:ef7eb2e8f9f7 416 * @name Transactional
<> 144:ef7eb2e8f9f7 417 * @{
<> 144:ef7eb2e8f9f7 418 */
<> 144:ef7eb2e8f9f7 419
<> 144:ef7eb2e8f9f7 420 /*!
<> 144:ef7eb2e8f9f7 421 * @brief Initializes the I2C handle which is used in transactional functions.
<> 144:ef7eb2e8f9f7 422 *
<> 144:ef7eb2e8f9f7 423 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 424 * @param handle pointer to flexio_i2c_master_handle_t structure to store the transfer state.
<> 144:ef7eb2e8f9f7 425 * @param callback pointer to user callback function.
<> 144:ef7eb2e8f9f7 426 * @param userData user param passed to the callback function.
<> 144:ef7eb2e8f9f7 427 * @retval kStatus_Success Successfully create the handle.
<> 144:ef7eb2e8f9f7 428 * @retval kStatus_OutOfRange The FlexIO type/handle/isr table out of range.
<> 144:ef7eb2e8f9f7 429 */
<> 144:ef7eb2e8f9f7 430 status_t FLEXIO_I2C_MasterTransferCreateHandle(FLEXIO_I2C_Type *base,
<> 144:ef7eb2e8f9f7 431 flexio_i2c_master_handle_t *handle,
<> 144:ef7eb2e8f9f7 432 flexio_i2c_master_transfer_callback_t callback,
<> 144:ef7eb2e8f9f7 433 void *userData);
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 /*!
<> 144:ef7eb2e8f9f7 436 * @brief Performs a master interrupt non-blocking transfer on the I2C bus.
<> 144:ef7eb2e8f9f7 437 *
<> 144:ef7eb2e8f9f7 438 * @note The API returns immediately after the transfer initiates.
<> 144:ef7eb2e8f9f7 439 * Call FLEXIO_I2C_MasterGetTransferCount to poll the transfer status to check whether
<> 144:ef7eb2e8f9f7 440 * the transfer is finished. If the return status is not kStatus_FLEXIO_I2C_Busy, the transfer
<> 144:ef7eb2e8f9f7 441 * is finished.
<> 144:ef7eb2e8f9f7 442 *
<> 144:ef7eb2e8f9f7 443 * @param base pointer to FLEXIO_I2C_Type structure
<> 144:ef7eb2e8f9f7 444 * @param handle pointer to flexio_i2c_master_handle_t structure which stores the transfer state
<> 144:ef7eb2e8f9f7 445 * @param xfer pointer to flexio_i2c_master_transfer_t structure
<> 144:ef7eb2e8f9f7 446 * @retval kStatus_Success Successfully start a transfer.
<> 144:ef7eb2e8f9f7 447 * @retval kStatus_FLEXIO_I2C_Busy FLEXIO I2C is not idle, is running another transfer.
<> 144:ef7eb2e8f9f7 448 */
<> 144:ef7eb2e8f9f7 449 status_t FLEXIO_I2C_MasterTransferNonBlocking(FLEXIO_I2C_Type *base,
<> 144:ef7eb2e8f9f7 450 flexio_i2c_master_handle_t *handle,
<> 144:ef7eb2e8f9f7 451 flexio_i2c_master_transfer_t *xfer);
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 /*!
<> 144:ef7eb2e8f9f7 454 * @brief Gets the master transfer status during a interrupt non-blocking transfer.
<> 144:ef7eb2e8f9f7 455 *
<> 144:ef7eb2e8f9f7 456 * @param base pointer to FLEXIO_I2C_Type structure.
<> 144:ef7eb2e8f9f7 457 * @param handle pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
<> 144:ef7eb2e8f9f7 458 * @param count Number of bytes transferred so far by the non-blocking transaction.
<> 144:ef7eb2e8f9f7 459 * @retval kStatus_InvalidArgument count is Invalid.
<> 144:ef7eb2e8f9f7 460 * @retval kStatus_Success Successfully return the count.
<> 144:ef7eb2e8f9f7 461 */
<> 144:ef7eb2e8f9f7 462 status_t FLEXIO_I2C_MasterTransferGetCount(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, size_t *count);
<> 144:ef7eb2e8f9f7 463
<> 144:ef7eb2e8f9f7 464 /*!
<> 144:ef7eb2e8f9f7 465 * @brief Aborts an interrupt non-blocking transfer early.
<> 144:ef7eb2e8f9f7 466 *
<> 144:ef7eb2e8f9f7 467 * @note This API can be called at any time when an interrupt non-blocking transfer initiates
<> 144:ef7eb2e8f9f7 468 * to abort the transfer early.
<> 144:ef7eb2e8f9f7 469 *
<> 144:ef7eb2e8f9f7 470 * @param base pointer to FLEXIO_I2C_Type structure
<> 144:ef7eb2e8f9f7 471 * @param handle pointer to flexio_i2c_master_handle_t structure which stores the transfer state
<> 144:ef7eb2e8f9f7 472 */
<> 144:ef7eb2e8f9f7 473 void FLEXIO_I2C_MasterTransferAbort(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle);
<> 144:ef7eb2e8f9f7 474
<> 144:ef7eb2e8f9f7 475 /*!
<> 144:ef7eb2e8f9f7 476 * @brief Master interrupt handler.
<> 144:ef7eb2e8f9f7 477 *
<> 144:ef7eb2e8f9f7 478 * @param i2cType pointer to FLEXIO_I2C_Type structure
<> 144:ef7eb2e8f9f7 479 * @param i2cHandle pointer to flexio_i2c_master_transfer_t structure
<> 144:ef7eb2e8f9f7 480 */
<> 144:ef7eb2e8f9f7 481 void FLEXIO_I2C_MasterTransferHandleIRQ(void *i2cType, void *i2cHandle);
<> 144:ef7eb2e8f9f7 482
<> 144:ef7eb2e8f9f7 483 /*@}*/
<> 144:ef7eb2e8f9f7 484
<> 144:ef7eb2e8f9f7 485 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 486 }
<> 144:ef7eb2e8f9f7 487 #endif /*_cplusplus*/
<> 144:ef7eb2e8f9f7 488 /*@}*/
<> 144:ef7eb2e8f9f7 489
<> 144:ef7eb2e8f9f7 490 #endif /*_FSL_FLEXIO_I2C_MASTER_H_*/