added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

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<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30 #ifndef _FSL_FLEXIO_H_
<> 144:ef7eb2e8f9f7 31 #define _FSL_FLEXIO_H_
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "fsl_common.h"
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 /*!
<> 144:ef7eb2e8f9f7 36 * @addtogroup flexio_driver
<> 144:ef7eb2e8f9f7 37 * @{
<> 144:ef7eb2e8f9f7 38 */
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /*! @file */
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 /*******************************************************************************
<> 144:ef7eb2e8f9f7 43 * Definitions
<> 144:ef7eb2e8f9f7 44 ******************************************************************************/
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /*! @name Driver version */
<> 144:ef7eb2e8f9f7 47 /*@{*/
<> 144:ef7eb2e8f9f7 48 /*! @brief FlexIO driver version 2.0.0. */
<> 144:ef7eb2e8f9f7 49 #define FSL_FLEXIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
<> 144:ef7eb2e8f9f7 50 /*@}*/
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 /*! @brief Calculate FlexIO timer trigger.*/
<> 144:ef7eb2e8f9f7 53 #define FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x) ((uint32_t)(x) << 1U)
<> 144:ef7eb2e8f9f7 54 #define FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(x) (((uint32_t)(x) << 2U) | 0x1U)
<> 144:ef7eb2e8f9f7 55 #define FLEXIO_TIMER_TRIGGER_SEL_TIMn(x) (((uint32_t)(x) << 2U) | 0x3U)
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /*! @brief Define time of timer trigger polarity.*/
<> 144:ef7eb2e8f9f7 58 typedef enum _flexio_timer_trigger_polarity
<> 144:ef7eb2e8f9f7 59 {
<> 144:ef7eb2e8f9f7 60 kFLEXIO_TimerTriggerPolarityActiveHigh = 0x0U, /*!< Active high. */
<> 144:ef7eb2e8f9f7 61 kFLEXIO_TimerTriggerPolarityActiveLow = 0x1U, /*!< Active low. */
<> 144:ef7eb2e8f9f7 62 } flexio_timer_trigger_polarity_t;
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /*! @brief Define type of timer trigger source.*/
<> 144:ef7eb2e8f9f7 65 typedef enum _flexio_timer_trigger_source
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 kFLEXIO_TimerTriggerSourceExternal = 0x0U, /*!< External trigger selected. */
<> 144:ef7eb2e8f9f7 68 kFLEXIO_TimerTriggerSourceInternal = 0x1U, /*!< Internal trigger selected. */
<> 144:ef7eb2e8f9f7 69 } flexio_timer_trigger_source_t;
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 /*! @brief Define type of timer/shifter pin configuration.*/
<> 144:ef7eb2e8f9f7 72 typedef enum _flexio_pin_config
<> 144:ef7eb2e8f9f7 73 {
<> 144:ef7eb2e8f9f7 74 kFLEXIO_PinConfigOutputDisabled = 0x0U, /*!< Pin output disabled. */
<> 144:ef7eb2e8f9f7 75 kFLEXIO_PinConfigOpenDrainOrBidirection = 0x1U, /*!< Pin open drain or bidirectional output enable. */
<> 144:ef7eb2e8f9f7 76 kFLEXIO_PinConfigBidirectionOutputData = 0x2U, /*!< Pin bidirectional output data. */
<> 144:ef7eb2e8f9f7 77 kFLEXIO_PinConfigOutput = 0x3U, /*!< Pin output. */
<> 144:ef7eb2e8f9f7 78 } flexio_pin_config_t;
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 /*! @brief Definition of pin polarity.*/
<> 144:ef7eb2e8f9f7 81 typedef enum _flexio_pin_polarity
<> 144:ef7eb2e8f9f7 82 {
<> 144:ef7eb2e8f9f7 83 kFLEXIO_PinActiveHigh = 0x0U, /*!< Active high. */
<> 144:ef7eb2e8f9f7 84 kFLEXIO_PinActiveLow = 0x1U, /*!< Active low. */
<> 144:ef7eb2e8f9f7 85 } flexio_pin_polarity_t;
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 /*! @brief Define type of timer work mode.*/
<> 144:ef7eb2e8f9f7 88 typedef enum _flexio_timer_mode
<> 144:ef7eb2e8f9f7 89 {
<> 144:ef7eb2e8f9f7 90 kFLEXIO_TimerModeDisabled = 0x0U, /*!< Timer Disabled. */
<> 144:ef7eb2e8f9f7 91 kFLEXIO_TimerModeDual8BitBaudBit = 0x1U, /*!< Dual 8-bit counters baud/bit mode. */
<> 144:ef7eb2e8f9f7 92 kFLEXIO_TimerModeDual8BitPWM = 0x2U, /*!< Dual 8-bit counters PWM mode. */
<> 144:ef7eb2e8f9f7 93 kFLEXIO_TimerModeSingle16Bit = 0x3U, /*!< Single 16-bit counter mode. */
<> 144:ef7eb2e8f9f7 94 } flexio_timer_mode_t;
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /*! @brief Define type of timer initial output or timer reset condition.*/
<> 144:ef7eb2e8f9f7 97 typedef enum _flexio_timer_output
<> 144:ef7eb2e8f9f7 98 {
<> 144:ef7eb2e8f9f7 99 kFLEXIO_TimerOutputOneNotAffectedByReset = 0x0U, /*!< Logic one when enabled and is not affected by timer
<> 144:ef7eb2e8f9f7 100 reset. */
<> 144:ef7eb2e8f9f7 101 kFLEXIO_TimerOutputZeroNotAffectedByReset = 0x1U, /*!< Logic zero when enabled and is not affected by timer
<> 144:ef7eb2e8f9f7 102 reset. */
<> 144:ef7eb2e8f9f7 103 kFLEXIO_TimerOutputOneAffectedByReset = 0x2U, /*!< Logic one when enabled and on timer reset. */
<> 144:ef7eb2e8f9f7 104 kFLEXIO_TimerOutputZeroAffectedByReset = 0x3U, /*!< Logic zero when enabled and on timer reset. */
<> 144:ef7eb2e8f9f7 105 } flexio_timer_output_t;
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 /*! @brief Define type of timer decrement.*/
<> 144:ef7eb2e8f9f7 108 typedef enum _flexio_timer_decrement_source
<> 144:ef7eb2e8f9f7 109 {
<> 144:ef7eb2e8f9f7 110 kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput = 0x0U, /*!< Decrement counter on FlexIO clock, Shift clock
<> 144:ef7eb2e8f9f7 111 equals Timer output. */
<> 144:ef7eb2e8f9f7 112 kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput = 0x1U, /*!< Decrement counter on Trigger input (both edges),
<> 144:ef7eb2e8f9f7 113 Shift clock equals Timer output. */
<> 144:ef7eb2e8f9f7 114 kFLEXIO_TimerDecSrcOnPinInputShiftPinInput = 0x2U, /*!< Decrement counter on Pin input (both edges),
<> 144:ef7eb2e8f9f7 115 Shift clock equals Pin input. */
<> 144:ef7eb2e8f9f7 116 kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput = 0x3U, /*!< Decrement counter on Trigger input (both edges),
<> 144:ef7eb2e8f9f7 117 Shift clock equals Trigger input. */
<> 144:ef7eb2e8f9f7 118 } flexio_timer_decrement_source_t;
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 /*! @brief Define type of timer reset condition.*/
<> 144:ef7eb2e8f9f7 121 typedef enum _flexio_timer_reset_condition
<> 144:ef7eb2e8f9f7 122 {
<> 144:ef7eb2e8f9f7 123 kFLEXIO_TimerResetNever = 0x0U, /*!< Timer never reset. */
<> 144:ef7eb2e8f9f7 124 kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput = 0x2U, /*!< Timer reset on Timer Pin equal to Timer Output. */
<> 144:ef7eb2e8f9f7 125 kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput = 0x3U, /*!< Timer reset on Timer Trigger equal to
<> 144:ef7eb2e8f9f7 126 Timer Output. */
<> 144:ef7eb2e8f9f7 127 kFLEXIO_TimerResetOnTimerPinRisingEdge = 0x4U, /*!< Timer reset on Timer Pin rising edge. */
<> 144:ef7eb2e8f9f7 128 kFLEXIO_TimerResetOnTimerTriggerRisingEdge = 0x6U, /*!< Timer reset on Trigger rising edge. */
<> 144:ef7eb2e8f9f7 129 kFLEXIO_TimerResetOnTimerTriggerBothEdge = 0x7U, /*!< Timer reset on Trigger rising or falling edge. */
<> 144:ef7eb2e8f9f7 130 } flexio_timer_reset_condition_t;
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /*! @brief Define type of timer disable condition.*/
<> 144:ef7eb2e8f9f7 133 typedef enum _flexio_timer_disable_condition
<> 144:ef7eb2e8f9f7 134 {
<> 144:ef7eb2e8f9f7 135 kFLEXIO_TimerDisableNever = 0x0U, /*!< Timer never disabled. */
<> 144:ef7eb2e8f9f7 136 kFLEXIO_TimerDisableOnPreTimerDisable = 0x1U, /*!< Timer disabled on Timer N-1 disable. */
<> 144:ef7eb2e8f9f7 137 kFLEXIO_TimerDisableOnTimerCompare = 0x2U, /*!< Timer disabled on Timer compare. */
<> 144:ef7eb2e8f9f7 138 kFLEXIO_TimerDisableOnTimerCompareTriggerLow = 0x3U, /*!< Timer disabled on Timer compare and Trigger Low. */
<> 144:ef7eb2e8f9f7 139 kFLEXIO_TimerDisableOnPinBothEdge = 0x4U, /*!< Timer disabled on Pin rising or falling edge. */
<> 144:ef7eb2e8f9f7 140 kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh = 0x5U, /*!< Timer disabled on Pin rising or falling edge provided
<> 144:ef7eb2e8f9f7 141 Trigger is high. */
<> 144:ef7eb2e8f9f7 142 kFLEXIO_TimerDisableOnTriggerFallingEdge = 0x6U, /*!< Timer disabled on Trigger falling edge. */
<> 144:ef7eb2e8f9f7 143 } flexio_timer_disable_condition_t;
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 /*! @brief Define type of timer enable condition.*/
<> 144:ef7eb2e8f9f7 146 typedef enum _flexio_timer_enable_condition
<> 144:ef7eb2e8f9f7 147 {
<> 144:ef7eb2e8f9f7 148 kFLEXIO_TimerEnabledAlways = 0x0U, /*!< Timer always enabled. */
<> 144:ef7eb2e8f9f7 149 kFLEXIO_TimerEnableOnPrevTimerEnable = 0x1U, /*!< Timer enabled on Timer N-1 enable. */
<> 144:ef7eb2e8f9f7 150 kFLEXIO_TimerEnableOnTriggerHigh = 0x2U, /*!< Timer enabled on Trigger high. */
<> 144:ef7eb2e8f9f7 151 kFLEXIO_TimerEnableOnTriggerHighPinHigh = 0x3U, /*!< Timer enabled on Trigger high and Pin high. */
<> 144:ef7eb2e8f9f7 152 kFLEXIO_TimerEnableOnPinRisingEdge = 0x4U, /*!< Timer enabled on Pin rising edge. */
<> 144:ef7eb2e8f9f7 153 kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh = 0x5U, /*!< Timer enabled on Pin rising edge and Trigger high. */
<> 144:ef7eb2e8f9f7 154 kFLEXIO_TimerEnableOnTriggerRisingEdge = 0x6U, /*!< Timer enabled on Trigger rising edge. */
<> 144:ef7eb2e8f9f7 155 kFLEXIO_TimerEnableOnTriggerBothEdge = 0x7U, /*!< Timer enabled on Trigger rising or falling edge. */
<> 144:ef7eb2e8f9f7 156 } flexio_timer_enable_condition_t;
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 /*! @brief Define type of timer stop bit generate condition.*/
<> 144:ef7eb2e8f9f7 159 typedef enum _flexio_timer_stop_bit_condition
<> 144:ef7eb2e8f9f7 160 {
<> 144:ef7eb2e8f9f7 161 kFLEXIO_TimerStopBitDisabled = 0x0U, /*!< Stop bit disabled. */
<> 144:ef7eb2e8f9f7 162 kFLEXIO_TimerStopBitEnableOnTimerCompare = 0x1U, /*!< Stop bit is enabled on timer compare. */
<> 144:ef7eb2e8f9f7 163 kFLEXIO_TimerStopBitEnableOnTimerDisable = 0x2U, /*!< Stop bit is enabled on timer disable. */
<> 144:ef7eb2e8f9f7 164 kFLEXIO_TimerStopBitEnableOnTimerCompareDisable = 0x3U, /*!< Stop bit is enabled on timer compare and timer
<> 144:ef7eb2e8f9f7 165 disable. */
<> 144:ef7eb2e8f9f7 166 } flexio_timer_stop_bit_condition_t;
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 /*! @brief Define type of timer start bit generate condition.*/
<> 144:ef7eb2e8f9f7 169 typedef enum _flexio_timer_start_bit_condition
<> 144:ef7eb2e8f9f7 170 {
<> 144:ef7eb2e8f9f7 171 kFLEXIO_TimerStartBitDisabled = 0x0U, /*!< Start bit disabled. */
<> 144:ef7eb2e8f9f7 172 kFLEXIO_TimerStartBitEnabled = 0x1U, /*!< Start bit enabled. */
<> 144:ef7eb2e8f9f7 173 } flexio_timer_start_bit_condition_t;
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /*! @brief Define type of timer polarity for shifter control. */
<> 144:ef7eb2e8f9f7 176 typedef enum _flexio_shifter_timer_polarity
<> 144:ef7eb2e8f9f7 177 {
<> 144:ef7eb2e8f9f7 178 kFLEXIO_ShifterTimerPolarityOnPositive = 0x0U, /* Shift on positive edge of shift clock. */
<> 144:ef7eb2e8f9f7 179 kFLEXIO_ShifterTimerPolarityOnNegitive = 0x1U, /* Shift on negative edge of shift clock. */
<> 144:ef7eb2e8f9f7 180 } flexio_shifter_timer_polarity_t;
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 /*! @brief Define type of shifter working mode.*/
<> 144:ef7eb2e8f9f7 183 typedef enum _flexio_shifter_mode
<> 144:ef7eb2e8f9f7 184 {
<> 144:ef7eb2e8f9f7 185 kFLEXIO_ShifterDisabled = 0x0U, /*!< Shifter is disabled. */
<> 144:ef7eb2e8f9f7 186 kFLEXIO_ShifterModeReceive = 0x1U, /*!< Receive mode. */
<> 144:ef7eb2e8f9f7 187 kFLEXIO_ShifterModeTransmit = 0x2U, /*!< Transmit mode. */
<> 144:ef7eb2e8f9f7 188 kFLEXIO_ShifterModeMatchStore = 0x4U, /*!< Match store mode. */
<> 144:ef7eb2e8f9f7 189 kFLEXIO_ShifterModeMatchContinuous = 0x5U, /*!< Match continuous mode. */
<> 144:ef7eb2e8f9f7 190 #if FSL_FEATURE_FLEXIO_HAS_STATE_MODE
<> 144:ef7eb2e8f9f7 191 kFLEXIO_ShifterModeState = 0x6U, /*!< SHIFTBUF contents are used for storing
<> 144:ef7eb2e8f9f7 192 programmable state attributes. */
<> 144:ef7eb2e8f9f7 193 #endif /* FSL_FEATURE_FLEXIO_HAS_STATE_MODE */
<> 144:ef7eb2e8f9f7 194 #if FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE
<> 144:ef7eb2e8f9f7 195 kFLEXIO_ShifterModeLogic = 0x7U, /*!< SHIFTBUF contents are used for implementing
<> 144:ef7eb2e8f9f7 196 programmable logic look up table. */
<> 144:ef7eb2e8f9f7 197 #endif /* FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE */
<> 144:ef7eb2e8f9f7 198 } flexio_shifter_mode_t;
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /*! @brief Define type of shifter input source.*/
<> 144:ef7eb2e8f9f7 201 typedef enum _flexio_shifter_input_source
<> 144:ef7eb2e8f9f7 202 {
<> 144:ef7eb2e8f9f7 203 kFLEXIO_ShifterInputFromPin = 0x0U, /*!< Shifter input from pin. */
<> 144:ef7eb2e8f9f7 204 kFLEXIO_ShifterInputFromNextShifterOutput = 0x1U, /*!< Shifter input from Shifter N+1. */
<> 144:ef7eb2e8f9f7 205 } flexio_shifter_input_source_t;
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /*! @brief Define of STOP bit configuration.*/
<> 144:ef7eb2e8f9f7 208 typedef enum _flexio_shifter_stop_bit
<> 144:ef7eb2e8f9f7 209 {
<> 144:ef7eb2e8f9f7 210 kFLEXIO_ShifterStopBitDisable = 0x0U, /*!< Disable shifter stop bit. */
<> 144:ef7eb2e8f9f7 211 kFLEXIO_ShifterStopBitLow = 0x2U, /*!< Set shifter stop bit to logic low level. */
<> 144:ef7eb2e8f9f7 212 kFLEXIO_ShifterStopBitHigh = 0x3U, /*!< Set shifter stop bit to logic high level. */
<> 144:ef7eb2e8f9f7 213 } flexio_shifter_stop_bit_t;
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /*! @brief Define type of START bit configuration.*/
<> 144:ef7eb2e8f9f7 216 typedef enum _flexio_shifter_start_bit
<> 144:ef7eb2e8f9f7 217 {
<> 144:ef7eb2e8f9f7 218 kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable = 0x0U, /*!< Disable shifter start bit, transmitter loads
<> 144:ef7eb2e8f9f7 219 data on enable. */
<> 144:ef7eb2e8f9f7 220 kFLEXIO_ShifterStartBitDisabledLoadDataOnShift = 0x1U, /*!< Disable shifter start bit, transmitter loads
<> 144:ef7eb2e8f9f7 221 data on first shift. */
<> 144:ef7eb2e8f9f7 222 kFLEXIO_ShifterStartBitLow = 0x2U, /*!< Set shifter start bit to logic low level. */
<> 144:ef7eb2e8f9f7 223 kFLEXIO_ShifterStartBitHigh = 0x3U, /*!< Set shifter start bit to logic high level. */
<> 144:ef7eb2e8f9f7 224 } flexio_shifter_start_bit_t;
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 /*! @brief Define FlexIO shifter buffer type*/
<> 144:ef7eb2e8f9f7 227 typedef enum _flexio_shifter_buffer_type
<> 144:ef7eb2e8f9f7 228 {
<> 144:ef7eb2e8f9f7 229 kFLEXIO_ShifterBuffer = 0x0U, /*!< Shifter Buffer N Register. */
<> 144:ef7eb2e8f9f7 230 kFLEXIO_ShifterBufferBitSwapped = 0x1U, /*!< Shifter Buffer N Bit Byte Swapped Register. */
<> 144:ef7eb2e8f9f7 231 kFLEXIO_ShifterBufferByteSwapped = 0x2U, /*!< Shifter Buffer N Byte Swapped Register. */
<> 144:ef7eb2e8f9f7 232 kFLEXIO_ShifterBufferBitByteSwapped = 0x3U, /*!< Shifter Buffer N Bit Swapped Register. */
<> 144:ef7eb2e8f9f7 233 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP
<> 144:ef7eb2e8f9f7 234 kFLEXIO_ShifterBufferNibbleByteSwapped = 0x4U, /*!< Shifter Buffer N Nibble Byte Swapped Register. */
<> 144:ef7eb2e8f9f7 235 #endif /*FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP*/
<> 144:ef7eb2e8f9f7 236 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP
<> 144:ef7eb2e8f9f7 237 kFLEXIO_ShifterBufferHalfWordSwapped = 0x5U, /*!< Shifter Buffer N Half Word Swapped Register. */
<> 144:ef7eb2e8f9f7 238 #endif
<> 144:ef7eb2e8f9f7 239 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP
<> 144:ef7eb2e8f9f7 240 kFLEXIO_ShifterBufferNibbleSwapped = 0x6U, /*!< Shifter Buffer N Nibble Swapped Register. */
<> 144:ef7eb2e8f9f7 241 #endif
<> 144:ef7eb2e8f9f7 242 } flexio_shifter_buffer_type_t;
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /*! @brief Define FlexIO user configuration structure. */
<> 144:ef7eb2e8f9f7 245 typedef struct _flexio_config_
<> 144:ef7eb2e8f9f7 246 {
<> 144:ef7eb2e8f9f7 247 bool enableFlexio; /*!< Enable/disable FlexIO module */
<> 144:ef7eb2e8f9f7 248 bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode */
<> 144:ef7eb2e8f9f7 249 bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode */
<> 144:ef7eb2e8f9f7 250 bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, fast access requires
<> 144:ef7eb2e8f9f7 251 the FlexIO clock to be at least twice the frequency of the bus clock. */
<> 144:ef7eb2e8f9f7 252 } flexio_config_t;
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 /*! @brief Define FlexIO timer configuration structure. */
<> 144:ef7eb2e8f9f7 255 typedef struct _flexio_timer_config
<> 144:ef7eb2e8f9f7 256 {
<> 144:ef7eb2e8f9f7 257 /* Trigger. */
<> 144:ef7eb2e8f9f7 258 uint32_t triggerSelect; /*!< The internal trigger selection number using MACROs. */
<> 144:ef7eb2e8f9f7 259 flexio_timer_trigger_polarity_t triggerPolarity; /*!< Trigger Polarity. */
<> 144:ef7eb2e8f9f7 260 flexio_timer_trigger_source_t triggerSource; /*!< Trigger Source, internal (see 'trgsel') or external. */
<> 144:ef7eb2e8f9f7 261 /* Pin. */
<> 144:ef7eb2e8f9f7 262 flexio_pin_config_t pinConfig; /*!< Timer Pin Configuration. */
<> 144:ef7eb2e8f9f7 263 uint32_t pinSelect; /*!< Timer Pin number Select. */
<> 144:ef7eb2e8f9f7 264 flexio_pin_polarity_t pinPolarity; /*!< Timer Pin Polarity. */
<> 144:ef7eb2e8f9f7 265 /* Timer. */
<> 144:ef7eb2e8f9f7 266 flexio_timer_mode_t timerMode; /*!< Timer work Mode. */
<> 144:ef7eb2e8f9f7 267 flexio_timer_output_t timerOutput; /*!< Configures the initial state of the Timer Output and
<> 144:ef7eb2e8f9f7 268 whether it is affected by the Timer reset. */
<> 144:ef7eb2e8f9f7 269 flexio_timer_decrement_source_t timerDecrement; /*!< Configures the source of the Timer decrement and the
<> 144:ef7eb2e8f9f7 270 source of the Shift clock. */
<> 144:ef7eb2e8f9f7 271 flexio_timer_reset_condition_t timerReset; /*!< Configures the condition that causes the timer counter
<> 144:ef7eb2e8f9f7 272 (and optionally the timer output) to be reset. */
<> 144:ef7eb2e8f9f7 273 flexio_timer_disable_condition_t timerDisable; /*!< Configures the condition that causes the Timer to be
<> 144:ef7eb2e8f9f7 274 disabled and stop decrementing. */
<> 144:ef7eb2e8f9f7 275 flexio_timer_enable_condition_t timerEnable; /*!< Configures the condition that causes the Timer to be
<> 144:ef7eb2e8f9f7 276 enabled and start decrementing. */
<> 144:ef7eb2e8f9f7 277 flexio_timer_stop_bit_condition_t timerStop; /*!< Timer STOP Bit generation. */
<> 144:ef7eb2e8f9f7 278 flexio_timer_start_bit_condition_t timerStart; /*!< Timer STRAT Bit generation. */
<> 144:ef7eb2e8f9f7 279 uint32_t timerCompare; /*!< Value for Timer Compare N Register. */
<> 144:ef7eb2e8f9f7 280 } flexio_timer_config_t;
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 /*! @brief Define FlexIO shifter configuration structure. */
<> 144:ef7eb2e8f9f7 283 typedef struct _flexio_shifter_config
<> 144:ef7eb2e8f9f7 284 {
<> 144:ef7eb2e8f9f7 285 /* Timer. */
<> 144:ef7eb2e8f9f7 286 uint32_t timerSelect; /*!< Selects which Timer is used for controlling the
<> 144:ef7eb2e8f9f7 287 logic/shift register and generating the Shift clock. */
<> 144:ef7eb2e8f9f7 288 flexio_shifter_timer_polarity_t timerPolarity; /*!< Timer Polarity. */
<> 144:ef7eb2e8f9f7 289 /* Pin. */
<> 144:ef7eb2e8f9f7 290 flexio_pin_config_t pinConfig; /*!< Shifter Pin Configuration. */
<> 144:ef7eb2e8f9f7 291 uint32_t pinSelect; /*!< Shifter Pin number Select. */
<> 144:ef7eb2e8f9f7 292 flexio_pin_polarity_t pinPolarity; /*!< Shifter Pin Polarity. */
<> 144:ef7eb2e8f9f7 293 /* Shifter. */
<> 144:ef7eb2e8f9f7 294 flexio_shifter_mode_t shifterMode; /*!< Configures the mode of the Shifter. */
<> 144:ef7eb2e8f9f7 295 #if FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
<> 144:ef7eb2e8f9f7 296 uint32_t parallelWidth; /*!< Configures the parallel width when using parallel mode.*/
<> 144:ef7eb2e8f9f7 297 #endif /* FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH */
<> 144:ef7eb2e8f9f7 298 flexio_shifter_input_source_t inputSource; /*!< Selects the input source for the shifter. */
<> 144:ef7eb2e8f9f7 299 flexio_shifter_stop_bit_t shifterStop; /*!< Shifter STOP bit. */
<> 144:ef7eb2e8f9f7 300 flexio_shifter_start_bit_t shifterStart; /*!< Shifter START bit. */
<> 144:ef7eb2e8f9f7 301 } flexio_shifter_config_t;
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /*! @brief typedef for FlexIO simulated driver interrupt handler.*/
<> 144:ef7eb2e8f9f7 304 typedef void (*flexio_isr_t)(void *base, void *handle);
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /*******************************************************************************
<> 144:ef7eb2e8f9f7 307 * API
<> 144:ef7eb2e8f9f7 308 ******************************************************************************/
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 311 extern "C" {
<> 144:ef7eb2e8f9f7 312 #endif /*_cplusplus*/
<> 144:ef7eb2e8f9f7 313
<> 144:ef7eb2e8f9f7 314 /*!
<> 144:ef7eb2e8f9f7 315 * @name FlexIO Initialization and De-initialization
<> 144:ef7eb2e8f9f7 316 * @{
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /*!
<> 144:ef7eb2e8f9f7 320 * @brief Gets the default configuration to configure FlexIO module. The configuration
<> 144:ef7eb2e8f9f7 321 * can used directly for calling FLEXIO_Configure().
<> 144:ef7eb2e8f9f7 322 *
<> 144:ef7eb2e8f9f7 323 * Example:
<> 144:ef7eb2e8f9f7 324 @code
<> 144:ef7eb2e8f9f7 325 flexio_config_t config;
<> 144:ef7eb2e8f9f7 326 FLEXIO_GetDefaultConfig(&config);
<> 144:ef7eb2e8f9f7 327 @endcode
<> 144:ef7eb2e8f9f7 328 *
<> 144:ef7eb2e8f9f7 329 * @param userConfig pointer to flexio_config_t structure
<> 144:ef7eb2e8f9f7 330 */
<> 144:ef7eb2e8f9f7 331 void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig);
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 /*!
<> 144:ef7eb2e8f9f7 334 * @brief Configures the FlexIO with FlexIO configuration. The configuration structure
<> 144:ef7eb2e8f9f7 335 * can be filled by the user, or be set with default values by FLEXIO_GetDefaultConfig().
<> 144:ef7eb2e8f9f7 336 *
<> 144:ef7eb2e8f9f7 337 * Example
<> 144:ef7eb2e8f9f7 338 @code
<> 144:ef7eb2e8f9f7 339 flexio_config_t config = {
<> 144:ef7eb2e8f9f7 340 .enableFlexio = true,
<> 144:ef7eb2e8f9f7 341 .enableInDoze = false,
<> 144:ef7eb2e8f9f7 342 .enableInDebug = true,
<> 144:ef7eb2e8f9f7 343 .enableFastAccess = false
<> 144:ef7eb2e8f9f7 344 };
<> 144:ef7eb2e8f9f7 345 FLEXIO_Configure(base, &config);
<> 144:ef7eb2e8f9f7 346 @endcode
<> 144:ef7eb2e8f9f7 347 *
<> 144:ef7eb2e8f9f7 348 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 349 * @param userConfig pointer to flexio_config_t structure
<> 144:ef7eb2e8f9f7 350 */
<> 144:ef7eb2e8f9f7 351 void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig);
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 /*!
<> 144:ef7eb2e8f9f7 354 * @brief Gates the FlexIO clock. Call this API to stop the FlexIO clock.
<> 144:ef7eb2e8f9f7 355 *
<> 144:ef7eb2e8f9f7 356 * @note After calling this API, call the FLEXO_Init to use the FlexIO module.
<> 144:ef7eb2e8f9f7 357 *
<> 144:ef7eb2e8f9f7 358 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 359 */
<> 144:ef7eb2e8f9f7 360 void FLEXIO_Deinit(FLEXIO_Type *base);
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /* @} */
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 /*!
<> 144:ef7eb2e8f9f7 365 * @name FlexIO Basic Operation
<> 144:ef7eb2e8f9f7 366 * @{
<> 144:ef7eb2e8f9f7 367 */
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 /*!
<> 144:ef7eb2e8f9f7 370 * @brief Resets the FlexIO module.
<> 144:ef7eb2e8f9f7 371 *
<> 144:ef7eb2e8f9f7 372 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 373 */
<> 144:ef7eb2e8f9f7 374 void FLEXIO_Reset(FLEXIO_Type *base);
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 /*!
<> 144:ef7eb2e8f9f7 377 * @brief Enables the FlexIO module operation.
<> 144:ef7eb2e8f9f7 378 *
<> 144:ef7eb2e8f9f7 379 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 380 * @param enable true to enable, false to disable.
<> 144:ef7eb2e8f9f7 381 */
<> 144:ef7eb2e8f9f7 382 static inline void FLEXIO_Enable(FLEXIO_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 383 {
<> 144:ef7eb2e8f9f7 384 if (enable)
<> 144:ef7eb2e8f9f7 385 {
<> 144:ef7eb2e8f9f7 386 base->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
<> 144:ef7eb2e8f9f7 387 }
<> 144:ef7eb2e8f9f7 388 else
<> 144:ef7eb2e8f9f7 389 {
<> 144:ef7eb2e8f9f7 390 base->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK;
<> 144:ef7eb2e8f9f7 391 }
<> 144:ef7eb2e8f9f7 392 }
<> 144:ef7eb2e8f9f7 393
<> 144:ef7eb2e8f9f7 394 #if defined(FSL_FEATURE_FLEXIO_HAS_PIN_STATUS) && FSL_FEATURE_FLEXIO_HAS_PIN_STATUS
<> 144:ef7eb2e8f9f7 395 /*!
<> 144:ef7eb2e8f9f7 396 * @brief Reads the input data on each of the FlexIO pins.
<> 144:ef7eb2e8f9f7 397 *
<> 144:ef7eb2e8f9f7 398 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 399 * @return FlexIO pin input data
<> 144:ef7eb2e8f9f7 400 */
<> 144:ef7eb2e8f9f7 401 static inline uint32_t FLEXIO_ReadPinInput(FLEXIO_Type *base)
<> 144:ef7eb2e8f9f7 402 {
<> 144:ef7eb2e8f9f7 403 return base->PIN;
<> 144:ef7eb2e8f9f7 404 }
<> 144:ef7eb2e8f9f7 405 #endif /*FSL_FEATURE_FLEXIO_HAS_PIN_STATUS*/
<> 144:ef7eb2e8f9f7 406
<> 144:ef7eb2e8f9f7 407 #if defined(FSL_FEATURE_FLEXIO_HAS_STATE_MODE) && FSL_FEATURE_FLEXIO_HAS_STATE_MODE
<> 144:ef7eb2e8f9f7 408 /*!
<> 144:ef7eb2e8f9f7 409 * @brief Gets the current state pointer for state mode use.
<> 144:ef7eb2e8f9f7 410 *
<> 144:ef7eb2e8f9f7 411 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 412 * @return current state pointer
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414 static inline uint8_t FLEXIO_GetShifterState(FLEXIO_Type *base)
<> 144:ef7eb2e8f9f7 415 {
<> 144:ef7eb2e8f9f7 416 return ((base->SHIFTSTATE) & FLEXIO_SHIFTSTATE_STATE_MASK);
<> 144:ef7eb2e8f9f7 417 }
<> 144:ef7eb2e8f9f7 418 #endif /*FSL_FEATURE_FLEXIO_HAS_STATE_MODE*/
<> 144:ef7eb2e8f9f7 419
<> 144:ef7eb2e8f9f7 420 /*!
<> 144:ef7eb2e8f9f7 421 * @brief Configures the shifter with shifter configuration. The configuration structure
<> 144:ef7eb2e8f9f7 422 * covers both the SHIFTCTL and SHIFTCFG registers. To configure the shifter to the proper
<> 144:ef7eb2e8f9f7 423 * mode, select which timer controls the shifter to shift, whether to generate start bit/stop
<> 144:ef7eb2e8f9f7 424 * bit, and the polarity of start bit and stop bit.
<> 144:ef7eb2e8f9f7 425 *
<> 144:ef7eb2e8f9f7 426 * Example
<> 144:ef7eb2e8f9f7 427 @code
<> 144:ef7eb2e8f9f7 428 flexio_shifter_config_t config = {
<> 144:ef7eb2e8f9f7 429 .timerSelect = 0,
<> 144:ef7eb2e8f9f7 430 .timerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive,
<> 144:ef7eb2e8f9f7 431 .pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
<> 144:ef7eb2e8f9f7 432 .pinPolarity = kFLEXIO_PinActiveLow,
<> 144:ef7eb2e8f9f7 433 .shifterMode = kFLEXIO_ShifterModeTransmit,
<> 144:ef7eb2e8f9f7 434 .inputSource = kFLEXIO_ShifterInputFromPin,
<> 144:ef7eb2e8f9f7 435 .shifterStop = kFLEXIO_ShifterStopBitHigh,
<> 144:ef7eb2e8f9f7 436 .shifterStart = kFLEXIO_ShifterStartBitLow
<> 144:ef7eb2e8f9f7 437 };
<> 144:ef7eb2e8f9f7 438 FLEXIO_SetShifterConfig(base, &config);
<> 144:ef7eb2e8f9f7 439 @endcode
<> 144:ef7eb2e8f9f7 440 *
<> 144:ef7eb2e8f9f7 441 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 442 * @param index shifter index
<> 144:ef7eb2e8f9f7 443 * @param shifterConfig pointer to flexio_shifter_config_t structure
<> 144:ef7eb2e8f9f7 444 */
<> 144:ef7eb2e8f9f7 445 void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig);
<> 144:ef7eb2e8f9f7 446 /*!
<> 144:ef7eb2e8f9f7 447 * @brief Configures the timer with the timer configuration. The configuration structure
<> 144:ef7eb2e8f9f7 448 * covers both the TIMCTL and TIMCFG registers. To configure the timer to the proper
<> 144:ef7eb2e8f9f7 449 * mode, select trigger source for timer and the timer pin output and the timing for timer.
<> 144:ef7eb2e8f9f7 450 *
<> 144:ef7eb2e8f9f7 451 * Example
<> 144:ef7eb2e8f9f7 452 @code
<> 144:ef7eb2e8f9f7 453 flexio_timer_config_t config = {
<> 144:ef7eb2e8f9f7 454 .triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
<> 144:ef7eb2e8f9f7 455 .triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow,
<> 144:ef7eb2e8f9f7 456 .triggerSource = kFLEXIO_TimerTriggerSourceInternal,
<> 144:ef7eb2e8f9f7 457 .pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
<> 144:ef7eb2e8f9f7 458 .pinSelect = 0,
<> 144:ef7eb2e8f9f7 459 .pinPolarity = kFLEXIO_PinActiveHigh,
<> 144:ef7eb2e8f9f7 460 .timerMode = kFLEXIO_TimerModeDual8BitBaudBit,
<> 144:ef7eb2e8f9f7 461 .timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset,
<> 144:ef7eb2e8f9f7 462 .timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput,
<> 144:ef7eb2e8f9f7 463 .timerReset = kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput,
<> 144:ef7eb2e8f9f7 464 .timerDisable = kFLEXIO_TimerDisableOnTimerCompare,
<> 144:ef7eb2e8f9f7 465 .timerEnable = kFLEXIO_TimerEnableOnTriggerHigh,
<> 144:ef7eb2e8f9f7 466 .timerStop = kFLEXIO_TimerStopBitEnableOnTimerDisable,
<> 144:ef7eb2e8f9f7 467 .timerStart = kFLEXIO_TimerStartBitEnabled
<> 144:ef7eb2e8f9f7 468 };
<> 144:ef7eb2e8f9f7 469 FLEXIO_SetTimerConfig(base, &config);
<> 144:ef7eb2e8f9f7 470 @endcode
<> 144:ef7eb2e8f9f7 471 *
<> 144:ef7eb2e8f9f7 472 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 473 * @param index timer index
<> 144:ef7eb2e8f9f7 474 * @param timerConfig pointer to flexio_timer_config_t structure
<> 144:ef7eb2e8f9f7 475 */
<> 144:ef7eb2e8f9f7 476 void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig);
<> 144:ef7eb2e8f9f7 477
<> 144:ef7eb2e8f9f7 478 /* @} */
<> 144:ef7eb2e8f9f7 479
<> 144:ef7eb2e8f9f7 480 /*!
<> 144:ef7eb2e8f9f7 481 * @name FlexIO Interrupt Operation
<> 144:ef7eb2e8f9f7 482 * @{
<> 144:ef7eb2e8f9f7 483 */
<> 144:ef7eb2e8f9f7 484
<> 144:ef7eb2e8f9f7 485 /*!
<> 144:ef7eb2e8f9f7 486 * @brief Enables the shifter status interrupt. The interrupt generates when the corresponding SSF is set.
<> 144:ef7eb2e8f9f7 487 *
<> 144:ef7eb2e8f9f7 488 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 489 * @param mask the shifter status mask which could be calculated by (1 << shifter index)
<> 144:ef7eb2e8f9f7 490 * @note for multiple shifter status interrupt enable, for example, two shifter status enable, could calculate
<> 144:ef7eb2e8f9f7 491 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
<> 144:ef7eb2e8f9f7 492 */
<> 144:ef7eb2e8f9f7 493 static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 494 {
<> 144:ef7eb2e8f9f7 495 base->SHIFTSIEN |= mask;
<> 144:ef7eb2e8f9f7 496 }
<> 144:ef7eb2e8f9f7 497
<> 144:ef7eb2e8f9f7 498 /*!
<> 144:ef7eb2e8f9f7 499 * @brief Disables the shifter status interrupt. The interrupt won't generate when the corresponding SSF is set.
<> 144:ef7eb2e8f9f7 500 *
<> 144:ef7eb2e8f9f7 501 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 502 * @param mask the shifter status mask which could be calculated by (1 << shifter index)
<> 144:ef7eb2e8f9f7 503 * @note for multiple shifter status interrupt enable, for example, two shifter status enable, could calculate
<> 144:ef7eb2e8f9f7 504 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
<> 144:ef7eb2e8f9f7 505 */
<> 144:ef7eb2e8f9f7 506 static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 507 {
<> 144:ef7eb2e8f9f7 508 base->SHIFTSIEN &= ~mask;
<> 144:ef7eb2e8f9f7 509 }
<> 144:ef7eb2e8f9f7 510
<> 144:ef7eb2e8f9f7 511 /*!
<> 144:ef7eb2e8f9f7 512 * @brief Enables the shifter error interrupt. The interrupt generates when the corresponding SEF is set.
<> 144:ef7eb2e8f9f7 513 *
<> 144:ef7eb2e8f9f7 514 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 515 * @param mask the shifter error mask which could be calculated by (1 << shifter index)
<> 144:ef7eb2e8f9f7 516 * @note for multiple shifter error interrupt enable, for example, two shifter error enable, could calculate
<> 144:ef7eb2e8f9f7 517 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
<> 144:ef7eb2e8f9f7 518 */
<> 144:ef7eb2e8f9f7 519 static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 520 {
<> 144:ef7eb2e8f9f7 521 base->SHIFTEIEN |= mask;
<> 144:ef7eb2e8f9f7 522 }
<> 144:ef7eb2e8f9f7 523
<> 144:ef7eb2e8f9f7 524 /*!
<> 144:ef7eb2e8f9f7 525 * @brief Disables the shifter error interrupt. The interrupt won't generate when the corresponding SEF is set.
<> 144:ef7eb2e8f9f7 526 *
<> 144:ef7eb2e8f9f7 527 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 528 * @param mask the shifter error mask which could be calculated by (1 << shifter index)
<> 144:ef7eb2e8f9f7 529 * @note for multiple shifter error interrupt enable, for example, two shifter error enable, could calculate
<> 144:ef7eb2e8f9f7 530 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
<> 144:ef7eb2e8f9f7 531 */
<> 144:ef7eb2e8f9f7 532 static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 533 {
<> 144:ef7eb2e8f9f7 534 base->SHIFTEIEN &= ~mask;
<> 144:ef7eb2e8f9f7 535 }
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 /*!
<> 144:ef7eb2e8f9f7 538 * @brief Enables the timer status interrupt. The interrupt generates when the corresponding SSF is set.
<> 144:ef7eb2e8f9f7 539 *
<> 144:ef7eb2e8f9f7 540 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 541 * @param mask the timer status mask which could be calculated by (1 << timer index)
<> 144:ef7eb2e8f9f7 542 * @note for multiple timer status interrupt enable, for example, two timer status enable, could calculate
<> 144:ef7eb2e8f9f7 543 * the mask by using ((1 << timer index0) | (1 << timer index1))
<> 144:ef7eb2e8f9f7 544 */
<> 144:ef7eb2e8f9f7 545 static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 546 {
<> 144:ef7eb2e8f9f7 547 base->TIMIEN |= mask;
<> 144:ef7eb2e8f9f7 548 }
<> 144:ef7eb2e8f9f7 549
<> 144:ef7eb2e8f9f7 550 /*!
<> 144:ef7eb2e8f9f7 551 * @brief Disables the timer status interrupt. The interrupt won't generate when the corresponding SSF is set.
<> 144:ef7eb2e8f9f7 552 *
<> 144:ef7eb2e8f9f7 553 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 554 * @param mask the timer status mask which could be calculated by (1 << timer index)
<> 144:ef7eb2e8f9f7 555 * @note for multiple timer status interrupt enable, for example, two timer status enable, could calculate
<> 144:ef7eb2e8f9f7 556 * the mask by using ((1 << timer index0) | (1 << timer index1))
<> 144:ef7eb2e8f9f7 557 */
<> 144:ef7eb2e8f9f7 558 static inline void FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 559 {
<> 144:ef7eb2e8f9f7 560 base->TIMIEN &= ~mask;
<> 144:ef7eb2e8f9f7 561 }
<> 144:ef7eb2e8f9f7 562
<> 144:ef7eb2e8f9f7 563 /* @} */
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 /*!
<> 144:ef7eb2e8f9f7 566 * @name FlexIO Status Operation
<> 144:ef7eb2e8f9f7 567 * @{
<> 144:ef7eb2e8f9f7 568 */
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570 /*!
<> 144:ef7eb2e8f9f7 571 * @brief Gets the shifter status flags.
<> 144:ef7eb2e8f9f7 572 *
<> 144:ef7eb2e8f9f7 573 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 574 * @return shifter status flags
<> 144:ef7eb2e8f9f7 575 */
<> 144:ef7eb2e8f9f7 576 static inline uint32_t FLEXIO_GetShifterStatusFlags(FLEXIO_Type *base)
<> 144:ef7eb2e8f9f7 577 {
<> 144:ef7eb2e8f9f7 578 return ((base->SHIFTSTAT) & FLEXIO_SHIFTSTAT_SSF_MASK);
<> 144:ef7eb2e8f9f7 579 }
<> 144:ef7eb2e8f9f7 580
<> 144:ef7eb2e8f9f7 581 /*!
<> 144:ef7eb2e8f9f7 582 * @brief Clears the shifter status flags.
<> 144:ef7eb2e8f9f7 583 *
<> 144:ef7eb2e8f9f7 584 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 585 * @param mask the shifter status mask which could be calculated by (1 << shifter index)
<> 144:ef7eb2e8f9f7 586 * @note for clearing multiple shifter status flags, for example, two shifter status flags, could calculate
<> 144:ef7eb2e8f9f7 587 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
<> 144:ef7eb2e8f9f7 588 */
<> 144:ef7eb2e8f9f7 589 static inline void FLEXIO_ClearShifterStatusFlags(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 590 {
<> 144:ef7eb2e8f9f7 591 base->SHIFTSTAT = mask;
<> 144:ef7eb2e8f9f7 592 }
<> 144:ef7eb2e8f9f7 593
<> 144:ef7eb2e8f9f7 594 /*!
<> 144:ef7eb2e8f9f7 595 * @brief Gets the shifter error flags.
<> 144:ef7eb2e8f9f7 596 *
<> 144:ef7eb2e8f9f7 597 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 598 * @return shifter error flags
<> 144:ef7eb2e8f9f7 599 */
<> 144:ef7eb2e8f9f7 600 static inline uint32_t FLEXIO_GetShifterErrorFlags(FLEXIO_Type *base)
<> 144:ef7eb2e8f9f7 601 {
<> 144:ef7eb2e8f9f7 602 return ((base->SHIFTERR) & FLEXIO_SHIFTERR_SEF_MASK);
<> 144:ef7eb2e8f9f7 603 }
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 /*!
<> 144:ef7eb2e8f9f7 606 * @brief Clears the shifter error flags.
<> 144:ef7eb2e8f9f7 607 *
<> 144:ef7eb2e8f9f7 608 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 609 * @param mask the shifter error mask which could be calculated by (1 << shifter index)
<> 144:ef7eb2e8f9f7 610 * @note for clearing multiple shifter error flags, for example, two shifter error flags, could calculate
<> 144:ef7eb2e8f9f7 611 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
<> 144:ef7eb2e8f9f7 612 */
<> 144:ef7eb2e8f9f7 613 static inline void FLEXIO_ClearShifterErrorFlags(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 614 {
<> 144:ef7eb2e8f9f7 615 base->SHIFTERR = mask;
<> 144:ef7eb2e8f9f7 616 }
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 /*!
<> 144:ef7eb2e8f9f7 619 * @brief Gets the timer status flags.
<> 144:ef7eb2e8f9f7 620 *
<> 144:ef7eb2e8f9f7 621 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 622 * @return timer status flags
<> 144:ef7eb2e8f9f7 623 */
<> 144:ef7eb2e8f9f7 624 static inline uint32_t FLEXIO_GetTimerStatusFlags(FLEXIO_Type *base)
<> 144:ef7eb2e8f9f7 625 {
<> 144:ef7eb2e8f9f7 626 return ((base->TIMSTAT) & FLEXIO_TIMSTAT_TSF_MASK);
<> 144:ef7eb2e8f9f7 627 }
<> 144:ef7eb2e8f9f7 628
<> 144:ef7eb2e8f9f7 629 /*!
<> 144:ef7eb2e8f9f7 630 * @brief Clears the timer status flags.
<> 144:ef7eb2e8f9f7 631 *
<> 144:ef7eb2e8f9f7 632 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 633 * @param mask the timer status mask which could be calculated by (1 << timer index)
<> 144:ef7eb2e8f9f7 634 * @note for clearing multiple timer status flags, for example, two timer status flags, could calculate
<> 144:ef7eb2e8f9f7 635 * the mask by using ((1 << timer index0) | (1 << timer index1))
<> 144:ef7eb2e8f9f7 636 */
<> 144:ef7eb2e8f9f7 637 static inline void FLEXIO_ClearTimerStatusFlags(FLEXIO_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 638 {
<> 144:ef7eb2e8f9f7 639 base->TIMSTAT = mask;
<> 144:ef7eb2e8f9f7 640 }
<> 144:ef7eb2e8f9f7 641
<> 144:ef7eb2e8f9f7 642 /* @} */
<> 144:ef7eb2e8f9f7 643
<> 144:ef7eb2e8f9f7 644 /*!
<> 144:ef7eb2e8f9f7 645 * @name FlexIO DMA Operation
<> 144:ef7eb2e8f9f7 646 * @{
<> 144:ef7eb2e8f9f7 647 */
<> 144:ef7eb2e8f9f7 648
<> 144:ef7eb2e8f9f7 649 /*!
<> 144:ef7eb2e8f9f7 650 * @brief Enables/disables the shifter status DMA. The DMA request generates when the corresponding SSF is set.
<> 144:ef7eb2e8f9f7 651 *
<> 144:ef7eb2e8f9f7 652 * @note For multiple shifter status DMA enables, for example, calculate
<> 144:ef7eb2e8f9f7 653 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
<> 144:ef7eb2e8f9f7 654 *
<> 144:ef7eb2e8f9f7 655 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 656 * @param mask the shifter status mask which could be calculated by (1 << shifter index)
<> 144:ef7eb2e8f9f7 657 * @param enable True to enable, false to disable.
<> 144:ef7eb2e8f9f7 658 */
<> 144:ef7eb2e8f9f7 659 static inline void FLEXIO_EnableShifterStatusDMA(FLEXIO_Type *base, uint32_t mask, bool enable)
<> 144:ef7eb2e8f9f7 660 {
<> 144:ef7eb2e8f9f7 661 if (enable)
<> 144:ef7eb2e8f9f7 662 {
<> 144:ef7eb2e8f9f7 663 base->SHIFTSDEN |= mask;
<> 144:ef7eb2e8f9f7 664 }
<> 144:ef7eb2e8f9f7 665 else
<> 144:ef7eb2e8f9f7 666 {
<> 144:ef7eb2e8f9f7 667 base->SHIFTSDEN &= ~mask;
<> 144:ef7eb2e8f9f7 668 }
<> 144:ef7eb2e8f9f7 669 }
<> 144:ef7eb2e8f9f7 670
<> 144:ef7eb2e8f9f7 671 /*!
<> 144:ef7eb2e8f9f7 672 * @brief Gets the shifter buffer address for the DMA transfer usage.
<> 144:ef7eb2e8f9f7 673 *
<> 144:ef7eb2e8f9f7 674 * @param base FlexIO peripheral base address
<> 144:ef7eb2e8f9f7 675 * @param type shifter type of flexio_shifter_buffer_type_t
<> 144:ef7eb2e8f9f7 676 * @param index shifter index
<> 144:ef7eb2e8f9f7 677 * @return corresponding shifter buffer index
<> 144:ef7eb2e8f9f7 678 */
<> 144:ef7eb2e8f9f7 679 uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index);
<> 144:ef7eb2e8f9f7 680
<> 144:ef7eb2e8f9f7 681 /*!
<> 144:ef7eb2e8f9f7 682 * @brief Registers the handle and the interrupt handler for the FlexIO-simulated peripheral.
<> 144:ef7eb2e8f9f7 683 *
<> 144:ef7eb2e8f9f7 684 * @param base pointer to FlexIO simulated peripheral type.
<> 144:ef7eb2e8f9f7 685 * @param handle pointer to handler for FlexIO simulated peripheral.
<> 144:ef7eb2e8f9f7 686 * @param isr FlexIO simulated peripheral interrupt handler.
<> 144:ef7eb2e8f9f7 687 * @retval kStatus_Success Successfully create the handle.
<> 144:ef7eb2e8f9f7 688 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
<> 144:ef7eb2e8f9f7 689 */
<> 144:ef7eb2e8f9f7 690 status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr);
<> 144:ef7eb2e8f9f7 691
<> 144:ef7eb2e8f9f7 692 /*!
<> 144:ef7eb2e8f9f7 693 * @brief Unregisters the handle and the interrupt handler for the FlexIO-simulated peripheral.
<> 144:ef7eb2e8f9f7 694 *
<> 144:ef7eb2e8f9f7 695 * @param base pointer to FlexIO simulated peripheral type.
<> 144:ef7eb2e8f9f7 696 * @retval kStatus_Success Successfully create the handle.
<> 144:ef7eb2e8f9f7 697 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
<> 144:ef7eb2e8f9f7 698 */
<> 144:ef7eb2e8f9f7 699 status_t FLEXIO_UnregisterHandleIRQ(void *base);
<> 144:ef7eb2e8f9f7 700 /* @} */
<> 144:ef7eb2e8f9f7 701
<> 144:ef7eb2e8f9f7 702 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 703 }
<> 144:ef7eb2e8f9f7 704 #endif /*_cplusplus*/
<> 144:ef7eb2e8f9f7 705 /*@}*/
<> 144:ef7eb2e8f9f7 706
<> 144:ef7eb2e8f9f7 707 #endif /*_FSL_FLEXIO_H_*/