added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_smc.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
<> | 144:ef7eb2e8f9f7 | 3 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 4 | * |
<> | 144:ef7eb2e8f9f7 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 6 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
<> | 144:ef7eb2e8f9f7 | 9 | * of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
<> | 144:ef7eb2e8f9f7 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
<> | 144:ef7eb2e8f9f7 | 13 | * other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
<> | 144:ef7eb2e8f9f7 | 16 | * contributors may be used to endorse or promote products derived from this |
<> | 144:ef7eb2e8f9f7 | 17 | * software without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 18 | * |
<> | 144:ef7eb2e8f9f7 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 144:ef7eb2e8f9f7 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 144:ef7eb2e8f9f7 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 144:ef7eb2e8f9f7 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 144:ef7eb2e8f9f7 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 144:ef7eb2e8f9f7 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 144:ef7eb2e8f9f7 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 144:ef7eb2e8f9f7 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 144:ef7eb2e8f9f7 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 29 | */ |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | #ifndef _FSL_SMC_H_ |
<> | 144:ef7eb2e8f9f7 | 32 | #define _FSL_SMC_H_ |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | #include "fsl_common.h" |
<> | 144:ef7eb2e8f9f7 | 35 | |
<> | 144:ef7eb2e8f9f7 | 36 | /*! @addtogroup smc */ |
<> | 144:ef7eb2e8f9f7 | 37 | /*! @{ */ |
<> | 144:ef7eb2e8f9f7 | 38 | |
<> | 144:ef7eb2e8f9f7 | 39 | /*! @file */ |
<> | 144:ef7eb2e8f9f7 | 40 | |
<> | 144:ef7eb2e8f9f7 | 41 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 42 | * Definitions |
<> | 144:ef7eb2e8f9f7 | 43 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 44 | |
<> | 144:ef7eb2e8f9f7 | 45 | /*! @name Driver version */ |
<> | 144:ef7eb2e8f9f7 | 46 | /*@{*/ |
<> | 144:ef7eb2e8f9f7 | 47 | /*! @brief SMC driver version 2.0.1. */ |
<> | 144:ef7eb2e8f9f7 | 48 | #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) |
<> | 144:ef7eb2e8f9f7 | 49 | /*@}*/ |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | /*! |
<> | 144:ef7eb2e8f9f7 | 52 | * @brief Power Modes Protection |
<> | 144:ef7eb2e8f9f7 | 53 | */ |
<> | 144:ef7eb2e8f9f7 | 54 | typedef enum _smc_power_mode_protection |
<> | 144:ef7eb2e8f9f7 | 55 | { |
<> | 144:ef7eb2e8f9f7 | 56 | #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 57 | kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */ |
<> | 144:ef7eb2e8f9f7 | 58 | #endif |
<> | 144:ef7eb2e8f9f7 | 59 | #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 60 | kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */ |
<> | 144:ef7eb2e8f9f7 | 61 | #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ |
<> | 144:ef7eb2e8f9f7 | 62 | kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */ |
<> | 144:ef7eb2e8f9f7 | 63 | #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) |
<> | 144:ef7eb2e8f9f7 | 64 | kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */ |
<> | 144:ef7eb2e8f9f7 | 65 | #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ |
<> | 144:ef7eb2e8f9f7 | 66 | kSMC_AllowPowerModeAll = (0U |
<> | 144:ef7eb2e8f9f7 | 67 | #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 68 | | |
<> | 144:ef7eb2e8f9f7 | 69 | SMC_PMPROT_AVLLS_MASK |
<> | 144:ef7eb2e8f9f7 | 70 | #endif |
<> | 144:ef7eb2e8f9f7 | 71 | #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 72 | | |
<> | 144:ef7eb2e8f9f7 | 73 | SMC_PMPROT_ALLS_MASK |
<> | 144:ef7eb2e8f9f7 | 74 | #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ |
<> | 144:ef7eb2e8f9f7 | 75 | | |
<> | 144:ef7eb2e8f9f7 | 76 | SMC_PMPROT_AVLP_MASK |
<> | 144:ef7eb2e8f9f7 | 77 | #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) |
<> | 144:ef7eb2e8f9f7 | 78 | | |
<> | 144:ef7eb2e8f9f7 | 79 | kSMC_AllowPowerModeHsrun |
<> | 144:ef7eb2e8f9f7 | 80 | #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ |
<> | 144:ef7eb2e8f9f7 | 81 | ) /*!< Allow all power mode. */ |
<> | 144:ef7eb2e8f9f7 | 82 | } smc_power_mode_protection_t; |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | /*! |
<> | 144:ef7eb2e8f9f7 | 85 | * @brief Power Modes in PMSTAT |
<> | 144:ef7eb2e8f9f7 | 86 | */ |
<> | 144:ef7eb2e8f9f7 | 87 | typedef enum _smc_power_state |
<> | 144:ef7eb2e8f9f7 | 88 | { |
<> | 144:ef7eb2e8f9f7 | 89 | kSMC_PowerStateRun = 0x01U << 0U, /*!< 0000_0001 - Current power mode is RUN */ |
<> | 144:ef7eb2e8f9f7 | 90 | kSMC_PowerStateStop = 0x01U << 1U, /*!< 0000_0010 - Current power mode is STOP */ |
<> | 144:ef7eb2e8f9f7 | 91 | kSMC_PowerStateVlpr = 0x01U << 2U, /*!< 0000_0100 - Current power mode is VLPR */ |
<> | 144:ef7eb2e8f9f7 | 92 | kSMC_PowerStateVlpw = 0x01U << 3U, /*!< 0000_1000 - Current power mode is VLPW */ |
<> | 144:ef7eb2e8f9f7 | 93 | kSMC_PowerStateVlps = 0x01U << 4U, /*!< 0001_0000 - Current power mode is VLPS */ |
<> | 144:ef7eb2e8f9f7 | 94 | #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 95 | kSMC_PowerStateLls = 0x01U << 5U, /*!< 0010_0000 - Current power mode is LLS */ |
<> | 144:ef7eb2e8f9f7 | 96 | #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ |
<> | 144:ef7eb2e8f9f7 | 97 | #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 98 | kSMC_PowerStateVlls = 0x01U << 6U, /*!< 0100_0000 - Current power mode is VLLS */ |
<> | 144:ef7eb2e8f9f7 | 99 | #endif |
<> | 144:ef7eb2e8f9f7 | 100 | #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) |
<> | 144:ef7eb2e8f9f7 | 101 | kSMC_PowerStateHsrun = 0x01U << 7U /*!< 1000_0000 - Current power mode is HSRUN */ |
<> | 144:ef7eb2e8f9f7 | 102 | #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ |
<> | 144:ef7eb2e8f9f7 | 103 | } smc_power_state_t; |
<> | 144:ef7eb2e8f9f7 | 104 | |
<> | 144:ef7eb2e8f9f7 | 105 | /*! |
<> | 144:ef7eb2e8f9f7 | 106 | * @brief Run mode definition |
<> | 144:ef7eb2e8f9f7 | 107 | */ |
<> | 144:ef7eb2e8f9f7 | 108 | typedef enum _smc_run_mode |
<> | 144:ef7eb2e8f9f7 | 109 | { |
<> | 144:ef7eb2e8f9f7 | 110 | kSMC_RunNormal = 0U, /*!< normal RUN mode. */ |
<> | 144:ef7eb2e8f9f7 | 111 | kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */ |
<> | 144:ef7eb2e8f9f7 | 112 | #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) |
<> | 144:ef7eb2e8f9f7 | 113 | kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */ |
<> | 144:ef7eb2e8f9f7 | 114 | #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ |
<> | 144:ef7eb2e8f9f7 | 115 | } smc_run_mode_t; |
<> | 144:ef7eb2e8f9f7 | 116 | |
<> | 144:ef7eb2e8f9f7 | 117 | /*! |
<> | 144:ef7eb2e8f9f7 | 118 | * @brief Stop mode definition |
<> | 144:ef7eb2e8f9f7 | 119 | */ |
<> | 144:ef7eb2e8f9f7 | 120 | typedef enum _smc_stop_mode |
<> | 144:ef7eb2e8f9f7 | 121 | { |
<> | 144:ef7eb2e8f9f7 | 122 | kSMC_StopNormal = 0U, /*!< Normal STOP mode. */ |
<> | 144:ef7eb2e8f9f7 | 123 | kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */ |
<> | 144:ef7eb2e8f9f7 | 124 | #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 125 | kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */ |
<> | 144:ef7eb2e8f9f7 | 126 | #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ |
<> | 144:ef7eb2e8f9f7 | 127 | #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 128 | kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */ |
<> | 144:ef7eb2e8f9f7 | 129 | #endif |
<> | 144:ef7eb2e8f9f7 | 130 | } smc_stop_mode_t; |
<> | 144:ef7eb2e8f9f7 | 131 | |
<> | 144:ef7eb2e8f9f7 | 132 | #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \ |
<> | 144:ef7eb2e8f9f7 | 133 | (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \ |
<> | 144:ef7eb2e8f9f7 | 134 | (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) |
<> | 144:ef7eb2e8f9f7 | 135 | /*! |
<> | 144:ef7eb2e8f9f7 | 136 | * @brief VLLS/LLS stop sub mode definition |
<> | 144:ef7eb2e8f9f7 | 137 | */ |
<> | 144:ef7eb2e8f9f7 | 138 | typedef enum _smc_stop_submode |
<> | 144:ef7eb2e8f9f7 | 139 | { |
<> | 144:ef7eb2e8f9f7 | 140 | kSMC_StopSub0 = 0U, /*!< Stop submode 0, for VLLS0/LLS0. */ |
<> | 144:ef7eb2e8f9f7 | 141 | kSMC_StopSub1 = 1U, /*!< Stop submode 1, for VLLS1/LLS1. */ |
<> | 144:ef7eb2e8f9f7 | 142 | kSMC_StopSub2 = 2U, /*!< Stop submode 2, for VLLS2/LLS2. */ |
<> | 144:ef7eb2e8f9f7 | 143 | kSMC_StopSub3 = 3U /*!< Stop submode 3, for VLLS3/LLS3. */ |
<> | 144:ef7eb2e8f9f7 | 144 | } smc_stop_submode_t; |
<> | 144:ef7eb2e8f9f7 | 145 | #endif |
<> | 144:ef7eb2e8f9f7 | 146 | |
<> | 144:ef7eb2e8f9f7 | 147 | /*! |
<> | 144:ef7eb2e8f9f7 | 148 | * @brief Partial STOP option |
<> | 144:ef7eb2e8f9f7 | 149 | */ |
<> | 144:ef7eb2e8f9f7 | 150 | typedef enum _smc_partial_stop_mode |
<> | 144:ef7eb2e8f9f7 | 151 | { |
<> | 144:ef7eb2e8f9f7 | 152 | kSMC_PartialStop = 0U, /*!< STOP - Normal Stop mode*/ |
<> | 144:ef7eb2e8f9f7 | 153 | kSMC_PartialStop1 = 1U, /*!< Partial Stop with both system and bus clocks disabled*/ |
<> | 144:ef7eb2e8f9f7 | 154 | kSMC_PartialStop2 = 2U, /*!< Partial Stop with system clock disabled and bus clock enabled*/ |
<> | 144:ef7eb2e8f9f7 | 155 | } smc_partial_stop_option_t; |
<> | 144:ef7eb2e8f9f7 | 156 | |
<> | 144:ef7eb2e8f9f7 | 157 | /*! |
<> | 144:ef7eb2e8f9f7 | 158 | * @brief SMC configuration status |
<> | 144:ef7eb2e8f9f7 | 159 | */ |
<> | 144:ef7eb2e8f9f7 | 160 | enum _smc_status |
<> | 144:ef7eb2e8f9f7 | 161 | { |
<> | 144:ef7eb2e8f9f7 | 162 | kStatus_SMC_StopAbort = MAKE_STATUS(kStatusGroup_POWER, 0) /*!< Entering Stop mode is abort*/ |
<> | 144:ef7eb2e8f9f7 | 163 | }; |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | #if (defined(FSL_FEATURE_SMC_HAS_VERID) && FSL_FEATURE_SMC_HAS_VERID) |
<> | 144:ef7eb2e8f9f7 | 166 | /*! |
<> | 144:ef7eb2e8f9f7 | 167 | * @brief IP version ID definition. |
<> | 144:ef7eb2e8f9f7 | 168 | */ |
<> | 144:ef7eb2e8f9f7 | 169 | typedef struct _smc_version_id |
<> | 144:ef7eb2e8f9f7 | 170 | { |
<> | 144:ef7eb2e8f9f7 | 171 | uint16_t feature; /*!< Feature Specification Number. */ |
<> | 144:ef7eb2e8f9f7 | 172 | uint8_t minor; /*!< Minor version number. */ |
<> | 144:ef7eb2e8f9f7 | 173 | uint8_t major; /*!< Major version number. */ |
<> | 144:ef7eb2e8f9f7 | 174 | } smc_version_id_t; |
<> | 144:ef7eb2e8f9f7 | 175 | #endif /* FSL_FEATURE_SMC_HAS_VERID */ |
<> | 144:ef7eb2e8f9f7 | 176 | |
<> | 144:ef7eb2e8f9f7 | 177 | #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) |
<> | 144:ef7eb2e8f9f7 | 178 | /*! |
<> | 144:ef7eb2e8f9f7 | 179 | * @brief IP parameter definition. |
<> | 144:ef7eb2e8f9f7 | 180 | */ |
<> | 144:ef7eb2e8f9f7 | 181 | typedef struct _smc_param |
<> | 144:ef7eb2e8f9f7 | 182 | { |
<> | 144:ef7eb2e8f9f7 | 183 | bool hsrunEnable; /*!< HSRUN mode enable. */ |
<> | 144:ef7eb2e8f9f7 | 184 | bool llsEnable; /*!< LLS mode enable. */ |
<> | 144:ef7eb2e8f9f7 | 185 | bool lls2Enable; /*!< LLS2 mode enable. */ |
<> | 144:ef7eb2e8f9f7 | 186 | bool vlls0Enable; /*!< VLLS0 mode enable. */ |
<> | 144:ef7eb2e8f9f7 | 187 | } smc_param_t; |
<> | 144:ef7eb2e8f9f7 | 188 | #endif /* FSL_FEATURE_SMC_HAS_PARAM */ |
<> | 144:ef7eb2e8f9f7 | 189 | |
<> | 144:ef7eb2e8f9f7 | 190 | #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ |
<> | 144:ef7eb2e8f9f7 | 191 | (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) |
<> | 144:ef7eb2e8f9f7 | 192 | /*! |
<> | 144:ef7eb2e8f9f7 | 193 | * @brief SMC Low-Leakage Stop power mode config |
<> | 144:ef7eb2e8f9f7 | 194 | */ |
<> | 144:ef7eb2e8f9f7 | 195 | typedef struct _smc_power_mode_lls_config |
<> | 144:ef7eb2e8f9f7 | 196 | { |
<> | 144:ef7eb2e8f9f7 | 197 | #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) |
<> | 144:ef7eb2e8f9f7 | 198 | smc_stop_submode_t subMode; /*!< Low-leakage Stop sub-mode */ |
<> | 144:ef7eb2e8f9f7 | 199 | #endif |
<> | 144:ef7eb2e8f9f7 | 200 | #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) |
<> | 144:ef7eb2e8f9f7 | 201 | bool enableLpoClock; /*!< Enable LPO clock in LLS mode */ |
<> | 144:ef7eb2e8f9f7 | 202 | #endif |
<> | 144:ef7eb2e8f9f7 | 203 | } smc_power_mode_lls_config_t; |
<> | 144:ef7eb2e8f9f7 | 204 | #endif /* (FSL_FEATURE_SMC_HAS_LLS_SUBMODE || FSL_FEATURE_SMC_HAS_LPOPO) */ |
<> | 144:ef7eb2e8f9f7 | 205 | |
<> | 144:ef7eb2e8f9f7 | 206 | #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 207 | /*! |
<> | 144:ef7eb2e8f9f7 | 208 | * @brief SMC Very Low-Leakage Stop power mode config |
<> | 144:ef7eb2e8f9f7 | 209 | */ |
<> | 144:ef7eb2e8f9f7 | 210 | typedef struct _smc_power_mode_vlls_config |
<> | 144:ef7eb2e8f9f7 | 211 | { |
<> | 144:ef7eb2e8f9f7 | 212 | #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \ |
<> | 144:ef7eb2e8f9f7 | 213 | (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \ |
<> | 144:ef7eb2e8f9f7 | 214 | (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) |
<> | 144:ef7eb2e8f9f7 | 215 | smc_stop_submode_t subMode; /*!< Very Low-leakage Stop sub-mode */ |
<> | 144:ef7eb2e8f9f7 | 216 | #endif |
<> | 144:ef7eb2e8f9f7 | 217 | #if (defined(FSL_FEATURE_SMC_HAS_PORPO) && FSL_FEATURE_SMC_HAS_PORPO) |
<> | 144:ef7eb2e8f9f7 | 218 | bool enablePorDetectInVlls0; /*!< Enable Power on reset detect in VLLS mode */ |
<> | 144:ef7eb2e8f9f7 | 219 | #endif |
<> | 144:ef7eb2e8f9f7 | 220 | #if (defined(FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION) && FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION) |
<> | 144:ef7eb2e8f9f7 | 221 | bool enableRam2InVlls2; /*!< Enable RAM2 power in VLLS2 */ |
<> | 144:ef7eb2e8f9f7 | 222 | #endif |
<> | 144:ef7eb2e8f9f7 | 223 | #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) |
<> | 144:ef7eb2e8f9f7 | 224 | bool enableLpoClock; /*!< Enable LPO clock in VLLS mode */ |
<> | 144:ef7eb2e8f9f7 | 225 | #endif |
<> | 144:ef7eb2e8f9f7 | 226 | } smc_power_mode_vlls_config_t; |
<> | 144:ef7eb2e8f9f7 | 227 | #endif |
<> | 144:ef7eb2e8f9f7 | 228 | |
<> | 144:ef7eb2e8f9f7 | 229 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 230 | * API |
<> | 144:ef7eb2e8f9f7 | 231 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 232 | |
<> | 144:ef7eb2e8f9f7 | 233 | #if defined(__cplusplus) |
<> | 144:ef7eb2e8f9f7 | 234 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 235 | #endif /* __cplusplus */ |
<> | 144:ef7eb2e8f9f7 | 236 | |
<> | 144:ef7eb2e8f9f7 | 237 | /*! @name System mode controller APIs*/ |
<> | 144:ef7eb2e8f9f7 | 238 | /*@{*/ |
<> | 144:ef7eb2e8f9f7 | 239 | |
<> | 144:ef7eb2e8f9f7 | 240 | #if (defined(FSL_FEATURE_SMC_HAS_VERID) && FSL_FEATURE_SMC_HAS_VERID) |
<> | 144:ef7eb2e8f9f7 | 241 | /*! |
<> | 144:ef7eb2e8f9f7 | 242 | * @brief Gets the SMC version ID. |
<> | 144:ef7eb2e8f9f7 | 243 | * |
<> | 144:ef7eb2e8f9f7 | 244 | * This function gets the SMC version ID, including major version number, |
<> | 144:ef7eb2e8f9f7 | 245 | * minor version number and feature specification number. |
<> | 144:ef7eb2e8f9f7 | 246 | * |
<> | 144:ef7eb2e8f9f7 | 247 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 248 | * @param versionId Pointer to version ID structure. |
<> | 144:ef7eb2e8f9f7 | 249 | */ |
<> | 144:ef7eb2e8f9f7 | 250 | static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId) |
<> | 144:ef7eb2e8f9f7 | 251 | { |
<> | 144:ef7eb2e8f9f7 | 252 | *((uint32_t *)versionId) = base->VERID; |
<> | 144:ef7eb2e8f9f7 | 253 | } |
<> | 144:ef7eb2e8f9f7 | 254 | #endif /* FSL_FEATURE_SMC_HAS_VERID */ |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) |
<> | 144:ef7eb2e8f9f7 | 257 | /*! |
<> | 144:ef7eb2e8f9f7 | 258 | * @brief Gets the SMC parameter. |
<> | 144:ef7eb2e8f9f7 | 259 | * |
<> | 144:ef7eb2e8f9f7 | 260 | * This function gets the SMC parameter, including the enabled power mdoes. |
<> | 144:ef7eb2e8f9f7 | 261 | * |
<> | 144:ef7eb2e8f9f7 | 262 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 263 | * @param param Pointer to SMC param structure. |
<> | 144:ef7eb2e8f9f7 | 264 | */ |
<> | 144:ef7eb2e8f9f7 | 265 | void SMC_GetParam(SMC_Type *base, smc_param_t *param); |
<> | 144:ef7eb2e8f9f7 | 266 | #endif |
<> | 144:ef7eb2e8f9f7 | 267 | |
<> | 144:ef7eb2e8f9f7 | 268 | /*! |
<> | 144:ef7eb2e8f9f7 | 269 | * @brief Configures all power mode protection settings. |
<> | 144:ef7eb2e8f9f7 | 270 | * |
<> | 144:ef7eb2e8f9f7 | 271 | * This function configures the power mode protection settings for |
<> | 144:ef7eb2e8f9f7 | 272 | * supported power modes in the specified chip family. The available power modes |
<> | 144:ef7eb2e8f9f7 | 273 | * are defined in the smc_power_mode_protection_t. This should be done at an early |
<> | 144:ef7eb2e8f9f7 | 274 | * system level initialization stage. See the reference manual for details. |
<> | 144:ef7eb2e8f9f7 | 275 | * This register can only write once after the power reset. |
<> | 144:ef7eb2e8f9f7 | 276 | * |
<> | 144:ef7eb2e8f9f7 | 277 | * The allowed modes are passed as bit map, for example, to allow LLS and VLLS, |
<> | 144:ef7eb2e8f9f7 | 278 | * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps). |
<> | 144:ef7eb2e8f9f7 | 279 | * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll). |
<> | 144:ef7eb2e8f9f7 | 280 | * |
<> | 144:ef7eb2e8f9f7 | 281 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 282 | * @param allowedModes Bitmap of the allowed power modes. |
<> | 144:ef7eb2e8f9f7 | 283 | */ |
<> | 144:ef7eb2e8f9f7 | 284 | static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedModes) |
<> | 144:ef7eb2e8f9f7 | 285 | { |
<> | 144:ef7eb2e8f9f7 | 286 | base->PMPROT = allowedModes; |
<> | 144:ef7eb2e8f9f7 | 287 | } |
<> | 144:ef7eb2e8f9f7 | 288 | |
<> | 144:ef7eb2e8f9f7 | 289 | /*! |
<> | 144:ef7eb2e8f9f7 | 290 | * @brief Gets the current power mode status. |
<> | 144:ef7eb2e8f9f7 | 291 | * |
<> | 144:ef7eb2e8f9f7 | 292 | * This function returns the current power mode stat. Once application |
<> | 144:ef7eb2e8f9f7 | 293 | * switches the power mode, it should always check the stat to check whether it |
<> | 144:ef7eb2e8f9f7 | 294 | * runs into the specified mode or not. An application should check |
<> | 144:ef7eb2e8f9f7 | 295 | * this mode before switching to a different mode. The system requires that |
<> | 144:ef7eb2e8f9f7 | 296 | * only certain modes can switch to other specific modes. See the |
<> | 144:ef7eb2e8f9f7 | 297 | * reference manual for details and the smc_power_state_t for information about |
<> | 144:ef7eb2e8f9f7 | 298 | * the power stat. |
<> | 144:ef7eb2e8f9f7 | 299 | * |
<> | 144:ef7eb2e8f9f7 | 300 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 301 | * @return Current power mode status. |
<> | 144:ef7eb2e8f9f7 | 302 | */ |
<> | 144:ef7eb2e8f9f7 | 303 | static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base) |
<> | 144:ef7eb2e8f9f7 | 304 | { |
<> | 144:ef7eb2e8f9f7 | 305 | return (smc_power_state_t)base->PMSTAT; |
<> | 144:ef7eb2e8f9f7 | 306 | } |
<> | 144:ef7eb2e8f9f7 | 307 | |
<> | 144:ef7eb2e8f9f7 | 308 | /*! |
<> | 144:ef7eb2e8f9f7 | 309 | * @brief Configure the system to RUN power mode. |
<> | 144:ef7eb2e8f9f7 | 310 | * |
<> | 144:ef7eb2e8f9f7 | 311 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 312 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 313 | */ |
<> | 144:ef7eb2e8f9f7 | 314 | status_t SMC_SetPowerModeRun(SMC_Type *base); |
<> | 144:ef7eb2e8f9f7 | 315 | |
<> | 144:ef7eb2e8f9f7 | 316 | #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) |
<> | 144:ef7eb2e8f9f7 | 317 | /*! |
<> | 144:ef7eb2e8f9f7 | 318 | * @brief Configure the system to HSRUN power mode. |
<> | 144:ef7eb2e8f9f7 | 319 | * |
<> | 144:ef7eb2e8f9f7 | 320 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 321 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 322 | */ |
<> | 144:ef7eb2e8f9f7 | 323 | status_t SMC_SetPowerModeHsrun(SMC_Type *base); |
<> | 144:ef7eb2e8f9f7 | 324 | #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ |
<> | 144:ef7eb2e8f9f7 | 325 | |
<> | 144:ef7eb2e8f9f7 | 326 | /*! |
<> | 144:ef7eb2e8f9f7 | 327 | * @brief Configure the system to WAIT power mode. |
<> | 144:ef7eb2e8f9f7 | 328 | * |
<> | 144:ef7eb2e8f9f7 | 329 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 330 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 331 | */ |
<> | 144:ef7eb2e8f9f7 | 332 | status_t SMC_SetPowerModeWait(SMC_Type *base); |
<> | 144:ef7eb2e8f9f7 | 333 | |
<> | 144:ef7eb2e8f9f7 | 334 | /*! |
<> | 144:ef7eb2e8f9f7 | 335 | * @brief Configure the system to Stop power mode. |
<> | 144:ef7eb2e8f9f7 | 336 | * |
<> | 144:ef7eb2e8f9f7 | 337 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 338 | * @param option Partial Stop mode option. |
<> | 144:ef7eb2e8f9f7 | 339 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 340 | */ |
<> | 144:ef7eb2e8f9f7 | 341 | status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option); |
<> | 144:ef7eb2e8f9f7 | 342 | |
<> | 144:ef7eb2e8f9f7 | 343 | #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) |
<> | 144:ef7eb2e8f9f7 | 344 | /*! |
<> | 144:ef7eb2e8f9f7 | 345 | * @brief Configure the system to VLPR power mode. |
<> | 144:ef7eb2e8f9f7 | 346 | * |
<> | 144:ef7eb2e8f9f7 | 347 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 348 | * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode. |
<> | 144:ef7eb2e8f9f7 | 349 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 350 | */ |
<> | 144:ef7eb2e8f9f7 | 351 | status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode); |
<> | 144:ef7eb2e8f9f7 | 352 | #else |
<> | 144:ef7eb2e8f9f7 | 353 | /*! |
<> | 144:ef7eb2e8f9f7 | 354 | * @brief Configure the system to VLPR power mode. |
<> | 144:ef7eb2e8f9f7 | 355 | * |
<> | 144:ef7eb2e8f9f7 | 356 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 357 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 358 | */ |
<> | 144:ef7eb2e8f9f7 | 359 | status_t SMC_SetPowerModeVlpr(SMC_Type *base); |
<> | 144:ef7eb2e8f9f7 | 360 | #endif /* FSL_FEATURE_SMC_HAS_LPWUI */ |
<> | 144:ef7eb2e8f9f7 | 361 | |
<> | 144:ef7eb2e8f9f7 | 362 | /*! |
<> | 144:ef7eb2e8f9f7 | 363 | * @brief Configure the system to VLPW power mode. |
<> | 144:ef7eb2e8f9f7 | 364 | * |
<> | 144:ef7eb2e8f9f7 | 365 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 366 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 367 | */ |
<> | 144:ef7eb2e8f9f7 | 368 | status_t SMC_SetPowerModeVlpw(SMC_Type *base); |
<> | 144:ef7eb2e8f9f7 | 369 | |
<> | 144:ef7eb2e8f9f7 | 370 | /*! |
<> | 144:ef7eb2e8f9f7 | 371 | * @brief Configure the system to VLPS power mode. |
<> | 144:ef7eb2e8f9f7 | 372 | * |
<> | 144:ef7eb2e8f9f7 | 373 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 374 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 375 | */ |
<> | 144:ef7eb2e8f9f7 | 376 | status_t SMC_SetPowerModeVlps(SMC_Type *base); |
<> | 144:ef7eb2e8f9f7 | 377 | |
<> | 144:ef7eb2e8f9f7 | 378 | #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 379 | #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ |
<> | 144:ef7eb2e8f9f7 | 380 | (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) |
<> | 144:ef7eb2e8f9f7 | 381 | /*! |
<> | 144:ef7eb2e8f9f7 | 382 | * @brief Configure the system to LLS power mode. |
<> | 144:ef7eb2e8f9f7 | 383 | * |
<> | 144:ef7eb2e8f9f7 | 384 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 385 | * @param config The LLS power mode configuration structure |
<> | 144:ef7eb2e8f9f7 | 386 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 387 | */ |
<> | 144:ef7eb2e8f9f7 | 388 | status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config); |
<> | 144:ef7eb2e8f9f7 | 389 | #else |
<> | 144:ef7eb2e8f9f7 | 390 | /*! |
<> | 144:ef7eb2e8f9f7 | 391 | * @brief Configure the system to LLS power mode. |
<> | 144:ef7eb2e8f9f7 | 392 | * |
<> | 144:ef7eb2e8f9f7 | 393 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 394 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 395 | */ |
<> | 144:ef7eb2e8f9f7 | 396 | status_t SMC_SetPowerModeLls(SMC_Type *base); |
<> | 144:ef7eb2e8f9f7 | 397 | #endif |
<> | 144:ef7eb2e8f9f7 | 398 | #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ |
<> | 144:ef7eb2e8f9f7 | 399 | |
<> | 144:ef7eb2e8f9f7 | 400 | #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) |
<> | 144:ef7eb2e8f9f7 | 401 | /*! |
<> | 144:ef7eb2e8f9f7 | 402 | * @brief Configure the system to VLLS power mode. |
<> | 144:ef7eb2e8f9f7 | 403 | * |
<> | 144:ef7eb2e8f9f7 | 404 | * @param base SMC peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 405 | * @param config The VLLS power mode configuration structure. |
<> | 144:ef7eb2e8f9f7 | 406 | * @return SMC configuration error code. |
<> | 144:ef7eb2e8f9f7 | 407 | */ |
<> | 144:ef7eb2e8f9f7 | 408 | status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config); |
<> | 144:ef7eb2e8f9f7 | 409 | #endif /* FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE */ |
<> | 144:ef7eb2e8f9f7 | 410 | |
<> | 144:ef7eb2e8f9f7 | 411 | /*@}*/ |
<> | 144:ef7eb2e8f9f7 | 412 | |
<> | 144:ef7eb2e8f9f7 | 413 | #if defined(__cplusplus) |
<> | 144:ef7eb2e8f9f7 | 414 | } |
<> | 144:ef7eb2e8f9f7 | 415 | #endif /* __cplusplus */ |
<> | 144:ef7eb2e8f9f7 | 416 | |
<> | 144:ef7eb2e8f9f7 | 417 | /*! @}*/ |
<> | 144:ef7eb2e8f9f7 | 418 | |
<> | 144:ef7eb2e8f9f7 | 419 | #endif /* _FSL_SMC_H_ */ |