Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_cmp.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 #include "fsl_cmp.h"
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 /*******************************************************************************
<> 144:ef7eb2e8f9f7 34 * Prototypes
<> 144:ef7eb2e8f9f7 35 ******************************************************************************/
<> 144:ef7eb2e8f9f7 36 /*!
<> 144:ef7eb2e8f9f7 37 * @brief Get instance number for CMP module.
<> 144:ef7eb2e8f9f7 38 *
<> 144:ef7eb2e8f9f7 39 * @param base CMP peripheral base address
<> 144:ef7eb2e8f9f7 40 */
<> 144:ef7eb2e8f9f7 41 static uint32_t CMP_GetInstance(CMP_Type *base);
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /*******************************************************************************
<> 144:ef7eb2e8f9f7 44 * Variables
<> 144:ef7eb2e8f9f7 45 ******************************************************************************/
<> 144:ef7eb2e8f9f7 46 /*! @brief Pointers to CMP bases for each instance. */
<> 144:ef7eb2e8f9f7 47 static CMP_Type *const s_cmpBases[] = CMP_BASE_PTRS;
<> 144:ef7eb2e8f9f7 48 /*! @brief Pointers to CMP clocks for each instance. */
<> 144:ef7eb2e8f9f7 49 const clock_ip_name_t s_cmpClocks[] = CMP_CLOCKS;
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /*******************************************************************************
<> 144:ef7eb2e8f9f7 52 * Codes
<> 144:ef7eb2e8f9f7 53 ******************************************************************************/
<> 144:ef7eb2e8f9f7 54 static uint32_t CMP_GetInstance(CMP_Type *base)
<> 144:ef7eb2e8f9f7 55 {
<> 144:ef7eb2e8f9f7 56 uint32_t instance;
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Find the instance index from base address mappings. */
<> 144:ef7eb2e8f9f7 59 for (instance = 0; instance < FSL_FEATURE_SOC_CMP_COUNT; instance++)
<> 144:ef7eb2e8f9f7 60 {
<> 144:ef7eb2e8f9f7 61 if (s_cmpBases[instance] == base)
<> 144:ef7eb2e8f9f7 62 {
<> 144:ef7eb2e8f9f7 63 break;
<> 144:ef7eb2e8f9f7 64 }
<> 144:ef7eb2e8f9f7 65 }
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 assert(instance < FSL_FEATURE_SOC_CMP_COUNT);
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 return instance;
<> 144:ef7eb2e8f9f7 70 }
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 void CMP_Init(CMP_Type *base, const cmp_config_t *config)
<> 144:ef7eb2e8f9f7 73 {
<> 144:ef7eb2e8f9f7 74 assert(NULL != config);
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint8_t tmp8;
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 /* Enable the clock. */
<> 144:ef7eb2e8f9f7 79 CLOCK_EnableClock(s_cmpClocks[CMP_GetInstance(base)]);
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /* Configure. */
<> 144:ef7eb2e8f9f7 82 CMP_Enable(base, false); /* Disable the CMP module during configuring. */
<> 144:ef7eb2e8f9f7 83 /* CMPx_CR1. */
<> 144:ef7eb2e8f9f7 84 tmp8 = base->CR1 & ~(CMP_CR1_PMODE_MASK | CMP_CR1_INV_MASK | CMP_CR1_COS_MASK | CMP_CR1_OPE_MASK);
<> 144:ef7eb2e8f9f7 85 if (config->enableHighSpeed)
<> 144:ef7eb2e8f9f7 86 {
<> 144:ef7eb2e8f9f7 87 tmp8 |= CMP_CR1_PMODE_MASK;
<> 144:ef7eb2e8f9f7 88 }
<> 144:ef7eb2e8f9f7 89 if (config->enableInvertOutput)
<> 144:ef7eb2e8f9f7 90 {
<> 144:ef7eb2e8f9f7 91 tmp8 |= CMP_CR1_INV_MASK;
<> 144:ef7eb2e8f9f7 92 }
<> 144:ef7eb2e8f9f7 93 if (config->useUnfilteredOutput)
<> 144:ef7eb2e8f9f7 94 {
<> 144:ef7eb2e8f9f7 95 tmp8 |= CMP_CR1_COS_MASK;
<> 144:ef7eb2e8f9f7 96 }
<> 144:ef7eb2e8f9f7 97 if (config->enablePinOut)
<> 144:ef7eb2e8f9f7 98 {
<> 144:ef7eb2e8f9f7 99 tmp8 |= CMP_CR1_OPE_MASK;
<> 144:ef7eb2e8f9f7 100 }
<> 144:ef7eb2e8f9f7 101 #if defined(FSL_FEATURE_CMP_HAS_TRIGGER_MODE) && FSL_FEATURE_CMP_HAS_TRIGGER_MODE
<> 144:ef7eb2e8f9f7 102 if (config->enableTriggerMode)
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 tmp8 |= CMP_CR1_TRIGM_MASK;
<> 144:ef7eb2e8f9f7 105 }
<> 144:ef7eb2e8f9f7 106 else
<> 144:ef7eb2e8f9f7 107 {
<> 144:ef7eb2e8f9f7 108 tmp8 &= ~CMP_CR1_TRIGM_MASK;
<> 144:ef7eb2e8f9f7 109 }
<> 144:ef7eb2e8f9f7 110 #endif /* FSL_FEATURE_CMP_HAS_TRIGGER_MODE */
<> 144:ef7eb2e8f9f7 111 base->CR1 = tmp8;
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /* CMPx_CR0. */
<> 144:ef7eb2e8f9f7 114 tmp8 = base->CR0 & ~CMP_CR0_HYSTCTR_MASK;
<> 144:ef7eb2e8f9f7 115 tmp8 |= CMP_CR0_HYSTCTR(config->hysteresisMode);
<> 144:ef7eb2e8f9f7 116 base->CR0 = tmp8;
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 CMP_Enable(base, config->enableCmp); /* Enable the CMP module after configured or not. */
<> 144:ef7eb2e8f9f7 119 }
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 void CMP_Deinit(CMP_Type *base)
<> 144:ef7eb2e8f9f7 122 {
<> 144:ef7eb2e8f9f7 123 /* Disable the CMP module. */
<> 144:ef7eb2e8f9f7 124 CMP_Enable(base, false);
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /* Disable the clock. */
<> 144:ef7eb2e8f9f7 127 CLOCK_DisableClock(s_cmpClocks[CMP_GetInstance(base)]);
<> 144:ef7eb2e8f9f7 128 }
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 void CMP_GetDefaultConfig(cmp_config_t *config)
<> 144:ef7eb2e8f9f7 131 {
<> 144:ef7eb2e8f9f7 132 assert(NULL != config);
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 config->enableCmp = true; /* Enable the CMP module after initialization. */
<> 144:ef7eb2e8f9f7 135 config->hysteresisMode = kCMP_HysteresisLevel0;
<> 144:ef7eb2e8f9f7 136 config->enableHighSpeed = false;
<> 144:ef7eb2e8f9f7 137 config->enableInvertOutput = false;
<> 144:ef7eb2e8f9f7 138 config->useUnfilteredOutput = false;
<> 144:ef7eb2e8f9f7 139 config->enablePinOut = false;
<> 144:ef7eb2e8f9f7 140 #if defined(FSL_FEATURE_CMP_HAS_TRIGGER_MODE) && FSL_FEATURE_CMP_HAS_TRIGGER_MODE
<> 144:ef7eb2e8f9f7 141 config->enableTriggerMode = false;
<> 144:ef7eb2e8f9f7 142 #endif /* FSL_FEATURE_CMP_HAS_TRIGGER_MODE */
<> 144:ef7eb2e8f9f7 143 }
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 void CMP_SetInputChannels(CMP_Type *base, uint8_t positiveChannel, uint8_t negativeChannel)
<> 144:ef7eb2e8f9f7 146 {
<> 144:ef7eb2e8f9f7 147 uint8_t tmp8 = base->MUXCR;
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 tmp8 &= ~(CMP_MUXCR_PSEL_MASK | CMP_MUXCR_MSEL_MASK);
<> 144:ef7eb2e8f9f7 150 tmp8 |= CMP_MUXCR_PSEL(positiveChannel) | CMP_MUXCR_MSEL(negativeChannel);
<> 144:ef7eb2e8f9f7 151 base->MUXCR = tmp8;
<> 144:ef7eb2e8f9f7 152 }
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 #if defined(FSL_FEATURE_CMP_HAS_DMA) && FSL_FEATURE_CMP_HAS_DMA
<> 144:ef7eb2e8f9f7 155 void CMP_EnableDMA(CMP_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 156 {
<> 144:ef7eb2e8f9f7 157 uint8_t tmp8 = base->SCR & ~(CMP_SCR_CFR_MASK | CMP_SCR_CFF_MASK); /* To avoid change the w1c bits. */
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 if (enable)
<> 144:ef7eb2e8f9f7 160 {
<> 144:ef7eb2e8f9f7 161 tmp8 |= CMP_SCR_DMAEN_MASK;
<> 144:ef7eb2e8f9f7 162 }
<> 144:ef7eb2e8f9f7 163 else
<> 144:ef7eb2e8f9f7 164 {
<> 144:ef7eb2e8f9f7 165 tmp8 &= ~CMP_SCR_DMAEN_MASK;
<> 144:ef7eb2e8f9f7 166 }
<> 144:ef7eb2e8f9f7 167 base->SCR = tmp8;
<> 144:ef7eb2e8f9f7 168 }
<> 144:ef7eb2e8f9f7 169 #endif /* FSL_FEATURE_CMP_HAS_DMA */
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 void CMP_SetFilterConfig(CMP_Type *base, const cmp_filter_config_t *config)
<> 144:ef7eb2e8f9f7 172 {
<> 144:ef7eb2e8f9f7 173 assert(NULL != config);
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 uint8_t tmp8;
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 #if defined(FSL_FEATURE_CMP_HAS_EXTERNAL_SAMPLE_SUPPORT) && FSL_FEATURE_CMP_HAS_EXTERNAL_SAMPLE_SUPPORT
<> 144:ef7eb2e8f9f7 178 /* Choose the clock source for sampling. */
<> 144:ef7eb2e8f9f7 179 if (config->enableSample)
<> 144:ef7eb2e8f9f7 180 {
<> 144:ef7eb2e8f9f7 181 base->CR1 |= CMP_CR1_SE_MASK; /* Choose the external SAMPLE clock. */
<> 144:ef7eb2e8f9f7 182 }
<> 144:ef7eb2e8f9f7 183 else
<> 144:ef7eb2e8f9f7 184 {
<> 144:ef7eb2e8f9f7 185 base->CR1 &= ~CMP_CR1_SE_MASK; /* Choose the internal divided bus clock. */
<> 144:ef7eb2e8f9f7 186 }
<> 144:ef7eb2e8f9f7 187 #endif /* FSL_FEATURE_CMP_HAS_EXTERNAL_SAMPLE_SUPPORT */
<> 144:ef7eb2e8f9f7 188 /* Set the filter count. */
<> 144:ef7eb2e8f9f7 189 tmp8 = base->CR0 & ~CMP_CR0_FILTER_CNT_MASK;
<> 144:ef7eb2e8f9f7 190 tmp8 |= CMP_CR0_FILTER_CNT(config->filterCount);
<> 144:ef7eb2e8f9f7 191 base->CR0 = tmp8;
<> 144:ef7eb2e8f9f7 192 /* Set the filter period. It is used as the divider to bus clock. */
<> 144:ef7eb2e8f9f7 193 base->FPR = CMP_FPR_FILT_PER(config->filterPeriod);
<> 144:ef7eb2e8f9f7 194 }
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 void CMP_SetDACConfig(CMP_Type *base, const cmp_dac_config_t *config)
<> 144:ef7eb2e8f9f7 197 {
<> 144:ef7eb2e8f9f7 198 uint8_t tmp8 = 0U;
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 if (NULL == config)
<> 144:ef7eb2e8f9f7 201 {
<> 144:ef7eb2e8f9f7 202 /* Passing "NULL" as input parameter means no available configuration. So the DAC feature is disabled.*/
<> 144:ef7eb2e8f9f7 203 base->DACCR = 0U;
<> 144:ef7eb2e8f9f7 204 return;
<> 144:ef7eb2e8f9f7 205 }
<> 144:ef7eb2e8f9f7 206 /* CMPx_DACCR. */
<> 144:ef7eb2e8f9f7 207 tmp8 |= CMP_DACCR_DACEN_MASK; /* Enable the internal DAC. */
<> 144:ef7eb2e8f9f7 208 if (kCMP_VrefSourceVin2 == config->referenceVoltageSource)
<> 144:ef7eb2e8f9f7 209 {
<> 144:ef7eb2e8f9f7 210 tmp8 |= CMP_DACCR_VRSEL_MASK;
<> 144:ef7eb2e8f9f7 211 }
<> 144:ef7eb2e8f9f7 212 tmp8 |= CMP_DACCR_VOSEL(config->DACValue);
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 base->DACCR = tmp8;
<> 144:ef7eb2e8f9f7 215 }
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 void CMP_EnableInterrupts(CMP_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 218 {
<> 144:ef7eb2e8f9f7 219 uint8_t tmp8 = base->SCR & ~(CMP_SCR_CFR_MASK | CMP_SCR_CFF_MASK); /* To avoid change the w1c bits. */
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221 if (0U != (kCMP_OutputRisingInterruptEnable & mask))
<> 144:ef7eb2e8f9f7 222 {
<> 144:ef7eb2e8f9f7 223 tmp8 |= CMP_SCR_IER_MASK;
<> 144:ef7eb2e8f9f7 224 }
<> 144:ef7eb2e8f9f7 225 if (0U != (kCMP_OutputFallingInterruptEnable & mask))
<> 144:ef7eb2e8f9f7 226 {
<> 144:ef7eb2e8f9f7 227 tmp8 |= CMP_SCR_IEF_MASK;
<> 144:ef7eb2e8f9f7 228 }
<> 144:ef7eb2e8f9f7 229 base->SCR = tmp8;
<> 144:ef7eb2e8f9f7 230 }
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 void CMP_DisableInterrupts(CMP_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 233 {
<> 144:ef7eb2e8f9f7 234 uint8_t tmp8 = base->SCR & ~(CMP_SCR_CFR_MASK | CMP_SCR_CFF_MASK); /* To avoid change the w1c bits. */
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 if (0U != (kCMP_OutputRisingInterruptEnable & mask))
<> 144:ef7eb2e8f9f7 237 {
<> 144:ef7eb2e8f9f7 238 tmp8 &= ~CMP_SCR_IER_MASK;
<> 144:ef7eb2e8f9f7 239 }
<> 144:ef7eb2e8f9f7 240 if (0U != (kCMP_OutputFallingInterruptEnable & mask))
<> 144:ef7eb2e8f9f7 241 {
<> 144:ef7eb2e8f9f7 242 tmp8 &= ~CMP_SCR_IEF_MASK;
<> 144:ef7eb2e8f9f7 243 }
<> 144:ef7eb2e8f9f7 244 base->SCR = tmp8;
<> 144:ef7eb2e8f9f7 245 }
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 uint32_t CMP_GetStatusFlags(CMP_Type *base)
<> 144:ef7eb2e8f9f7 248 {
<> 144:ef7eb2e8f9f7 249 uint32_t ret32 = 0U;
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 if (0U != (CMP_SCR_CFR_MASK & base->SCR))
<> 144:ef7eb2e8f9f7 252 {
<> 144:ef7eb2e8f9f7 253 ret32 |= kCMP_OutputRisingEventFlag;
<> 144:ef7eb2e8f9f7 254 }
<> 144:ef7eb2e8f9f7 255 if (0U != (CMP_SCR_CFF_MASK & base->SCR))
<> 144:ef7eb2e8f9f7 256 {
<> 144:ef7eb2e8f9f7 257 ret32 |= kCMP_OutputFallingEventFlag;
<> 144:ef7eb2e8f9f7 258 }
<> 144:ef7eb2e8f9f7 259 if (0U != (CMP_SCR_COUT_MASK & base->SCR))
<> 144:ef7eb2e8f9f7 260 {
<> 144:ef7eb2e8f9f7 261 ret32 |= kCMP_OutputAssertEventFlag;
<> 144:ef7eb2e8f9f7 262 }
<> 144:ef7eb2e8f9f7 263 return ret32;
<> 144:ef7eb2e8f9f7 264 }
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 void CMP_ClearStatusFlags(CMP_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 267 {
<> 144:ef7eb2e8f9f7 268 uint8_t tmp8 = base->SCR & ~(CMP_SCR_CFR_MASK | CMP_SCR_CFF_MASK); /* To avoid change the w1c bits. */
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 if (0U != (kCMP_OutputRisingEventFlag & mask))
<> 144:ef7eb2e8f9f7 271 {
<> 144:ef7eb2e8f9f7 272 tmp8 |= CMP_SCR_CFR_MASK;
<> 144:ef7eb2e8f9f7 273 }
<> 144:ef7eb2e8f9f7 274 if (0U != (kCMP_OutputFallingEventFlag & mask))
<> 144:ef7eb2e8f9f7 275 {
<> 144:ef7eb2e8f9f7 276 tmp8 |= CMP_SCR_CFF_MASK;
<> 144:ef7eb2e8f9f7 277 }
<> 144:ef7eb2e8f9f7 278 base->SCR = tmp8;
<> 144:ef7eb2e8f9f7 279 }