added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/cmsis/TARGET_ARM_SSG/TARGET_MPS2_M0/cmsis_nvic.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 80:bdf1132a57cf
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* MPS2 CMSIS Library |
<> | 144:ef7eb2e8f9f7 | 2 | * |
<> | 144:ef7eb2e8f9f7 | 3 | * Copyright (c) 2006-2016 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 4 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 5 | * |
<> | 144:ef7eb2e8f9f7 | 6 | * Redistribution and use in source and binary forms, with or without |
<> | 144:ef7eb2e8f9f7 | 7 | * modification, are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 8 | * |
<> | 144:ef7eb2e8f9f7 | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 10 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 11 | * |
<> | 144:ef7eb2e8f9f7 | 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 13 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 14 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 15 | * |
<> | 144:ef7eb2e8f9f7 | 16 | * 3. Neither the name of the copyright holder nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 17 | * may be used to endorse or promote products derived from this software without |
<> | 144:ef7eb2e8f9f7 | 18 | * specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 19 | * |
<> | 144:ef7eb2e8f9f7 | 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
<> | 144:ef7eb2e8f9f7 | 23 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
<> | 144:ef7eb2e8f9f7 | 24 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
<> | 144:ef7eb2e8f9f7 | 25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
<> | 144:ef7eb2e8f9f7 | 26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
<> | 144:ef7eb2e8f9f7 | 27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
<> | 144:ef7eb2e8f9f7 | 28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
<> | 144:ef7eb2e8f9f7 | 29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
<> | 144:ef7eb2e8f9f7 | 30 | * POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 31 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 32 | * CMSIS-style functionality to support dynamic vectors |
<> | 144:ef7eb2e8f9f7 | 33 | *******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 34 | #include "cmsis_nvic.h" |
<> | 144:ef7eb2e8f9f7 | 35 | |
<> | 144:ef7eb2e8f9f7 | 36 | #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Location of vectors in RAM |
<> | 144:ef7eb2e8f9f7 | 37 | #define NVIC_FLASH_VECTOR_ADDRESS (0x00000000) // Initial vector position in flash |
<> | 144:ef7eb2e8f9f7 | 38 | |
<> | 144:ef7eb2e8f9f7 | 39 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { |
<> | 144:ef7eb2e8f9f7 | 40 | // int i; |
<> | 144:ef7eb2e8f9f7 | 41 | // Space for dynamic vectors, initialised to allocate in R/W |
<> | 144:ef7eb2e8f9f7 | 42 | static volatile uint32_t* vectors = (uint32_t*)NVIC_FLASH_VECTOR_ADDRESS; |
<> | 144:ef7eb2e8f9f7 | 43 | |
<> | 144:ef7eb2e8f9f7 | 44 | // Set the vector |
<> | 144:ef7eb2e8f9f7 | 45 | vectors[IRQn + 16] = vector; |
<> | 144:ef7eb2e8f9f7 | 46 | } |
<> | 144:ef7eb2e8f9f7 | 47 | |
<> | 144:ef7eb2e8f9f7 | 48 | uint32_t NVIC_GetVector(IRQn_Type IRQn) { |
<> | 144:ef7eb2e8f9f7 | 49 | // We can always read vectors at 0x0, as the addresses are remapped |
<> | 144:ef7eb2e8f9f7 | 50 | uint32_t *vectors = (uint32_t*)NVIC_FLASH_VECTOR_ADDRESS; |
<> | 144:ef7eb2e8f9f7 | 51 | |
<> | 144:ef7eb2e8f9f7 | 52 | // Return the vector |
<> | 144:ef7eb2e8f9f7 | 53 | return vectors[IRQn + 16]; |
<> | 144:ef7eb2e8f9f7 | 54 | } |