Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

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targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/cmsis_nvic.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015-2016 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 /*
<> 144:ef7eb2e8f9f7 17 * CMSIS-style functionality to support dynamic vectors
<> 144:ef7eb2e8f9f7 18 */
<> 144:ef7eb2e8f9f7 19 #include "cmsis_nvic.h"
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) //Location of vectors in RAM
<> 144:ef7eb2e8f9f7 22 #define NVIC_FLASH_VECTOR_ADDRESS (0x00000000) //Initial vector position in flash
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
<> 144:ef7eb2e8f9f7 25 uint32_t *vectors = (uint32_t*)SCB->VTOR;
<> 144:ef7eb2e8f9f7 26 uint32_t i;
<> 144:ef7eb2e8f9f7 27
<> 144:ef7eb2e8f9f7 28 // Copy and switch to dynamic vectors if the first time called
<> 144:ef7eb2e8f9f7 29 if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
<> 144:ef7eb2e8f9f7 30 uint32_t *old_vectors = vectors;
<> 144:ef7eb2e8f9f7 31 vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
<> 144:ef7eb2e8f9f7 32 for (i=0; i<NVIC_NUM_VECTORS; i++) {
<> 144:ef7eb2e8f9f7 33 vectors[i] = old_vectors[i];
<> 144:ef7eb2e8f9f7 34 }
<> 144:ef7eb2e8f9f7 35 SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
<> 144:ef7eb2e8f9f7 36 }
<> 144:ef7eb2e8f9f7 37 vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
<> 144:ef7eb2e8f9f7 38 }
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 uint32_t NVIC_GetVector(IRQn_Type IRQn) {
<> 144:ef7eb2e8f9f7 41 uint32_t *vectors = (uint32_t*)SCB->VTOR;
<> 144:ef7eb2e8f9f7 42 return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
<> 144:ef7eb2e8f9f7 43 }