Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_STM/TARGET_STM32F3/spi_api.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 *******************************************************************************
<> 144:ef7eb2e8f9f7 3 * Copyright (c) 2014, STMicroelectronics
<> 144:ef7eb2e8f9f7 4 * All rights reserved.
<> 144:ef7eb2e8f9f7 5 *
<> 144:ef7eb2e8f9f7 6 * Redistribution and use in source and binary forms, with or without
<> 144:ef7eb2e8f9f7 7 * modification, are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 10 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 12 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 13 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 15 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 16 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 17 *
<> 144:ef7eb2e8f9f7 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 28 *******************************************************************************
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 31 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 32 #include "spi_api.h"
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #if DEVICE_SPI
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 #include <math.h>
<> 144:ef7eb2e8f9f7 37 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 38 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 39 #include "PeripheralPins.h"
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 static SPI_HandleTypeDef SpiHandle;
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 static void init_spi(spi_t *obj)
<> 144:ef7eb2e8f9f7 44 {
<> 144:ef7eb2e8f9f7 45 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 __HAL_SPI_DISABLE(&SpiHandle);
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 SpiHandle.Init.Mode = obj->mode;
<> 144:ef7eb2e8f9f7 50 SpiHandle.Init.BaudRatePrescaler = obj->br_presc;
<> 144:ef7eb2e8f9f7 51 SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
<> 144:ef7eb2e8f9f7 52 SpiHandle.Init.CLKPhase = obj->cpha;
<> 144:ef7eb2e8f9f7 53 SpiHandle.Init.CLKPolarity = obj->cpol;
<> 144:ef7eb2e8f9f7 54 SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
<> 144:ef7eb2e8f9f7 55 SpiHandle.Init.CRCPolynomial = 7;
<> 144:ef7eb2e8f9f7 56 SpiHandle.Init.DataSize = obj->bits;
<> 144:ef7eb2e8f9f7 57 SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
<> 144:ef7eb2e8f9f7 58 SpiHandle.Init.NSS = obj->nss;
<> 144:ef7eb2e8f9f7 59 SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 HAL_SPI_Init(&SpiHandle);
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 __HAL_SPI_ENABLE(&SpiHandle);
<> 144:ef7eb2e8f9f7 64 }
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
<> 144:ef7eb2e8f9f7 67 {
<> 144:ef7eb2e8f9f7 68 // Determine the SPI to use
<> 144:ef7eb2e8f9f7 69 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 70 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 71 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 72 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
<> 144:ef7eb2e8f9f7 75 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 obj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
<> 144:ef7eb2e8f9f7 78 MBED_ASSERT(obj->spi != (SPIName)NC);
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 // Enable SPI clock
<> 144:ef7eb2e8f9f7 81 #if defined(SPI1_BASE)
<> 144:ef7eb2e8f9f7 82 if (obj->spi == SPI_1) {
<> 144:ef7eb2e8f9f7 83 __SPI1_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 84 }
<> 144:ef7eb2e8f9f7 85 #endif
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 #if defined(SPI2_BASE)
<> 144:ef7eb2e8f9f7 88 if (obj->spi == SPI_2) {
<> 144:ef7eb2e8f9f7 89 __SPI2_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 90 }
<> 144:ef7eb2e8f9f7 91 #endif
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 #if defined(SPI3_BASE)
<> 144:ef7eb2e8f9f7 94 if (obj->spi == SPI_3) {
<> 144:ef7eb2e8f9f7 95 __SPI3_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 96 }
<> 144:ef7eb2e8f9f7 97 #endif
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 // Configure the SPI pins
<> 144:ef7eb2e8f9f7 100 pinmap_pinout(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 101 pinmap_pinout(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 102 pinmap_pinout(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 // Save new values
<> 144:ef7eb2e8f9f7 105 obj->bits = SPI_DATASIZE_8BIT;
<> 144:ef7eb2e8f9f7 106 obj->cpol = SPI_POLARITY_LOW;
<> 144:ef7eb2e8f9f7 107 obj->cpha = SPI_PHASE_1EDGE;
<> 144:ef7eb2e8f9f7 108 #if defined(TARGET_STM32F334C8)
<> 144:ef7eb2e8f9f7 109 obj->br_presc = SPI_BAUDRATEPRESCALER_256;
<> 144:ef7eb2e8f9f7 110 #else
<> 144:ef7eb2e8f9f7 111 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 1 MHz (HSI) or 1.13 MHz (HSE)
<> 144:ef7eb2e8f9f7 112 #endif
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 obj->pin_miso = miso;
<> 144:ef7eb2e8f9f7 115 obj->pin_mosi = mosi;
<> 144:ef7eb2e8f9f7 116 obj->pin_sclk = sclk;
<> 144:ef7eb2e8f9f7 117 obj->pin_ssel = ssel;
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 if (ssel != NC) {
<> 144:ef7eb2e8f9f7 120 pinmap_pinout(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 121 } else {
<> 144:ef7eb2e8f9f7 122 obj->nss = SPI_NSS_SOFT;
<> 144:ef7eb2e8f9f7 123 }
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 init_spi(obj);
<> 144:ef7eb2e8f9f7 126 }
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 void spi_free(spi_t *obj)
<> 144:ef7eb2e8f9f7 129 {
<> 144:ef7eb2e8f9f7 130 // Reset SPI and disable clock
<> 144:ef7eb2e8f9f7 131 #if defined(SPI1_BASE)
<> 144:ef7eb2e8f9f7 132 if (obj->spi == SPI_1) {
<> 144:ef7eb2e8f9f7 133 __SPI1_FORCE_RESET();
<> 144:ef7eb2e8f9f7 134 __SPI1_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 135 __SPI1_CLK_DISABLE();
<> 144:ef7eb2e8f9f7 136 }
<> 144:ef7eb2e8f9f7 137 #endif
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 #if defined(SPI2_BASE)
<> 144:ef7eb2e8f9f7 140 if (obj->spi == SPI_2) {
<> 144:ef7eb2e8f9f7 141 __SPI2_FORCE_RESET();
<> 144:ef7eb2e8f9f7 142 __SPI2_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 143 __SPI2_CLK_DISABLE();
<> 144:ef7eb2e8f9f7 144 }
<> 144:ef7eb2e8f9f7 145 #endif
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 #if defined(SPI3_BASE)
<> 144:ef7eb2e8f9f7 148 if (obj->spi == SPI_3) {
<> 144:ef7eb2e8f9f7 149 __SPI3_FORCE_RESET();
<> 144:ef7eb2e8f9f7 150 __SPI3_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 151 __SPI3_CLK_DISABLE();
<> 144:ef7eb2e8f9f7 152 }
<> 144:ef7eb2e8f9f7 153 #endif
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 // Configure GPIOs
<> 144:ef7eb2e8f9f7 156 pin_function(obj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 144:ef7eb2e8f9f7 157 pin_function(obj->pin_mosi, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 144:ef7eb2e8f9f7 158 pin_function(obj->pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 144:ef7eb2e8f9f7 159 pin_function(obj->pin_ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 144:ef7eb2e8f9f7 160 }
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 void spi_format(spi_t *obj, int bits, int mode, int slave)
<> 144:ef7eb2e8f9f7 163 {
<> 144:ef7eb2e8f9f7 164 // Save new values
<> 144:ef7eb2e8f9f7 165 if (bits == 16) {
<> 144:ef7eb2e8f9f7 166 obj->bits = SPI_DATASIZE_16BIT;
<> 144:ef7eb2e8f9f7 167 } else {
<> 144:ef7eb2e8f9f7 168 obj->bits = SPI_DATASIZE_8BIT;
<> 144:ef7eb2e8f9f7 169 }
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 switch (mode) {
<> 144:ef7eb2e8f9f7 172 case 0:
<> 144:ef7eb2e8f9f7 173 obj->cpol = SPI_POLARITY_LOW;
<> 144:ef7eb2e8f9f7 174 obj->cpha = SPI_PHASE_1EDGE;
<> 144:ef7eb2e8f9f7 175 break;
<> 144:ef7eb2e8f9f7 176 case 1:
<> 144:ef7eb2e8f9f7 177 obj->cpol = SPI_POLARITY_LOW;
<> 144:ef7eb2e8f9f7 178 obj->cpha = SPI_PHASE_2EDGE;
<> 144:ef7eb2e8f9f7 179 break;
<> 144:ef7eb2e8f9f7 180 case 2:
<> 144:ef7eb2e8f9f7 181 obj->cpol = SPI_POLARITY_HIGH;
<> 144:ef7eb2e8f9f7 182 obj->cpha = SPI_PHASE_1EDGE;
<> 144:ef7eb2e8f9f7 183 break;
<> 144:ef7eb2e8f9f7 184 default:
<> 144:ef7eb2e8f9f7 185 obj->cpol = SPI_POLARITY_HIGH;
<> 144:ef7eb2e8f9f7 186 obj->cpha = SPI_PHASE_2EDGE;
<> 144:ef7eb2e8f9f7 187 break;
<> 144:ef7eb2e8f9f7 188 }
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 if (obj->nss != SPI_NSS_SOFT) {
<> 144:ef7eb2e8f9f7 191 obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
<> 144:ef7eb2e8f9f7 192 }
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 init_spi(obj);
<> 144:ef7eb2e8f9f7 197 }
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 static const uint16_t baudrate_prescaler_table[] = {SPI_BAUDRATEPRESCALER_2,
<> 144:ef7eb2e8f9f7 200 SPI_BAUDRATEPRESCALER_4,
<> 144:ef7eb2e8f9f7 201 SPI_BAUDRATEPRESCALER_8,
<> 144:ef7eb2e8f9f7 202 SPI_BAUDRATEPRESCALER_16,
<> 144:ef7eb2e8f9f7 203 SPI_BAUDRATEPRESCALER_32,
<> 144:ef7eb2e8f9f7 204 SPI_BAUDRATEPRESCALER_64,
<> 144:ef7eb2e8f9f7 205 SPI_BAUDRATEPRESCALER_128,
<> 144:ef7eb2e8f9f7 206 SPI_BAUDRATEPRESCALER_256};
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 void spi_frequency(spi_t *obj, int hz)
<> 144:ef7eb2e8f9f7 209 {
<> 144:ef7eb2e8f9f7 210 int spi_hz = 0;
<> 144:ef7eb2e8f9f7 211 uint8_t prescaler_rank = 0;
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /* Get source clock depending on SPI instance */
<> 144:ef7eb2e8f9f7 214 switch ((int)obj->spi) {
<> 144:ef7eb2e8f9f7 215 #if defined SPI1_BASE
<> 144:ef7eb2e8f9f7 216 case SPI_1:
<> 144:ef7eb2e8f9f7 217 /* SPI_1. Source CLK is PCKL2 */
<> 144:ef7eb2e8f9f7 218 spi_hz = HAL_RCC_GetPCLK2Freq();
<> 144:ef7eb2e8f9f7 219 break;
<> 144:ef7eb2e8f9f7 220 #endif
<> 144:ef7eb2e8f9f7 221 #if defined SPI2_BASE
<> 144:ef7eb2e8f9f7 222 case SPI_2:
<> 144:ef7eb2e8f9f7 223 #endif
<> 144:ef7eb2e8f9f7 224 #if defined SPI3_BASE
<> 144:ef7eb2e8f9f7 225 case SPI_3:
<> 144:ef7eb2e8f9f7 226 #endif
<> 144:ef7eb2e8f9f7 227 /* SPI_2 and SPI_3. Source CLK is PCKL1 */
<> 144:ef7eb2e8f9f7 228 spi_hz = HAL_RCC_GetPCLK1Freq();
<> 144:ef7eb2e8f9f7 229 break;
<> 144:ef7eb2e8f9f7 230 default:
<> 144:ef7eb2e8f9f7 231 error("SPI instance not set");
<> 144:ef7eb2e8f9f7 232 }
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /* Define pre-scaler in order to get highest available frequency below requested frequency */
<> 144:ef7eb2e8f9f7 235 while ((spi_hz > hz) && (prescaler_rank < sizeof(baudrate_prescaler_table)/sizeof(baudrate_prescaler_table[0]))){
<> 144:ef7eb2e8f9f7 236 spi_hz = spi_hz / 2;
<> 144:ef7eb2e8f9f7 237 prescaler_rank++;
<> 144:ef7eb2e8f9f7 238 }
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 if (prescaler_rank <= sizeof(baudrate_prescaler_table)/sizeof(baudrate_prescaler_table[0])) {
<> 144:ef7eb2e8f9f7 241 obj->br_presc = baudrate_prescaler_table[prescaler_rank-1];
<> 144:ef7eb2e8f9f7 242 } else {
<> 144:ef7eb2e8f9f7 243 error("Couldn't setup requested SPI frequency");
<> 144:ef7eb2e8f9f7 244 }
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 init_spi(obj);
<> 144:ef7eb2e8f9f7 247 }
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 static inline int ssp_readable(spi_t *obj)
<> 144:ef7eb2e8f9f7 250 {
<> 144:ef7eb2e8f9f7 251 int status;
<> 144:ef7eb2e8f9f7 252 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
<> 144:ef7eb2e8f9f7 253 // Check if data is received
<> 144:ef7eb2e8f9f7 254 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_RXNE) != RESET) ? 1 : 0);
<> 144:ef7eb2e8f9f7 255 return status;
<> 144:ef7eb2e8f9f7 256 }
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 static inline int ssp_writeable(spi_t *obj)
<> 144:ef7eb2e8f9f7 259 {
<> 144:ef7eb2e8f9f7 260 int status;
<> 144:ef7eb2e8f9f7 261 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
<> 144:ef7eb2e8f9f7 262 // Check if data is transmitted
<> 144:ef7eb2e8f9f7 263 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_TXE) != RESET) ? 1 : 0);
<> 144:ef7eb2e8f9f7 264 return status;
<> 144:ef7eb2e8f9f7 265 }
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 static inline void ssp_write(spi_t *obj, int value)
<> 144:ef7eb2e8f9f7 268 {
<> 144:ef7eb2e8f9f7 269 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
<> 144:ef7eb2e8f9f7 270 while (!ssp_writeable(obj));
<> 144:ef7eb2e8f9f7 271 if (obj->bits == SPI_DATASIZE_8BIT) {
<> 144:ef7eb2e8f9f7 272 // Force 8-bit access to the data register
<> 144:ef7eb2e8f9f7 273 uint8_t *p_spi_dr = 0;
<> 144:ef7eb2e8f9f7 274 p_spi_dr = (uint8_t *) & (spi->DR);
<> 144:ef7eb2e8f9f7 275 *p_spi_dr = (uint8_t)value;
<> 144:ef7eb2e8f9f7 276 } else { // SPI_DATASIZE_16BIT
<> 144:ef7eb2e8f9f7 277 spi->DR = (uint16_t)value;
<> 144:ef7eb2e8f9f7 278 }
<> 144:ef7eb2e8f9f7 279 }
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 static inline int ssp_read(spi_t *obj)
<> 144:ef7eb2e8f9f7 282 {
<> 144:ef7eb2e8f9f7 283 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
<> 144:ef7eb2e8f9f7 284 while (!ssp_readable(obj));
<> 144:ef7eb2e8f9f7 285 if (obj->bits == SPI_DATASIZE_8BIT) {
<> 144:ef7eb2e8f9f7 286 // Force 8-bit access to the data register
<> 144:ef7eb2e8f9f7 287 uint8_t *p_spi_dr = 0;
<> 144:ef7eb2e8f9f7 288 p_spi_dr = (uint8_t *) & (spi->DR);
<> 144:ef7eb2e8f9f7 289 return (int)(*p_spi_dr);
<> 144:ef7eb2e8f9f7 290 } else {
<> 144:ef7eb2e8f9f7 291 return (int)spi->DR;
<> 144:ef7eb2e8f9f7 292 }
<> 144:ef7eb2e8f9f7 293 }
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 static inline int ssp_busy(spi_t *obj)
<> 144:ef7eb2e8f9f7 296 {
<> 144:ef7eb2e8f9f7 297 int status;
<> 144:ef7eb2e8f9f7 298 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
<> 144:ef7eb2e8f9f7 299 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_BSY) != RESET) ? 1 : 0);
<> 144:ef7eb2e8f9f7 300 return status;
<> 144:ef7eb2e8f9f7 301 }
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 int spi_master_write(spi_t *obj, int value)
<> 144:ef7eb2e8f9f7 304 {
<> 144:ef7eb2e8f9f7 305 ssp_write(obj, value);
<> 144:ef7eb2e8f9f7 306 return ssp_read(obj);
<> 144:ef7eb2e8f9f7 307 }
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 int spi_slave_receive(spi_t *obj)
<> 144:ef7eb2e8f9f7 310 {
<> 144:ef7eb2e8f9f7 311 return ((ssp_readable(obj) && !ssp_busy(obj)) ? 1 : 0);
<> 144:ef7eb2e8f9f7 312 };
<> 144:ef7eb2e8f9f7 313
<> 144:ef7eb2e8f9f7 314 int spi_slave_read(spi_t *obj)
<> 144:ef7eb2e8f9f7 315 {
<> 144:ef7eb2e8f9f7 316 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
<> 144:ef7eb2e8f9f7 317 while (!ssp_readable(obj));
<> 144:ef7eb2e8f9f7 318 if (obj->bits == SPI_DATASIZE_8BIT) {
<> 144:ef7eb2e8f9f7 319 // Force 8-bit access to the data register
<> 144:ef7eb2e8f9f7 320 uint8_t *p_spi_dr = 0;
<> 144:ef7eb2e8f9f7 321 p_spi_dr = (uint8_t *) & (spi->DR);
<> 144:ef7eb2e8f9f7 322 return (int)(*p_spi_dr);
<> 144:ef7eb2e8f9f7 323 } else {
<> 144:ef7eb2e8f9f7 324 return (int)spi->DR;
<> 144:ef7eb2e8f9f7 325 }
<> 144:ef7eb2e8f9f7 326 }
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 void spi_slave_write(spi_t *obj, int value)
<> 144:ef7eb2e8f9f7 329 {
<> 144:ef7eb2e8f9f7 330 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
<> 144:ef7eb2e8f9f7 331 while (!ssp_writeable(obj));
<> 144:ef7eb2e8f9f7 332 if (obj->bits == SPI_DATASIZE_8BIT) {
<> 144:ef7eb2e8f9f7 333 // Force 8-bit access to the data register
<> 144:ef7eb2e8f9f7 334 uint8_t *p_spi_dr = 0;
<> 144:ef7eb2e8f9f7 335 p_spi_dr = (uint8_t *) & (spi->DR);
<> 144:ef7eb2e8f9f7 336 *p_spi_dr = (uint8_t)value;
<> 144:ef7eb2e8f9f7 337 } else { // SPI_DATASIZE_16BIT
<> 144:ef7eb2e8f9f7 338 spi->DR = (uint16_t)value;
<> 144:ef7eb2e8f9f7 339 }
<> 144:ef7eb2e8f9f7 340 }
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 int spi_busy(spi_t *obj)
<> 144:ef7eb2e8f9f7 343 {
<> 144:ef7eb2e8f9f7 344 return ssp_busy(obj);
<> 144:ef7eb2e8f9f7 345 }
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 #endif