added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_STM/TARGET_STM32F3/serial_api.c@147:ba84b7dc41a7, 2016-09-10 (annotated)
- Committer:
- JojoS
- Date:
- Sat Sep 10 15:32:04 2016 +0000
- Revision:
- 147:ba84b7dc41a7
- Parent:
- 144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 3 | * Copyright (c) 2014, STMicroelectronics |
<> | 144:ef7eb2e8f9f7 | 4 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 5 | * |
<> | 144:ef7eb2e8f9f7 | 6 | * Redistribution and use in source and binary forms, with or without |
<> | 144:ef7eb2e8f9f7 | 7 | * modification, are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 8 | * |
<> | 144:ef7eb2e8f9f7 | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 10 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 12 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 13 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 15 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 16 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 17 | * |
<> | 144:ef7eb2e8f9f7 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 28 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 29 | */ |
<> | 144:ef7eb2e8f9f7 | 30 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 31 | #include "serial_api.h" |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | #if DEVICE_SERIAL |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 36 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 37 | #include <string.h> |
<> | 144:ef7eb2e8f9f7 | 38 | #include "PeripheralPins.h" |
<> | 144:ef7eb2e8f9f7 | 39 | #include "mbed_error.h" |
<> | 144:ef7eb2e8f9f7 | 40 | |
<> | 144:ef7eb2e8f9f7 | 41 | #define UART_NUM (5) |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
<> | 144:ef7eb2e8f9f7 | 44 | static UART_HandleTypeDef uart_handlers[UART_NUM]; |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | static uart_irq_handler irq_handler; |
<> | 144:ef7eb2e8f9f7 | 47 | |
<> | 144:ef7eb2e8f9f7 | 48 | int stdio_uart_inited = 0; |
<> | 144:ef7eb2e8f9f7 | 49 | serial_t stdio_uart; |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | #if DEVICE_SERIAL_ASYNCH |
<> | 144:ef7eb2e8f9f7 | 52 | #define SERIAL_S(obj) (&((obj)->serial)) |
<> | 144:ef7eb2e8f9f7 | 53 | #else |
<> | 144:ef7eb2e8f9f7 | 54 | #define SERIAL_S(obj) (obj) |
<> | 144:ef7eb2e8f9f7 | 55 | #endif |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 144:ef7eb2e8f9f7 | 57 | static void init_uart(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 58 | { |
<> | 144:ef7eb2e8f9f7 | 59 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 60 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 61 | huart->Instance = (USART_TypeDef *)(obj_s->uart); |
<> | 144:ef7eb2e8f9f7 | 62 | |
<> | 144:ef7eb2e8f9f7 | 63 | huart->Init.BaudRate = obj_s->baudrate; |
<> | 144:ef7eb2e8f9f7 | 64 | huart->Init.WordLength = obj_s->databits; |
<> | 144:ef7eb2e8f9f7 | 65 | huart->Init.StopBits = obj_s->stopbits; |
<> | 144:ef7eb2e8f9f7 | 66 | huart->Init.Parity = obj_s->parity; |
<> | 144:ef7eb2e8f9f7 | 67 | #if DEVICE_SERIAL_FC |
<> | 144:ef7eb2e8f9f7 | 68 | huart->Init.HwFlowCtl = obj_s->hw_flow_ctl; |
<> | 144:ef7eb2e8f9f7 | 69 | #else |
<> | 144:ef7eb2e8f9f7 | 70 | huart->Init.HwFlowCtl = UART_HWCONTROL_NONE; |
<> | 144:ef7eb2e8f9f7 | 71 | #endif |
<> | 144:ef7eb2e8f9f7 | 72 | huart->TxXferCount = 0; |
<> | 144:ef7eb2e8f9f7 | 73 | huart->TxXferSize = 0; |
<> | 144:ef7eb2e8f9f7 | 74 | huart->RxXferCount = 0; |
<> | 144:ef7eb2e8f9f7 | 75 | huart->RxXferSize = 0; |
<> | 144:ef7eb2e8f9f7 | 76 | |
<> | 144:ef7eb2e8f9f7 | 77 | if (obj_s->pin_rx == NC) { |
<> | 144:ef7eb2e8f9f7 | 78 | huart->Init.Mode = UART_MODE_TX; |
<> | 144:ef7eb2e8f9f7 | 79 | } else if (obj_s->pin_tx == NC) { |
<> | 144:ef7eb2e8f9f7 | 80 | huart->Init.Mode = UART_MODE_RX; |
<> | 144:ef7eb2e8f9f7 | 81 | } else { |
<> | 144:ef7eb2e8f9f7 | 82 | huart->Init.Mode = UART_MODE_TX_RX; |
<> | 144:ef7eb2e8f9f7 | 83 | } |
<> | 144:ef7eb2e8f9f7 | 84 | |
<> | 144:ef7eb2e8f9f7 | 85 | /* uAMR & ARM: Call to UART init is done between reset of pre-initialized variables */ |
<> | 144:ef7eb2e8f9f7 | 86 | /* and before HAL Init. SystemCoreClock init required here */ |
<> | 144:ef7eb2e8f9f7 | 87 | SystemCoreClockUpdate(); |
<> | 144:ef7eb2e8f9f7 | 88 | |
<> | 144:ef7eb2e8f9f7 | 89 | if (HAL_UART_Init(huart) != HAL_OK) { |
<> | 144:ef7eb2e8f9f7 | 90 | error("Cannot initialize UART\n"); |
<> | 144:ef7eb2e8f9f7 | 91 | } |
<> | 144:ef7eb2e8f9f7 | 92 | } |
<> | 144:ef7eb2e8f9f7 | 93 | |
<> | 144:ef7eb2e8f9f7 | 94 | void serial_init(serial_t *obj, PinName tx, PinName rx) |
<> | 144:ef7eb2e8f9f7 | 95 | { |
<> | 144:ef7eb2e8f9f7 | 96 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 97 | |
<> | 144:ef7eb2e8f9f7 | 98 | // Determine the UART to use (UART_1, UART_2, ...) |
<> | 144:ef7eb2e8f9f7 | 99 | UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
<> | 144:ef7eb2e8f9f7 | 100 | UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
<> | 144:ef7eb2e8f9f7 | 101 | |
<> | 144:ef7eb2e8f9f7 | 102 | // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object |
<> | 144:ef7eb2e8f9f7 | 103 | obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx); |
<> | 144:ef7eb2e8f9f7 | 104 | MBED_ASSERT(obj_s->uart != (UARTName)NC); |
<> | 144:ef7eb2e8f9f7 | 105 | |
<> | 144:ef7eb2e8f9f7 | 106 | // Enable USART clock + switch to SystemClock |
<> | 144:ef7eb2e8f9f7 | 107 | if (obj_s->uart == UART_1) { |
<> | 144:ef7eb2e8f9f7 | 108 | __USART1_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 109 | __USART1_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 110 | __USART1_CLK_ENABLE(); |
<> | 144:ef7eb2e8f9f7 | 111 | #if defined(RCC_USART1CLKSOURCE_SYSCLK) |
<> | 144:ef7eb2e8f9f7 | 112 | __HAL_RCC_USART1_CONFIG(RCC_USART1CLKSOURCE_SYSCLK); |
<> | 144:ef7eb2e8f9f7 | 113 | #endif |
<> | 144:ef7eb2e8f9f7 | 114 | obj_s->index = 0; |
<> | 144:ef7eb2e8f9f7 | 115 | } |
<> | 144:ef7eb2e8f9f7 | 116 | #if defined(USART2_BASE) |
<> | 144:ef7eb2e8f9f7 | 117 | if (obj_s->uart == UART_2) { |
<> | 144:ef7eb2e8f9f7 | 118 | __USART2_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 119 | __USART2_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 120 | __USART2_CLK_ENABLE(); |
<> | 144:ef7eb2e8f9f7 | 121 | #if defined(RCC_USART2CLKSOURCE_SYSCLK) |
<> | 144:ef7eb2e8f9f7 | 122 | __HAL_RCC_USART2_CONFIG(RCC_USART2CLKSOURCE_SYSCLK); |
<> | 144:ef7eb2e8f9f7 | 123 | #endif |
<> | 144:ef7eb2e8f9f7 | 124 | obj_s->index = 1; |
<> | 144:ef7eb2e8f9f7 | 125 | } |
<> | 144:ef7eb2e8f9f7 | 126 | #endif |
<> | 144:ef7eb2e8f9f7 | 127 | #if defined(USART3_BASE) |
<> | 144:ef7eb2e8f9f7 | 128 | if (obj_s->uart == UART_3) { |
<> | 144:ef7eb2e8f9f7 | 129 | __USART3_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 130 | __USART3_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 131 | __USART3_CLK_ENABLE(); |
<> | 144:ef7eb2e8f9f7 | 132 | #if defined(RCC_USART3CLKSOURCE_SYSCLK) |
<> | 144:ef7eb2e8f9f7 | 133 | __HAL_RCC_USART3_CONFIG(RCC_USART3CLKSOURCE_SYSCLK); |
<> | 144:ef7eb2e8f9f7 | 134 | #endif |
<> | 144:ef7eb2e8f9f7 | 135 | obj_s->index = 2; |
<> | 144:ef7eb2e8f9f7 | 136 | } |
<> | 144:ef7eb2e8f9f7 | 137 | #endif |
<> | 144:ef7eb2e8f9f7 | 138 | #if defined(UART4_BASE) |
<> | 144:ef7eb2e8f9f7 | 139 | if (obj_s->uart == UART_4) { |
<> | 144:ef7eb2e8f9f7 | 140 | __UART4_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 141 | __UART4_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 142 | __UART4_CLK_ENABLE(); |
<> | 144:ef7eb2e8f9f7 | 143 | #if defined(RCC_UART4CLKSOURCE_SYSCLK) |
<> | 144:ef7eb2e8f9f7 | 144 | __HAL_RCC_UART4_CONFIG(RCC_UART4CLKSOURCE_SYSCLK); |
<> | 144:ef7eb2e8f9f7 | 145 | #endif |
<> | 144:ef7eb2e8f9f7 | 146 | obj_s->index = 3; |
<> | 144:ef7eb2e8f9f7 | 147 | } |
<> | 144:ef7eb2e8f9f7 | 148 | #endif |
<> | 144:ef7eb2e8f9f7 | 149 | #if defined(UART5_BASE) |
<> | 144:ef7eb2e8f9f7 | 150 | if (obj_s->uart == UART_5) { |
<> | 144:ef7eb2e8f9f7 | 151 | __HAL_RCC_UART5_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 152 | __HAL_RCC_UART5_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 153 | __UART5_CLK_ENABLE(); |
<> | 144:ef7eb2e8f9f7 | 154 | #if defined(RCC_UART5CLKSOURCE_SYSCLK) |
<> | 144:ef7eb2e8f9f7 | 155 | __HAL_RCC_UART5_CONFIG(RCC_UART5CLKSOURCE_SYSCLK); |
<> | 144:ef7eb2e8f9f7 | 156 | #endif |
<> | 144:ef7eb2e8f9f7 | 157 | obj_s->index = 4; |
<> | 144:ef7eb2e8f9f7 | 158 | } |
<> | 144:ef7eb2e8f9f7 | 159 | #endif |
<> | 144:ef7eb2e8f9f7 | 160 | |
<> | 144:ef7eb2e8f9f7 | 161 | // Configure the UART pins |
<> | 144:ef7eb2e8f9f7 | 162 | pinmap_pinout(tx, PinMap_UART_TX); |
<> | 144:ef7eb2e8f9f7 | 163 | pinmap_pinout(rx, PinMap_UART_RX); |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | if (tx != NC) { |
<> | 144:ef7eb2e8f9f7 | 166 | pin_mode(tx, PullUp); |
<> | 144:ef7eb2e8f9f7 | 167 | } |
<> | 144:ef7eb2e8f9f7 | 168 | if (rx != NC) { |
<> | 144:ef7eb2e8f9f7 | 169 | pin_mode(rx, PullUp); |
<> | 144:ef7eb2e8f9f7 | 170 | } |
<> | 144:ef7eb2e8f9f7 | 171 | |
<> | 144:ef7eb2e8f9f7 | 172 | // Configure UART |
<> | 144:ef7eb2e8f9f7 | 173 | obj_s->baudrate = 9600; |
<> | 144:ef7eb2e8f9f7 | 174 | obj_s->databits = UART_WORDLENGTH_8B; |
<> | 144:ef7eb2e8f9f7 | 175 | obj_s->stopbits = UART_STOPBITS_1; |
<> | 144:ef7eb2e8f9f7 | 176 | obj_s->parity = UART_PARITY_NONE; |
<> | 144:ef7eb2e8f9f7 | 177 | |
<> | 144:ef7eb2e8f9f7 | 178 | #if DEVICE_SERIAL_FC |
<> | 144:ef7eb2e8f9f7 | 179 | obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; |
<> | 144:ef7eb2e8f9f7 | 180 | #endif |
<> | 144:ef7eb2e8f9f7 | 181 | |
<> | 144:ef7eb2e8f9f7 | 182 | obj_s->pin_tx = tx; |
<> | 144:ef7eb2e8f9f7 | 183 | obj_s->pin_rx = rx; |
<> | 144:ef7eb2e8f9f7 | 184 | |
<> | 144:ef7eb2e8f9f7 | 185 | init_uart(obj); |
<> | 144:ef7eb2e8f9f7 | 186 | |
<> | 144:ef7eb2e8f9f7 | 187 | // For stdio management |
<> | 144:ef7eb2e8f9f7 | 188 | if (obj_s->uart == STDIO_UART) { |
<> | 144:ef7eb2e8f9f7 | 189 | stdio_uart_inited = 1; |
<> | 144:ef7eb2e8f9f7 | 190 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
<> | 144:ef7eb2e8f9f7 | 191 | } |
<> | 144:ef7eb2e8f9f7 | 192 | } |
<> | 144:ef7eb2e8f9f7 | 193 | |
<> | 144:ef7eb2e8f9f7 | 194 | void serial_free(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 195 | { |
<> | 144:ef7eb2e8f9f7 | 196 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 197 | |
<> | 144:ef7eb2e8f9f7 | 198 | // Reset UART and disable clock |
<> | 144:ef7eb2e8f9f7 | 199 | if (obj_s->uart == UART_1) { |
<> | 144:ef7eb2e8f9f7 | 200 | __USART1_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 201 | __USART1_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 202 | __USART1_CLK_DISABLE(); |
<> | 144:ef7eb2e8f9f7 | 203 | } |
<> | 144:ef7eb2e8f9f7 | 204 | if (obj_s->uart == UART_2) { |
<> | 144:ef7eb2e8f9f7 | 205 | __USART2_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 206 | __USART2_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 207 | __USART2_CLK_DISABLE(); |
<> | 144:ef7eb2e8f9f7 | 208 | } |
<> | 144:ef7eb2e8f9f7 | 209 | #if defined(USART3_BASE) |
<> | 144:ef7eb2e8f9f7 | 210 | if (obj_s->uart == UART_3) { |
<> | 144:ef7eb2e8f9f7 | 211 | __USART3_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 212 | __USART3_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 213 | __USART3_CLK_DISABLE(); |
<> | 144:ef7eb2e8f9f7 | 214 | } |
<> | 144:ef7eb2e8f9f7 | 215 | #endif |
<> | 144:ef7eb2e8f9f7 | 216 | #if defined(UART4_BASE) |
<> | 144:ef7eb2e8f9f7 | 217 | if (obj_s->uart == UART_4) { |
<> | 144:ef7eb2e8f9f7 | 218 | __UART4_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 219 | __UART4_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 220 | __UART4_CLK_DISABLE(); |
<> | 144:ef7eb2e8f9f7 | 221 | } |
<> | 144:ef7eb2e8f9f7 | 222 | #endif |
<> | 144:ef7eb2e8f9f7 | 223 | #if defined(UART5_BASE) |
<> | 144:ef7eb2e8f9f7 | 224 | if (obj_s->uart == UART_5) { |
<> | 144:ef7eb2e8f9f7 | 225 | __UART5_FORCE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 226 | __UART5_RELEASE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 227 | __UART5_CLK_DISABLE(); |
<> | 144:ef7eb2e8f9f7 | 228 | } |
<> | 144:ef7eb2e8f9f7 | 229 | #endif |
<> | 144:ef7eb2e8f9f7 | 230 | |
<> | 144:ef7eb2e8f9f7 | 231 | // Configure GPIOs |
<> | 144:ef7eb2e8f9f7 | 232 | pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
<> | 144:ef7eb2e8f9f7 | 233 | pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
<> | 144:ef7eb2e8f9f7 | 234 | |
<> | 144:ef7eb2e8f9f7 | 235 | serial_irq_ids[obj_s->index] = 0; |
<> | 144:ef7eb2e8f9f7 | 236 | } |
<> | 144:ef7eb2e8f9f7 | 237 | |
<> | 144:ef7eb2e8f9f7 | 238 | void serial_baud(serial_t *obj, int baudrate) |
<> | 144:ef7eb2e8f9f7 | 239 | { |
<> | 144:ef7eb2e8f9f7 | 240 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 241 | |
<> | 144:ef7eb2e8f9f7 | 242 | obj_s->baudrate = baudrate; |
<> | 144:ef7eb2e8f9f7 | 243 | init_uart(obj); |
<> | 144:ef7eb2e8f9f7 | 244 | } |
<> | 144:ef7eb2e8f9f7 | 245 | |
<> | 144:ef7eb2e8f9f7 | 246 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) |
<> | 144:ef7eb2e8f9f7 | 247 | { |
<> | 144:ef7eb2e8f9f7 | 248 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 249 | |
<> | 144:ef7eb2e8f9f7 | 250 | if (data_bits == 9) { |
<> | 144:ef7eb2e8f9f7 | 251 | obj_s->databits = UART_WORDLENGTH_9B; |
<> | 144:ef7eb2e8f9f7 | 252 | } else { |
<> | 144:ef7eb2e8f9f7 | 253 | obj_s->databits = UART_WORDLENGTH_8B; |
<> | 144:ef7eb2e8f9f7 | 254 | } |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | switch (parity) { |
<> | 144:ef7eb2e8f9f7 | 257 | case ParityOdd: |
<> | 144:ef7eb2e8f9f7 | 258 | obj_s->parity = UART_PARITY_ODD; |
<> | 144:ef7eb2e8f9f7 | 259 | break; |
<> | 144:ef7eb2e8f9f7 | 260 | case ParityEven: |
<> | 144:ef7eb2e8f9f7 | 261 | obj_s->parity = UART_PARITY_EVEN; |
<> | 144:ef7eb2e8f9f7 | 262 | break; |
<> | 144:ef7eb2e8f9f7 | 263 | default: // ParityNone |
<> | 144:ef7eb2e8f9f7 | 264 | case ParityForced0: // unsupported! |
<> | 144:ef7eb2e8f9f7 | 265 | case ParityForced1: // unsupported! |
<> | 144:ef7eb2e8f9f7 | 266 | obj_s->parity = UART_PARITY_NONE; |
<> | 144:ef7eb2e8f9f7 | 267 | break; |
<> | 144:ef7eb2e8f9f7 | 268 | } |
<> | 144:ef7eb2e8f9f7 | 269 | |
<> | 144:ef7eb2e8f9f7 | 270 | if (stop_bits == 2) { |
<> | 144:ef7eb2e8f9f7 | 271 | obj_s->stopbits = UART_STOPBITS_2; |
<> | 144:ef7eb2e8f9f7 | 272 | } else { |
<> | 144:ef7eb2e8f9f7 | 273 | obj_s->stopbits = UART_STOPBITS_1; |
<> | 144:ef7eb2e8f9f7 | 274 | } |
<> | 144:ef7eb2e8f9f7 | 275 | |
<> | 144:ef7eb2e8f9f7 | 276 | init_uart(obj); |
<> | 144:ef7eb2e8f9f7 | 277 | } |
<> | 144:ef7eb2e8f9f7 | 278 | |
<> | 144:ef7eb2e8f9f7 | 279 | /****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 280 | * INTERRUPTS HANDLING |
<> | 144:ef7eb2e8f9f7 | 281 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 282 | |
<> | 144:ef7eb2e8f9f7 | 283 | static void uart_irq(int id) |
<> | 144:ef7eb2e8f9f7 | 284 | { |
<> | 144:ef7eb2e8f9f7 | 285 | UART_HandleTypeDef * huart = &uart_handlers[id]; |
<> | 144:ef7eb2e8f9f7 | 286 | |
<> | 144:ef7eb2e8f9f7 | 287 | if (serial_irq_ids[id] != 0) { |
<> | 144:ef7eb2e8f9f7 | 288 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 289 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 290 | irq_handler(serial_irq_ids[id], TxIrq); |
<> | 144:ef7eb2e8f9f7 | 291 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); |
<> | 144:ef7eb2e8f9f7 | 292 | } |
<> | 144:ef7eb2e8f9f7 | 293 | } |
<> | 144:ef7eb2e8f9f7 | 294 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 295 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 296 | irq_handler(serial_irq_ids[id], RxIrq); |
<> | 144:ef7eb2e8f9f7 | 297 | volatile uint32_t tmpval = huart->Instance->RDR; // Clear RXNE flag |
<> | 144:ef7eb2e8f9f7 | 298 | } |
<> | 144:ef7eb2e8f9f7 | 299 | } |
<> | 144:ef7eb2e8f9f7 | 300 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 301 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ORE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 302 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); |
<> | 144:ef7eb2e8f9f7 | 303 | } |
<> | 144:ef7eb2e8f9f7 | 304 | } |
<> | 144:ef7eb2e8f9f7 | 305 | } |
<> | 144:ef7eb2e8f9f7 | 306 | } |
<> | 144:ef7eb2e8f9f7 | 307 | |
<> | 144:ef7eb2e8f9f7 | 308 | static void uart1_irq(void) |
<> | 144:ef7eb2e8f9f7 | 309 | { |
<> | 144:ef7eb2e8f9f7 | 310 | uart_irq(0); |
<> | 144:ef7eb2e8f9f7 | 311 | } |
<> | 144:ef7eb2e8f9f7 | 312 | |
<> | 144:ef7eb2e8f9f7 | 313 | static void uart2_irq(void) |
<> | 144:ef7eb2e8f9f7 | 314 | { |
<> | 144:ef7eb2e8f9f7 | 315 | uart_irq(1); |
<> | 144:ef7eb2e8f9f7 | 316 | } |
<> | 144:ef7eb2e8f9f7 | 317 | |
<> | 144:ef7eb2e8f9f7 | 318 | #if defined(USART3_BASE) |
<> | 144:ef7eb2e8f9f7 | 319 | static void uart3_irq(void) |
<> | 144:ef7eb2e8f9f7 | 320 | { |
<> | 144:ef7eb2e8f9f7 | 321 | uart_irq(2); |
<> | 144:ef7eb2e8f9f7 | 322 | } |
<> | 144:ef7eb2e8f9f7 | 323 | #endif |
<> | 144:ef7eb2e8f9f7 | 324 | |
<> | 144:ef7eb2e8f9f7 | 325 | #if defined(UART4_BASE) |
<> | 144:ef7eb2e8f9f7 | 326 | static void uart4_irq(void) |
<> | 144:ef7eb2e8f9f7 | 327 | { |
<> | 144:ef7eb2e8f9f7 | 328 | uart_irq(3); |
<> | 144:ef7eb2e8f9f7 | 329 | } |
<> | 144:ef7eb2e8f9f7 | 330 | #endif |
<> | 144:ef7eb2e8f9f7 | 331 | |
<> | 144:ef7eb2e8f9f7 | 332 | #if defined(UART5_BASE) |
<> | 144:ef7eb2e8f9f7 | 333 | static void uart5_irq(void) |
<> | 144:ef7eb2e8f9f7 | 334 | { |
<> | 144:ef7eb2e8f9f7 | 335 | uart_irq(4); |
<> | 144:ef7eb2e8f9f7 | 336 | } |
<> | 144:ef7eb2e8f9f7 | 337 | #endif |
<> | 144:ef7eb2e8f9f7 | 338 | |
<> | 144:ef7eb2e8f9f7 | 339 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) |
<> | 144:ef7eb2e8f9f7 | 340 | { |
<> | 144:ef7eb2e8f9f7 | 341 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 342 | |
<> | 144:ef7eb2e8f9f7 | 343 | irq_handler = handler; |
<> | 144:ef7eb2e8f9f7 | 344 | serial_irq_ids[obj_s->index] = id; |
<> | 144:ef7eb2e8f9f7 | 345 | } |
<> | 144:ef7eb2e8f9f7 | 346 | |
<> | 144:ef7eb2e8f9f7 | 347 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) |
<> | 144:ef7eb2e8f9f7 | 348 | { |
<> | 144:ef7eb2e8f9f7 | 349 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 350 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 351 | IRQn_Type irq_n = (IRQn_Type)0; |
<> | 144:ef7eb2e8f9f7 | 352 | uint32_t vector = 0; |
<> | 144:ef7eb2e8f9f7 | 353 | |
<> | 144:ef7eb2e8f9f7 | 354 | if (obj_s->uart == UART_1) { |
<> | 144:ef7eb2e8f9f7 | 355 | irq_n = USART1_IRQn; |
<> | 144:ef7eb2e8f9f7 | 356 | vector = (uint32_t)&uart1_irq; |
<> | 144:ef7eb2e8f9f7 | 357 | } |
<> | 144:ef7eb2e8f9f7 | 358 | |
<> | 144:ef7eb2e8f9f7 | 359 | if (obj_s->uart == UART_2) { |
<> | 144:ef7eb2e8f9f7 | 360 | irq_n = USART2_IRQn; |
<> | 144:ef7eb2e8f9f7 | 361 | vector = (uint32_t)&uart2_irq; |
<> | 144:ef7eb2e8f9f7 | 362 | } |
<> | 144:ef7eb2e8f9f7 | 363 | |
<> | 144:ef7eb2e8f9f7 | 364 | #if defined(USART3_BASE) |
<> | 144:ef7eb2e8f9f7 | 365 | if (obj_s->uart == UART_3) { |
<> | 144:ef7eb2e8f9f7 | 366 | irq_n = USART3_IRQn; |
<> | 144:ef7eb2e8f9f7 | 367 | vector = (uint32_t)&uart3_irq; |
<> | 144:ef7eb2e8f9f7 | 368 | } |
<> | 144:ef7eb2e8f9f7 | 369 | #endif |
<> | 144:ef7eb2e8f9f7 | 370 | |
<> | 144:ef7eb2e8f9f7 | 371 | #if defined(UART4_BASE) |
<> | 144:ef7eb2e8f9f7 | 372 | if (obj_s->uart == UART_4) { |
<> | 144:ef7eb2e8f9f7 | 373 | irq_n = UART4_IRQn; |
<> | 144:ef7eb2e8f9f7 | 374 | vector = (uint32_t)&uart4_irq; |
<> | 144:ef7eb2e8f9f7 | 375 | } |
<> | 144:ef7eb2e8f9f7 | 376 | #endif |
<> | 144:ef7eb2e8f9f7 | 377 | |
<> | 144:ef7eb2e8f9f7 | 378 | #if defined(UART5_BASE) |
<> | 144:ef7eb2e8f9f7 | 379 | if (obj_s->uart == UART_5) { |
<> | 144:ef7eb2e8f9f7 | 380 | irq_n = UART5_IRQn; |
<> | 144:ef7eb2e8f9f7 | 381 | vector = (uint32_t)&uart5_irq; |
<> | 144:ef7eb2e8f9f7 | 382 | } |
<> | 144:ef7eb2e8f9f7 | 383 | #endif |
<> | 144:ef7eb2e8f9f7 | 384 | |
<> | 144:ef7eb2e8f9f7 | 385 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 386 | if (irq == RxIrq) { |
<> | 144:ef7eb2e8f9f7 | 387 | __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); |
<> | 144:ef7eb2e8f9f7 | 388 | } else { // TxIrq |
<> | 144:ef7eb2e8f9f7 | 389 | __HAL_UART_ENABLE_IT(huart, UART_IT_TC); |
<> | 144:ef7eb2e8f9f7 | 390 | } |
<> | 144:ef7eb2e8f9f7 | 391 | NVIC_SetVector(irq_n, vector); |
<> | 144:ef7eb2e8f9f7 | 392 | NVIC_EnableIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 393 | |
<> | 144:ef7eb2e8f9f7 | 394 | } else { // disable |
<> | 144:ef7eb2e8f9f7 | 395 | int all_disabled = 0; |
<> | 144:ef7eb2e8f9f7 | 396 | if (irq == RxIrq) { |
<> | 144:ef7eb2e8f9f7 | 397 | __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); |
<> | 144:ef7eb2e8f9f7 | 398 | // Check if TxIrq is disabled too |
<> | 144:ef7eb2e8f9f7 | 399 | if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) { |
<> | 144:ef7eb2e8f9f7 | 400 | all_disabled = 1; |
<> | 144:ef7eb2e8f9f7 | 401 | } |
<> | 144:ef7eb2e8f9f7 | 402 | } else { // TxIrq |
<> | 144:ef7eb2e8f9f7 | 403 | __HAL_UART_DISABLE_IT(huart, UART_IT_TC); |
<> | 144:ef7eb2e8f9f7 | 404 | // Check if RxIrq is disabled too |
<> | 144:ef7eb2e8f9f7 | 405 | if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) { |
<> | 144:ef7eb2e8f9f7 | 406 | all_disabled = 1; |
<> | 144:ef7eb2e8f9f7 | 407 | } |
<> | 144:ef7eb2e8f9f7 | 408 | } |
<> | 144:ef7eb2e8f9f7 | 409 | |
<> | 144:ef7eb2e8f9f7 | 410 | if (all_disabled) { |
<> | 144:ef7eb2e8f9f7 | 411 | NVIC_DisableIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 412 | } |
<> | 144:ef7eb2e8f9f7 | 413 | } |
<> | 144:ef7eb2e8f9f7 | 414 | } |
<> | 144:ef7eb2e8f9f7 | 415 | |
<> | 144:ef7eb2e8f9f7 | 416 | /****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 417 | * READ/WRITE |
<> | 144:ef7eb2e8f9f7 | 418 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 419 | |
<> | 144:ef7eb2e8f9f7 | 420 | int serial_getc(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 421 | { |
<> | 144:ef7eb2e8f9f7 | 422 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 423 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 424 | |
<> | 144:ef7eb2e8f9f7 | 425 | while (!serial_readable(obj)); |
<> | 144:ef7eb2e8f9f7 | 426 | if (obj_s->databits == UART_WORDLENGTH_8B) { |
<> | 144:ef7eb2e8f9f7 | 427 | return (int)(huart->Instance->RDR & (uint8_t)0xFF); |
<> | 144:ef7eb2e8f9f7 | 428 | } else { |
<> | 144:ef7eb2e8f9f7 | 429 | return (int)(huart->Instance->RDR & (uint16_t)0x1FF); |
<> | 144:ef7eb2e8f9f7 | 430 | } |
<> | 144:ef7eb2e8f9f7 | 431 | } |
<> | 144:ef7eb2e8f9f7 | 432 | |
<> | 144:ef7eb2e8f9f7 | 433 | void serial_putc(serial_t *obj, int c) |
<> | 144:ef7eb2e8f9f7 | 434 | { |
<> | 144:ef7eb2e8f9f7 | 435 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 436 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 437 | |
<> | 144:ef7eb2e8f9f7 | 438 | while (!serial_writable(obj)); |
<> | 144:ef7eb2e8f9f7 | 439 | if (obj_s->databits == UART_WORDLENGTH_8B) { |
<> | 144:ef7eb2e8f9f7 | 440 | huart->Instance->TDR = (uint8_t)(c & (uint8_t)0xFF); |
<> | 144:ef7eb2e8f9f7 | 441 | } else { |
<> | 144:ef7eb2e8f9f7 | 442 | huart->Instance->TDR = (uint16_t)(c & (uint16_t)0x1FF); |
<> | 144:ef7eb2e8f9f7 | 443 | } |
<> | 144:ef7eb2e8f9f7 | 444 | } |
<> | 144:ef7eb2e8f9f7 | 445 | |
<> | 144:ef7eb2e8f9f7 | 446 | int serial_readable(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 447 | { |
<> | 144:ef7eb2e8f9f7 | 448 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 449 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 450 | |
<> | 144:ef7eb2e8f9f7 | 451 | // Check if data is received |
<> | 144:ef7eb2e8f9f7 | 452 | return (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) ? 1 : 0; |
<> | 144:ef7eb2e8f9f7 | 453 | } |
<> | 144:ef7eb2e8f9f7 | 454 | |
<> | 144:ef7eb2e8f9f7 | 455 | int serial_writable(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 456 | { |
<> | 144:ef7eb2e8f9f7 | 457 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 458 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 459 | |
<> | 144:ef7eb2e8f9f7 | 460 | // Check if data is transmitted |
<> | 144:ef7eb2e8f9f7 | 461 | return (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) ? 1 : 0; |
<> | 144:ef7eb2e8f9f7 | 462 | } |
<> | 144:ef7eb2e8f9f7 | 463 | |
<> | 144:ef7eb2e8f9f7 | 464 | void serial_clear(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 465 | { |
<> | 144:ef7eb2e8f9f7 | 466 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 467 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 468 | |
<> | 144:ef7eb2e8f9f7 | 469 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); |
<> | 144:ef7eb2e8f9f7 | 470 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
<> | 144:ef7eb2e8f9f7 | 471 | } |
<> | 144:ef7eb2e8f9f7 | 472 | |
<> | 144:ef7eb2e8f9f7 | 473 | void serial_pinout_tx(PinName tx) |
<> | 144:ef7eb2e8f9f7 | 474 | { |
<> | 144:ef7eb2e8f9f7 | 475 | pinmap_pinout(tx, PinMap_UART_TX); |
<> | 144:ef7eb2e8f9f7 | 476 | } |
<> | 144:ef7eb2e8f9f7 | 477 | |
<> | 144:ef7eb2e8f9f7 | 478 | void serial_break_set(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 479 | { |
<> | 144:ef7eb2e8f9f7 | 480 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 481 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 482 | |
<> | 144:ef7eb2e8f9f7 | 483 | HAL_LIN_SendBreak(huart); |
<> | 144:ef7eb2e8f9f7 | 484 | } |
<> | 144:ef7eb2e8f9f7 | 485 | |
<> | 144:ef7eb2e8f9f7 | 486 | void serial_break_clear(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 487 | { |
<> | 144:ef7eb2e8f9f7 | 488 | (void)obj; |
<> | 144:ef7eb2e8f9f7 | 489 | } |
<> | 144:ef7eb2e8f9f7 | 490 | |
<> | 144:ef7eb2e8f9f7 | 491 | #if DEVICE_SERIAL_ASYNCH |
<> | 144:ef7eb2e8f9f7 | 492 | |
<> | 144:ef7eb2e8f9f7 | 493 | /****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 494 | * LOCAL HELPER FUNCTIONS |
<> | 144:ef7eb2e8f9f7 | 495 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 496 | |
<> | 144:ef7eb2e8f9f7 | 497 | /** |
<> | 144:ef7eb2e8f9f7 | 498 | * Configure the TX buffer for an asynchronous write serial transaction |
<> | 144:ef7eb2e8f9f7 | 499 | * |
<> | 144:ef7eb2e8f9f7 | 500 | * @param obj The serial object. |
<> | 144:ef7eb2e8f9f7 | 501 | * @param tx The buffer for sending. |
<> | 144:ef7eb2e8f9f7 | 502 | * @param tx_length The number of words to transmit. |
<> | 144:ef7eb2e8f9f7 | 503 | */ |
<> | 144:ef7eb2e8f9f7 | 504 | static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width) |
<> | 144:ef7eb2e8f9f7 | 505 | { |
<> | 144:ef7eb2e8f9f7 | 506 | (void)width; |
<> | 144:ef7eb2e8f9f7 | 507 | |
<> | 144:ef7eb2e8f9f7 | 508 | // Exit if a transmit is already on-going |
<> | 144:ef7eb2e8f9f7 | 509 | if (serial_tx_active(obj)) { |
<> | 144:ef7eb2e8f9f7 | 510 | return; |
<> | 144:ef7eb2e8f9f7 | 511 | } |
<> | 144:ef7eb2e8f9f7 | 512 | |
<> | 144:ef7eb2e8f9f7 | 513 | obj->tx_buff.buffer = tx; |
<> | 144:ef7eb2e8f9f7 | 514 | obj->tx_buff.length = tx_length; |
<> | 144:ef7eb2e8f9f7 | 515 | obj->tx_buff.pos = 0; |
<> | 144:ef7eb2e8f9f7 | 516 | } |
<> | 144:ef7eb2e8f9f7 | 517 | |
<> | 144:ef7eb2e8f9f7 | 518 | /** |
<> | 144:ef7eb2e8f9f7 | 519 | * Configure the RX buffer for an asynchronous write serial transaction |
<> | 144:ef7eb2e8f9f7 | 520 | * |
<> | 144:ef7eb2e8f9f7 | 521 | * @param obj The serial object. |
<> | 144:ef7eb2e8f9f7 | 522 | * @param tx The buffer for sending. |
<> | 144:ef7eb2e8f9f7 | 523 | * @param tx_length The number of words to transmit. |
<> | 144:ef7eb2e8f9f7 | 524 | */ |
<> | 144:ef7eb2e8f9f7 | 525 | static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width) |
<> | 144:ef7eb2e8f9f7 | 526 | { |
<> | 144:ef7eb2e8f9f7 | 527 | (void)width; |
<> | 144:ef7eb2e8f9f7 | 528 | |
<> | 144:ef7eb2e8f9f7 | 529 | // Exit if a reception is already on-going |
<> | 144:ef7eb2e8f9f7 | 530 | if (serial_rx_active(obj)) { |
<> | 144:ef7eb2e8f9f7 | 531 | return; |
<> | 144:ef7eb2e8f9f7 | 532 | } |
<> | 144:ef7eb2e8f9f7 | 533 | |
<> | 144:ef7eb2e8f9f7 | 534 | obj->rx_buff.buffer = rx; |
<> | 144:ef7eb2e8f9f7 | 535 | obj->rx_buff.length = rx_length; |
<> | 144:ef7eb2e8f9f7 | 536 | obj->rx_buff.pos = 0; |
<> | 144:ef7eb2e8f9f7 | 537 | } |
<> | 144:ef7eb2e8f9f7 | 538 | |
<> | 144:ef7eb2e8f9f7 | 539 | /** |
<> | 144:ef7eb2e8f9f7 | 540 | * Configure events |
<> | 144:ef7eb2e8f9f7 | 541 | * |
<> | 144:ef7eb2e8f9f7 | 542 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 543 | * @param event The logical OR of the events to configure |
<> | 144:ef7eb2e8f9f7 | 544 | * @param enable Set to non-zero to enable events, or zero to disable them |
<> | 144:ef7eb2e8f9f7 | 545 | */ |
<> | 144:ef7eb2e8f9f7 | 546 | static void serial_enable_event(serial_t *obj, int event, uint8_t enable) |
<> | 144:ef7eb2e8f9f7 | 547 | { |
<> | 144:ef7eb2e8f9f7 | 548 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 549 | |
<> | 144:ef7eb2e8f9f7 | 550 | // Shouldn't have to enable interrupt here, just need to keep track of the requested events. |
<> | 144:ef7eb2e8f9f7 | 551 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 552 | obj_s->events |= event; |
<> | 144:ef7eb2e8f9f7 | 553 | } else { |
<> | 144:ef7eb2e8f9f7 | 554 | obj_s->events &= ~event; |
<> | 144:ef7eb2e8f9f7 | 555 | } |
<> | 144:ef7eb2e8f9f7 | 556 | } |
<> | 144:ef7eb2e8f9f7 | 557 | |
<> | 144:ef7eb2e8f9f7 | 558 | |
<> | 144:ef7eb2e8f9f7 | 559 | /** |
<> | 144:ef7eb2e8f9f7 | 560 | * Get index of serial object TX IRQ, relating it to the physical peripheral. |
<> | 144:ef7eb2e8f9f7 | 561 | * |
<> | 144:ef7eb2e8f9f7 | 562 | * @param obj pointer to serial object |
<> | 144:ef7eb2e8f9f7 | 563 | * @return internal NVIC TX IRQ index of U(S)ART peripheral |
<> | 144:ef7eb2e8f9f7 | 564 | */ |
<> | 144:ef7eb2e8f9f7 | 565 | static IRQn_Type serial_get_irq_n(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 566 | { |
<> | 144:ef7eb2e8f9f7 | 567 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 568 | IRQn_Type irq_n; |
<> | 144:ef7eb2e8f9f7 | 569 | |
<> | 144:ef7eb2e8f9f7 | 570 | switch (obj_s->index) { |
<> | 144:ef7eb2e8f9f7 | 571 | case 0: |
<> | 144:ef7eb2e8f9f7 | 572 | irq_n = USART1_IRQn; |
<> | 144:ef7eb2e8f9f7 | 573 | break; |
<> | 144:ef7eb2e8f9f7 | 574 | |
<> | 144:ef7eb2e8f9f7 | 575 | case 1: |
<> | 144:ef7eb2e8f9f7 | 576 | irq_n = USART2_IRQn; |
<> | 144:ef7eb2e8f9f7 | 577 | break; |
<> | 144:ef7eb2e8f9f7 | 578 | |
<> | 144:ef7eb2e8f9f7 | 579 | #if defined(USART3_BASE) |
<> | 144:ef7eb2e8f9f7 | 580 | case 2: |
<> | 144:ef7eb2e8f9f7 | 581 | irq_n = USART3_IRQn; |
<> | 144:ef7eb2e8f9f7 | 582 | break; |
<> | 144:ef7eb2e8f9f7 | 583 | #endif |
<> | 144:ef7eb2e8f9f7 | 584 | #if defined(USART4_BASE) |
<> | 144:ef7eb2e8f9f7 | 585 | case 3: |
<> | 144:ef7eb2e8f9f7 | 586 | irq_n = USART4_IRQn; |
<> | 144:ef7eb2e8f9f7 | 587 | break; |
<> | 144:ef7eb2e8f9f7 | 588 | #endif |
<> | 144:ef7eb2e8f9f7 | 589 | #if defined(USART5_BASE) |
<> | 144:ef7eb2e8f9f7 | 590 | case 4: |
<> | 144:ef7eb2e8f9f7 | 591 | irq_n = USART5_IRQn; |
<> | 144:ef7eb2e8f9f7 | 592 | break; |
<> | 144:ef7eb2e8f9f7 | 593 | #endif |
<> | 144:ef7eb2e8f9f7 | 594 | default: |
<> | 144:ef7eb2e8f9f7 | 595 | irq_n = (IRQn_Type)0; |
<> | 144:ef7eb2e8f9f7 | 596 | } |
<> | 144:ef7eb2e8f9f7 | 597 | |
<> | 144:ef7eb2e8f9f7 | 598 | return irq_n; |
<> | 144:ef7eb2e8f9f7 | 599 | } |
<> | 144:ef7eb2e8f9f7 | 600 | |
<> | 144:ef7eb2e8f9f7 | 601 | |
<> | 144:ef7eb2e8f9f7 | 602 | /****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 603 | * MBED API FUNCTIONS |
<> | 144:ef7eb2e8f9f7 | 604 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 605 | |
<> | 144:ef7eb2e8f9f7 | 606 | /** |
<> | 144:ef7eb2e8f9f7 | 607 | * Begin asynchronous TX transfer. The used buffer is specified in the serial |
<> | 144:ef7eb2e8f9f7 | 608 | * object, tx_buff |
<> | 144:ef7eb2e8f9f7 | 609 | * |
<> | 144:ef7eb2e8f9f7 | 610 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 611 | * @param tx The buffer for sending |
<> | 144:ef7eb2e8f9f7 | 612 | * @param tx_length The number of words to transmit |
<> | 144:ef7eb2e8f9f7 | 613 | * @param tx_width The bit width of buffer word |
<> | 144:ef7eb2e8f9f7 | 614 | * @param handler The serial handler |
<> | 144:ef7eb2e8f9f7 | 615 | * @param event The logical OR of events to be registered |
<> | 144:ef7eb2e8f9f7 | 616 | * @param hint A suggestion for how to use DMA with this transfer |
<> | 144:ef7eb2e8f9f7 | 617 | * @return Returns number of data transfered, or 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 618 | */ |
<> | 144:ef7eb2e8f9f7 | 619 | int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint) |
<> | 144:ef7eb2e8f9f7 | 620 | { |
<> | 144:ef7eb2e8f9f7 | 621 | // TODO: DMA usage is currently ignored |
<> | 144:ef7eb2e8f9f7 | 622 | (void) hint; |
<> | 144:ef7eb2e8f9f7 | 623 | |
<> | 144:ef7eb2e8f9f7 | 624 | // Check buffer is ok |
<> | 144:ef7eb2e8f9f7 | 625 | MBED_ASSERT(tx != (void*)0); |
<> | 144:ef7eb2e8f9f7 | 626 | MBED_ASSERT(tx_width == 8); // support only 8b width |
<> | 144:ef7eb2e8f9f7 | 627 | |
<> | 144:ef7eb2e8f9f7 | 628 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 629 | UART_HandleTypeDef * huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 630 | |
<> | 144:ef7eb2e8f9f7 | 631 | if (tx_length == 0) { |
<> | 144:ef7eb2e8f9f7 | 632 | return 0; |
<> | 144:ef7eb2e8f9f7 | 633 | } |
<> | 144:ef7eb2e8f9f7 | 634 | |
<> | 144:ef7eb2e8f9f7 | 635 | // Set up buffer |
<> | 144:ef7eb2e8f9f7 | 636 | serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width); |
<> | 144:ef7eb2e8f9f7 | 637 | |
<> | 144:ef7eb2e8f9f7 | 638 | // Set up events |
<> | 144:ef7eb2e8f9f7 | 639 | serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events |
<> | 144:ef7eb2e8f9f7 | 640 | serial_enable_event(obj, event, 1); // Set only the wanted events |
<> | 144:ef7eb2e8f9f7 | 641 | |
<> | 144:ef7eb2e8f9f7 | 642 | // Enable interrupt |
<> | 144:ef7eb2e8f9f7 | 643 | IRQn_Type irq_n = serial_get_irq_n(obj); |
<> | 144:ef7eb2e8f9f7 | 644 | NVIC_ClearPendingIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 645 | NVIC_DisableIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 646 | NVIC_SetPriority(irq_n, 1); |
<> | 144:ef7eb2e8f9f7 | 647 | NVIC_SetVector(irq_n, (uint32_t)handler); |
<> | 144:ef7eb2e8f9f7 | 648 | NVIC_EnableIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 649 | |
<> | 144:ef7eb2e8f9f7 | 650 | // the following function will enable UART_IT_TXE and error interrupts |
<> | 144:ef7eb2e8f9f7 | 651 | if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) { |
<> | 144:ef7eb2e8f9f7 | 652 | return 0; |
<> | 144:ef7eb2e8f9f7 | 653 | } |
<> | 144:ef7eb2e8f9f7 | 654 | |
<> | 144:ef7eb2e8f9f7 | 655 | return tx_length; |
<> | 144:ef7eb2e8f9f7 | 656 | } |
<> | 144:ef7eb2e8f9f7 | 657 | |
<> | 144:ef7eb2e8f9f7 | 658 | /** |
<> | 144:ef7eb2e8f9f7 | 659 | * Begin asynchronous RX transfer (enable interrupt for data collecting) |
<> | 144:ef7eb2e8f9f7 | 660 | * The used buffer is specified in the serial object, rx_buff |
<> | 144:ef7eb2e8f9f7 | 661 | * |
<> | 144:ef7eb2e8f9f7 | 662 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 663 | * @param rx The buffer for sending |
<> | 144:ef7eb2e8f9f7 | 664 | * @param rx_length The number of words to transmit |
<> | 144:ef7eb2e8f9f7 | 665 | * @param rx_width The bit width of buffer word |
<> | 144:ef7eb2e8f9f7 | 666 | * @param handler The serial handler |
<> | 144:ef7eb2e8f9f7 | 667 | * @param event The logical OR of events to be registered |
<> | 144:ef7eb2e8f9f7 | 668 | * @param handler The serial handler |
<> | 144:ef7eb2e8f9f7 | 669 | * @param char_match A character in range 0-254 to be matched |
<> | 144:ef7eb2e8f9f7 | 670 | * @param hint A suggestion for how to use DMA with this transfer |
<> | 144:ef7eb2e8f9f7 | 671 | */ |
<> | 144:ef7eb2e8f9f7 | 672 | void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint) |
<> | 144:ef7eb2e8f9f7 | 673 | { |
<> | 144:ef7eb2e8f9f7 | 674 | // TODO: DMA usage is currently ignored |
<> | 144:ef7eb2e8f9f7 | 675 | (void) hint; |
<> | 144:ef7eb2e8f9f7 | 676 | |
<> | 144:ef7eb2e8f9f7 | 677 | /* Sanity check arguments */ |
<> | 144:ef7eb2e8f9f7 | 678 | MBED_ASSERT(obj); |
<> | 144:ef7eb2e8f9f7 | 679 | MBED_ASSERT(rx != (void*)0); |
<> | 144:ef7eb2e8f9f7 | 680 | MBED_ASSERT(rx_width == 8); // support only 8b width |
<> | 144:ef7eb2e8f9f7 | 681 | |
<> | 144:ef7eb2e8f9f7 | 682 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 683 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 684 | |
<> | 144:ef7eb2e8f9f7 | 685 | serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0); |
<> | 144:ef7eb2e8f9f7 | 686 | serial_enable_event(obj, event, 1); |
<> | 144:ef7eb2e8f9f7 | 687 | |
<> | 144:ef7eb2e8f9f7 | 688 | // set CharMatch |
<> | 144:ef7eb2e8f9f7 | 689 | obj->char_match = char_match; |
<> | 144:ef7eb2e8f9f7 | 690 | |
<> | 144:ef7eb2e8f9f7 | 691 | serial_rx_buffer_set(obj, rx, rx_length, rx_width); |
<> | 144:ef7eb2e8f9f7 | 692 | |
<> | 144:ef7eb2e8f9f7 | 693 | IRQn_Type irq_n = serial_get_irq_n(obj); |
<> | 144:ef7eb2e8f9f7 | 694 | NVIC_ClearPendingIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 695 | NVIC_DisableIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 696 | NVIC_SetPriority(irq_n, 0); |
<> | 144:ef7eb2e8f9f7 | 697 | NVIC_SetVector(irq_n, (uint32_t)handler); |
<> | 144:ef7eb2e8f9f7 | 698 | NVIC_EnableIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 699 | |
<> | 144:ef7eb2e8f9f7 | 700 | // following HAL function will enable the RXNE interrupt + error interrupts |
<> | 144:ef7eb2e8f9f7 | 701 | HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length); |
<> | 144:ef7eb2e8f9f7 | 702 | } |
<> | 144:ef7eb2e8f9f7 | 703 | |
<> | 144:ef7eb2e8f9f7 | 704 | /** |
<> | 144:ef7eb2e8f9f7 | 705 | * Attempts to determine if the serial peripheral is already in use for TX |
<> | 144:ef7eb2e8f9f7 | 706 | * |
<> | 144:ef7eb2e8f9f7 | 707 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 708 | * @return Non-zero if the TX transaction is ongoing, 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 709 | */ |
<> | 144:ef7eb2e8f9f7 | 710 | uint8_t serial_tx_active(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 711 | { |
<> | 144:ef7eb2e8f9f7 | 712 | MBED_ASSERT(obj); |
<> | 144:ef7eb2e8f9f7 | 713 | |
<> | 144:ef7eb2e8f9f7 | 714 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 715 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 716 | |
<> | 144:ef7eb2e8f9f7 | 717 | return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_TX) ? 1 : 0); |
<> | 144:ef7eb2e8f9f7 | 718 | } |
<> | 144:ef7eb2e8f9f7 | 719 | |
<> | 144:ef7eb2e8f9f7 | 720 | /** |
<> | 144:ef7eb2e8f9f7 | 721 | * Attempts to determine if the serial peripheral is already in use for RX |
<> | 144:ef7eb2e8f9f7 | 722 | * |
<> | 144:ef7eb2e8f9f7 | 723 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 724 | * @return Non-zero if the RX transaction is ongoing, 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 725 | */ |
<> | 144:ef7eb2e8f9f7 | 726 | uint8_t serial_rx_active(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 727 | { |
<> | 144:ef7eb2e8f9f7 | 728 | MBED_ASSERT(obj); |
<> | 144:ef7eb2e8f9f7 | 729 | |
<> | 144:ef7eb2e8f9f7 | 730 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 731 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 732 | |
<> | 144:ef7eb2e8f9f7 | 733 | return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0); |
<> | 144:ef7eb2e8f9f7 | 734 | } |
<> | 144:ef7eb2e8f9f7 | 735 | |
<> | 144:ef7eb2e8f9f7 | 736 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { |
<> | 144:ef7eb2e8f9f7 | 737 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 738 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); |
<> | 144:ef7eb2e8f9f7 | 739 | } |
<> | 144:ef7eb2e8f9f7 | 740 | } |
<> | 144:ef7eb2e8f9f7 | 741 | |
<> | 144:ef7eb2e8f9f7 | 742 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { |
<> | 144:ef7eb2e8f9f7 | 743 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 744 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); |
<> | 144:ef7eb2e8f9f7 | 745 | } |
<> | 144:ef7eb2e8f9f7 | 746 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 747 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); |
<> | 144:ef7eb2e8f9f7 | 748 | } |
<> | 144:ef7eb2e8f9f7 | 749 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 750 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); |
<> | 144:ef7eb2e8f9f7 | 751 | } |
<> | 144:ef7eb2e8f9f7 | 752 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 753 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); |
<> | 144:ef7eb2e8f9f7 | 754 | } |
<> | 144:ef7eb2e8f9f7 | 755 | } |
<> | 144:ef7eb2e8f9f7 | 756 | |
<> | 144:ef7eb2e8f9f7 | 757 | /** |
<> | 144:ef7eb2e8f9f7 | 758 | * The asynchronous TX and RX handler. |
<> | 144:ef7eb2e8f9f7 | 759 | * |
<> | 144:ef7eb2e8f9f7 | 760 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 761 | * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 762 | */ |
<> | 144:ef7eb2e8f9f7 | 763 | int serial_irq_handler_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 764 | { |
<> | 144:ef7eb2e8f9f7 | 765 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 766 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 767 | |
<> | 144:ef7eb2e8f9f7 | 768 | volatile int return_event = 0; |
<> | 144:ef7eb2e8f9f7 | 769 | uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer); |
<> | 144:ef7eb2e8f9f7 | 770 | uint8_t i = 0; |
<> | 144:ef7eb2e8f9f7 | 771 | |
<> | 144:ef7eb2e8f9f7 | 772 | // TX PART: |
<> | 144:ef7eb2e8f9f7 | 773 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 774 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 775 | // Return event SERIAL_EVENT_TX_COMPLETE if requested |
<> | 144:ef7eb2e8f9f7 | 776 | if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) { |
<> | 144:ef7eb2e8f9f7 | 777 | return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events); |
<> | 144:ef7eb2e8f9f7 | 778 | } |
<> | 144:ef7eb2e8f9f7 | 779 | } |
<> | 144:ef7eb2e8f9f7 | 780 | } |
<> | 144:ef7eb2e8f9f7 | 781 | |
<> | 144:ef7eb2e8f9f7 | 782 | // Handle error events |
<> | 144:ef7eb2e8f9f7 | 783 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 784 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 785 | return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events); |
<> | 144:ef7eb2e8f9f7 | 786 | } |
<> | 144:ef7eb2e8f9f7 | 787 | } |
<> | 144:ef7eb2e8f9f7 | 788 | |
<> | 144:ef7eb2e8f9f7 | 789 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 790 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 791 | return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events); |
<> | 144:ef7eb2e8f9f7 | 792 | } |
<> | 144:ef7eb2e8f9f7 | 793 | } |
<> | 144:ef7eb2e8f9f7 | 794 | |
<> | 144:ef7eb2e8f9f7 | 795 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 796 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
<> | 144:ef7eb2e8f9f7 | 797 | return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events); |
<> | 144:ef7eb2e8f9f7 | 798 | } |
<> | 144:ef7eb2e8f9f7 | 799 | } |
<> | 144:ef7eb2e8f9f7 | 800 | |
<> | 144:ef7eb2e8f9f7 | 801 | HAL_UART_IRQHandler(huart); |
<> | 144:ef7eb2e8f9f7 | 802 | |
<> | 144:ef7eb2e8f9f7 | 803 | // Abort if an error occurs |
<> | 144:ef7eb2e8f9f7 | 804 | if (return_event & SERIAL_EVENT_RX_PARITY_ERROR || |
<> | 144:ef7eb2e8f9f7 | 805 | return_event & SERIAL_EVENT_RX_FRAMING_ERROR || |
<> | 144:ef7eb2e8f9f7 | 806 | return_event & SERIAL_EVENT_RX_OVERRUN_ERROR) { |
<> | 144:ef7eb2e8f9f7 | 807 | return return_event; |
<> | 144:ef7eb2e8f9f7 | 808 | } |
<> | 144:ef7eb2e8f9f7 | 809 | |
<> | 144:ef7eb2e8f9f7 | 810 | //RX PART |
<> | 144:ef7eb2e8f9f7 | 811 | if (huart->RxXferSize != 0) { |
<> | 144:ef7eb2e8f9f7 | 812 | obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount; |
<> | 144:ef7eb2e8f9f7 | 813 | } |
<> | 144:ef7eb2e8f9f7 | 814 | if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) { |
<> | 144:ef7eb2e8f9f7 | 815 | return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events); |
<> | 144:ef7eb2e8f9f7 | 816 | } |
<> | 144:ef7eb2e8f9f7 | 817 | |
<> | 144:ef7eb2e8f9f7 | 818 | // Check if char_match is present |
<> | 144:ef7eb2e8f9f7 | 819 | if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) { |
<> | 144:ef7eb2e8f9f7 | 820 | if (buf != NULL) { |
<> | 144:ef7eb2e8f9f7 | 821 | for (i = 0; i < obj->rx_buff.pos; i++) { |
<> | 144:ef7eb2e8f9f7 | 822 | if (buf[i] == obj->char_match) { |
<> | 144:ef7eb2e8f9f7 | 823 | obj->rx_buff.pos = i; |
<> | 144:ef7eb2e8f9f7 | 824 | return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events); |
<> | 144:ef7eb2e8f9f7 | 825 | serial_rx_abort_asynch(obj); |
<> | 144:ef7eb2e8f9f7 | 826 | break; |
<> | 144:ef7eb2e8f9f7 | 827 | } |
<> | 144:ef7eb2e8f9f7 | 828 | } |
<> | 144:ef7eb2e8f9f7 | 829 | } |
<> | 144:ef7eb2e8f9f7 | 830 | } |
<> | 144:ef7eb2e8f9f7 | 831 | |
<> | 144:ef7eb2e8f9f7 | 832 | return return_event; |
<> | 144:ef7eb2e8f9f7 | 833 | } |
<> | 144:ef7eb2e8f9f7 | 834 | |
<> | 144:ef7eb2e8f9f7 | 835 | /** |
<> | 144:ef7eb2e8f9f7 | 836 | * Abort the ongoing TX transaction. It disables the enabled interupt for TX and |
<> | 144:ef7eb2e8f9f7 | 837 | * flush TX hardware buffer if TX FIFO is used |
<> | 144:ef7eb2e8f9f7 | 838 | * |
<> | 144:ef7eb2e8f9f7 | 839 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 840 | */ |
<> | 144:ef7eb2e8f9f7 | 841 | void serial_tx_abort_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 842 | { |
<> | 144:ef7eb2e8f9f7 | 843 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 844 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 845 | |
<> | 144:ef7eb2e8f9f7 | 846 | __HAL_UART_DISABLE_IT(huart, UART_IT_TC); |
<> | 144:ef7eb2e8f9f7 | 847 | __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); |
<> | 144:ef7eb2e8f9f7 | 848 | |
<> | 144:ef7eb2e8f9f7 | 849 | // clear flags |
<> | 144:ef7eb2e8f9f7 | 850 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); |
<> | 144:ef7eb2e8f9f7 | 851 | |
<> | 144:ef7eb2e8f9f7 | 852 | // reset states |
<> | 144:ef7eb2e8f9f7 | 853 | huart->TxXferCount = 0; |
<> | 144:ef7eb2e8f9f7 | 854 | // update handle state |
<> | 144:ef7eb2e8f9f7 | 855 | if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) { |
<> | 144:ef7eb2e8f9f7 | 856 | huart->gState = HAL_UART_STATE_BUSY_RX; |
<> | 144:ef7eb2e8f9f7 | 857 | } else { |
<> | 144:ef7eb2e8f9f7 | 858 | huart->gState = HAL_UART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 859 | } |
<> | 144:ef7eb2e8f9f7 | 860 | } |
<> | 144:ef7eb2e8f9f7 | 861 | |
<> | 144:ef7eb2e8f9f7 | 862 | /** |
<> | 144:ef7eb2e8f9f7 | 863 | * Abort the ongoing RX transaction It disables the enabled interrupt for RX and |
<> | 144:ef7eb2e8f9f7 | 864 | * flush RX hardware buffer if RX FIFO is used |
<> | 144:ef7eb2e8f9f7 | 865 | * |
<> | 144:ef7eb2e8f9f7 | 866 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 867 | */ |
<> | 144:ef7eb2e8f9f7 | 868 | void serial_rx_abort_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 869 | { |
<> | 144:ef7eb2e8f9f7 | 870 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 871 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
<> | 144:ef7eb2e8f9f7 | 872 | |
<> | 144:ef7eb2e8f9f7 | 873 | // disable interrupts |
<> | 144:ef7eb2e8f9f7 | 874 | __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); |
<> | 144:ef7eb2e8f9f7 | 875 | __HAL_UART_DISABLE_IT(huart, UART_IT_PE); |
<> | 144:ef7eb2e8f9f7 | 876 | __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); |
<> | 144:ef7eb2e8f9f7 | 877 | |
<> | 144:ef7eb2e8f9f7 | 878 | // clear flags |
<> | 144:ef7eb2e8f9f7 | 879 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF | UART_CLEAR_FEF | UART_CLEAR_OREF); |
<> | 144:ef7eb2e8f9f7 | 880 | volatile uint32_t tmpval = huart->Instance->RDR; // Clear RXNE flag |
<> | 144:ef7eb2e8f9f7 | 881 | |
<> | 144:ef7eb2e8f9f7 | 882 | // reset states |
<> | 144:ef7eb2e8f9f7 | 883 | huart->RxXferCount = 0; |
<> | 144:ef7eb2e8f9f7 | 884 | // update handle state |
<> | 144:ef7eb2e8f9f7 | 885 | if(huart->RxState == HAL_UART_STATE_BUSY_TX_RX) { |
<> | 144:ef7eb2e8f9f7 | 886 | huart->RxState = HAL_UART_STATE_BUSY_TX; |
<> | 144:ef7eb2e8f9f7 | 887 | } else { |
<> | 144:ef7eb2e8f9f7 | 888 | huart->RxState = HAL_UART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 889 | } |
<> | 144:ef7eb2e8f9f7 | 890 | } |
<> | 144:ef7eb2e8f9f7 | 891 | |
<> | 144:ef7eb2e8f9f7 | 892 | #endif |
<> | 144:ef7eb2e8f9f7 | 893 | |
<> | 144:ef7eb2e8f9f7 | 894 | #if DEVICE_SERIAL_FC |
<> | 144:ef7eb2e8f9f7 | 895 | |
<> | 144:ef7eb2e8f9f7 | 896 | /** |
<> | 144:ef7eb2e8f9f7 | 897 | * Set HW Control Flow |
<> | 144:ef7eb2e8f9f7 | 898 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 899 | * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS) |
<> | 144:ef7eb2e8f9f7 | 900 | * @param rxflow Pin for the rxflow |
<> | 144:ef7eb2e8f9f7 | 901 | * @param txflow Pin for the txflow |
<> | 144:ef7eb2e8f9f7 | 902 | */ |
<> | 144:ef7eb2e8f9f7 | 903 | void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) |
<> | 144:ef7eb2e8f9f7 | 904 | { |
<> | 144:ef7eb2e8f9f7 | 905 | struct serial_s *obj_s = SERIAL_S(obj); |
<> | 144:ef7eb2e8f9f7 | 906 | |
<> | 144:ef7eb2e8f9f7 | 907 | // Determine the UART to use (UART_1, UART_2, ...) |
<> | 144:ef7eb2e8f9f7 | 908 | UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS); |
<> | 144:ef7eb2e8f9f7 | 909 | UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS); |
<> | 144:ef7eb2e8f9f7 | 910 | |
<> | 144:ef7eb2e8f9f7 | 911 | // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object |
<> | 144:ef7eb2e8f9f7 | 912 | obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts); |
<> | 144:ef7eb2e8f9f7 | 913 | MBED_ASSERT(obj_s->uart != (UARTName)NC); |
<> | 144:ef7eb2e8f9f7 | 914 | |
<> | 144:ef7eb2e8f9f7 | 915 | if(type == FlowControlNone) { |
<> | 144:ef7eb2e8f9f7 | 916 | // Disable hardware flow control |
<> | 144:ef7eb2e8f9f7 | 917 | obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; |
<> | 144:ef7eb2e8f9f7 | 918 | } |
<> | 144:ef7eb2e8f9f7 | 919 | if (type == FlowControlRTS) { |
<> | 144:ef7eb2e8f9f7 | 920 | // Enable RTS |
<> | 144:ef7eb2e8f9f7 | 921 | MBED_ASSERT(uart_rts != (UARTName)NC); |
<> | 144:ef7eb2e8f9f7 | 922 | obj_s->hw_flow_ctl = UART_HWCONTROL_RTS; |
<> | 144:ef7eb2e8f9f7 | 923 | obj_s->pin_rts = rxflow; |
<> | 144:ef7eb2e8f9f7 | 924 | // Enable the pin for RTS function |
<> | 144:ef7eb2e8f9f7 | 925 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
<> | 144:ef7eb2e8f9f7 | 926 | } |
<> | 144:ef7eb2e8f9f7 | 927 | if (type == FlowControlCTS) { |
<> | 144:ef7eb2e8f9f7 | 928 | // Enable CTS |
<> | 144:ef7eb2e8f9f7 | 929 | MBED_ASSERT(uart_cts != (UARTName)NC); |
<> | 144:ef7eb2e8f9f7 | 930 | obj_s->hw_flow_ctl = UART_HWCONTROL_CTS; |
<> | 144:ef7eb2e8f9f7 | 931 | obj_s->pin_cts = txflow; |
<> | 144:ef7eb2e8f9f7 | 932 | // Enable the pin for CTS function |
<> | 144:ef7eb2e8f9f7 | 933 | pinmap_pinout(txflow, PinMap_UART_CTS); |
<> | 144:ef7eb2e8f9f7 | 934 | } |
<> | 144:ef7eb2e8f9f7 | 935 | if (type == FlowControlRTSCTS) { |
<> | 144:ef7eb2e8f9f7 | 936 | // Enable CTS & RTS |
<> | 144:ef7eb2e8f9f7 | 937 | MBED_ASSERT(uart_rts != (UARTName)NC); |
<> | 144:ef7eb2e8f9f7 | 938 | MBED_ASSERT(uart_cts != (UARTName)NC); |
<> | 144:ef7eb2e8f9f7 | 939 | obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS; |
<> | 144:ef7eb2e8f9f7 | 940 | obj_s->pin_rts = rxflow; |
<> | 144:ef7eb2e8f9f7 | 941 | obj_s->pin_cts = txflow; |
<> | 144:ef7eb2e8f9f7 | 942 | // Enable the pin for CTS function |
<> | 144:ef7eb2e8f9f7 | 943 | pinmap_pinout(txflow, PinMap_UART_CTS); |
<> | 144:ef7eb2e8f9f7 | 944 | // Enable the pin for RTS function |
<> | 144:ef7eb2e8f9f7 | 945 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
<> | 144:ef7eb2e8f9f7 | 946 | } |
<> | 144:ef7eb2e8f9f7 | 947 | |
<> | 144:ef7eb2e8f9f7 | 948 | init_uart(obj); |
<> | 144:ef7eb2e8f9f7 | 949 | } |
<> | 144:ef7eb2e8f9f7 | 950 | |
<> | 144:ef7eb2e8f9f7 | 951 | #endif |
<> | 144:ef7eb2e8f9f7 | 952 | |
<> | 144:ef7eb2e8f9f7 | 953 | #endif |