added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
119:3921aeca8633
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 119:3921aeca8633 1 /* mbed Microcontroller Library
mbed_official 119:3921aeca8633 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 119:3921aeca8633 3 *
mbed_official 119:3921aeca8633 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 119:3921aeca8633 5 * you may not use this file except in compliance with the License.
mbed_official 119:3921aeca8633 6 * You may obtain a copy of the License at
mbed_official 119:3921aeca8633 7 *
mbed_official 119:3921aeca8633 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 119:3921aeca8633 9 *
mbed_official 119:3921aeca8633 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 119:3921aeca8633 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 119:3921aeca8633 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 119:3921aeca8633 13 * See the License for the specific language governing permissions and
mbed_official 119:3921aeca8633 14 * limitations under the License.
mbed_official 119:3921aeca8633 15 */
mbed_official 119:3921aeca8633 16 #include "mbed_assert.h"
mbed_official 119:3921aeca8633 17 #include "pwmout_api.h"
mbed_official 119:3921aeca8633 18 #include "cmsis.h"
mbed_official 119:3921aeca8633 19 #include "pinmap.h"
mbed_official 119:3921aeca8633 20 #include "RZ_A1_Init.h"
mbed_official 119:3921aeca8633 21 #include "cpg_iodefine.h"
mbed_official 119:3921aeca8633 22 #include "pwm_iodefine.h"
mbed_official 119:3921aeca8633 23 #include "gpio_addrdefine.h"
mbed_official 119:3921aeca8633 24
mbed_official 119:3921aeca8633 25 #ifdef MAX_PERI
mbed_official 119:3921aeca8633 26 #define MTU2_PWM_NUM 27
mbed_official 119:3921aeca8633 27 #define MTU2_PWM_SIGNAL 2
mbed_official 119:3921aeca8633 28 #define MTU2_PWM_OFFSET 0x20
mbed_official 119:3921aeca8633 29
mbed_official 119:3921aeca8633 30 // PORT ID, PWM ID, Pin function
mbed_official 119:3921aeca8633 31 static const PinMap PinMap_PWM[] = {
mbed_official 119:3921aeca8633 32 // TIOC0 A,C
mbed_official 119:3921aeca8633 33 {P4_0 , MTU2_PWM0_PIN , 2}, //TIOC0A
mbed_official 119:3921aeca8633 34 {P5_0 , MTU2_PWM1_PIN , 6}, //TIOC0A
mbed_official 119:3921aeca8633 35 {P7_0 , MTU2_PWM2_PIN , 7}, //TIOC0A
mbed_official 119:3921aeca8633 36 {P4_2 , MTU2_PWM3_PIN , 2}, //TIOC0C
mbed_official 119:3921aeca8633 37 {P5_5 , MTU2_PWM4_PIN , 6}, //TIOC0C
mbed_official 119:3921aeca8633 38 {P7_2 , MTU2_PWM5_PIN , 7}, //TIOC0C
mbed_official 119:3921aeca8633 39 //TIOC1 A
mbed_official 119:3921aeca8633 40 {P2_11 , MTU2_PWM6_PIN , 5}, //TIOC1A
mbed_official 119:3921aeca8633 41 {P6_0 , MTU2_PWM7_PIN , 5}, //TIOC1A
mbed_official 119:3921aeca8633 42 {P7_4 , MTU2_PWM8_PIN , 7}, //TIOC1A
mbed_official 119:3921aeca8633 43 {P8_8 , MTU2_PWM9_PIN , 5}, //TIOC1A
mbed_official 119:3921aeca8633 44 {P9_7 , MTU2_PWM10_PIN , 4}, //TIOC1A
mbed_official 119:3921aeca8633 45 //TIOC2 A
mbed_official 119:3921aeca8633 46 {P2_1 , MTU2_PWM11_PIN , 6}, //TIOC2A
mbed_official 119:3921aeca8633 47 {P6_2 , MTU2_PWM12_PIN , 6}, //TIOC2A
mbed_official 119:3921aeca8633 48 {P7_6 , MTU2_PWM13_PIN , 7}, //TIOC2A
mbed_official 119:3921aeca8633 49 {P8_14 , MTU2_PWM14_PIN , 4}, //TIOC2A
mbed_official 119:3921aeca8633 50 //TIOC3 A,C
mbed_official 119:3921aeca8633 51 {P3_4 , MTU2_PWM15_PIN , 6}, //TIOC3A
mbed_official 119:3921aeca8633 52 {P7_8 , MTU2_PWM16_PIN , 7}, //TIOC3A
mbed_official 119:3921aeca8633 53 {P8_10 , MTU2_PWM17_PIN , 4}, //TIOC3A
mbed_official 119:3921aeca8633 54 {P3_6 , MTU2_PWM18_PIN , 6}, //TIOC3C
mbed_official 119:3921aeca8633 55 {P7_10 , MTU2_PWM19_PIN , 7}, //TIOC3C
mbed_official 119:3921aeca8633 56 {P8_12 , MTU2_PWM20_PIN , 4}, //TIOC3C
mbed_official 119:3921aeca8633 57 //TIOC4 A,C
mbed_official 119:3921aeca8633 58 {P3_8 , MTU2_PWM21_PIN , 6}, //TIOC4A
mbed_official 119:3921aeca8633 59 {P4_4 , MTU2_PWM22_PIN , 3}, //TIOC4A
mbed_official 119:3921aeca8633 60 {P7_12 , MTU2_PWM23_PIN , 7}, //TIOC4A
mbed_official 119:3921aeca8633 61 {P3_10 , MTU2_PWM24_PIN , 6}, //TIOC4C
mbed_official 119:3921aeca8633 62 {P4_6 , MTU2_PWM25_PIN , 3}, //TIOC4C
mbed_official 119:3921aeca8633 63 {P7_14 , MTU2_PWM26_PIN , 7}, //TIOC4C
mbed_official 119:3921aeca8633 64 //PWM1
mbed_official 119:3921aeca8633 65 {P8_8 , PWM0_PIN , 6}, //PWM1A
mbed_official 119:3921aeca8633 66 {P8_9 , PWM1_PIN , 6}, //PWM1B
mbed_official 119:3921aeca8633 67 {P8_10 , PWM2_PIN , 6}, //PWM1C
mbed_official 119:3921aeca8633 68 {P8_11 , PWM3_PIN , 6}, //PWM1D
mbed_official 119:3921aeca8633 69 {P8_12 , PWM4_PIN , 6}, //PWM1E
mbed_official 119:3921aeca8633 70 {P8_13 , PWM5_PIN , 6}, //PWM1F
mbed_official 119:3921aeca8633 71 {P8_14 , PWM6_PIN , 6}, //PWM1G
mbed_official 119:3921aeca8633 72 {P8_15 , PWM7_PIN , 6}, //PWM1H
mbed_official 119:3921aeca8633 73 //PWM2
mbed_official 119:3921aeca8633 74 {P3_0 , PWM8_PIN , 7}, //PWM2A
mbed_official 119:3921aeca8633 75 {P3_1 , PWM9_PIN , 7}, //PWM2B
mbed_official 119:3921aeca8633 76 {P3_2 , PWM10_PIN , 7}, //PWM2C
mbed_official 119:3921aeca8633 77 {P3_3 , PWM11_PIN , 7}, //PWM2D
mbed_official 119:3921aeca8633 78 {P4_4 , PWM12_PIN , 4}, //PWM2E
mbed_official 119:3921aeca8633 79 {P4_5 , PWM13_PIN , 4}, //PWM2F
mbed_official 119:3921aeca8633 80 {P4_6 , PWM14_PIN , 4}, //PWM2G
mbed_official 119:3921aeca8633 81 {P4_7 , PWM15_PIN , 4}, //PWM2H
mbed_official 119:3921aeca8633 82 {NC , NC , 0}
mbed_official 119:3921aeca8633 83 };
mbed_official 119:3921aeca8633 84
mbed_official 119:3921aeca8633 85 static const PWMType PORT[] = {
mbed_official 119:3921aeca8633 86 PWM1A, // PWM0_PIN
mbed_official 119:3921aeca8633 87 PWM1B, // PWM1_PIN
mbed_official 119:3921aeca8633 88 PWM1C, // PWM2_PIN
mbed_official 119:3921aeca8633 89 PWM1D, // PWM3_PIN
mbed_official 119:3921aeca8633 90 PWM1E, // PWM4_PIN
mbed_official 119:3921aeca8633 91 PWM1F, // PWM5_PIN
mbed_official 119:3921aeca8633 92 PWM1G, // PWM6_PIN
mbed_official 119:3921aeca8633 93 PWM1H, // PWM7_PIN
mbed_official 119:3921aeca8633 94 PWM2A, // PWM8_PIN
mbed_official 119:3921aeca8633 95 PWM2B, // PWM9_PIN
mbed_official 119:3921aeca8633 96 PWM2C, // PWM10_PIN
mbed_official 119:3921aeca8633 97 PWM2D, // PWM11_PIN
mbed_official 119:3921aeca8633 98 PWM2E, // PWM12_PIN
mbed_official 119:3921aeca8633 99 PWM2F, // PWM13_PIN
mbed_official 119:3921aeca8633 100 PWM2G, // PWM14_PIN
mbed_official 119:3921aeca8633 101 PWM2H, // PWM15_PIN
mbed_official 119:3921aeca8633 102 };
mbed_official 119:3921aeca8633 103
mbed_official 119:3921aeca8633 104 static const MTU2_PWMType MTU2_PORT[] = {
mbed_official 119:3921aeca8633 105 TIOC0A, // MTU2_PWM0_PIN
mbed_official 119:3921aeca8633 106 TIOC0A, // MTU2_PWM1_PIN
mbed_official 119:3921aeca8633 107 TIOC0A, // MTU2_PWM2_PIN
mbed_official 119:3921aeca8633 108 TIOC0C, // MTU2_PWM3_PIN
mbed_official 119:3921aeca8633 109 TIOC0C, // MTU2_PWM4_PIN
mbed_official 119:3921aeca8633 110 TIOC0C, // MTU2_PWM5_PIN
mbed_official 119:3921aeca8633 111 TIOC1A, // MTU2_PWM6_PIN
mbed_official 119:3921aeca8633 112 TIOC1A, // MTU2_PWM7_PIN
mbed_official 119:3921aeca8633 113 TIOC1A, // MTU2_PWM8_PIN
mbed_official 119:3921aeca8633 114 TIOC1A, // MTU2_PWM9_PIN
mbed_official 119:3921aeca8633 115 TIOC1A, // MTU2_PWM10_PIN
mbed_official 119:3921aeca8633 116 TIOC2A, // MTU2_PWM11_PIN
mbed_official 119:3921aeca8633 117 TIOC2A, // MTU2_PWM12_PIN
mbed_official 119:3921aeca8633 118 TIOC2A, // MTU2_PWM13_PIN
mbed_official 119:3921aeca8633 119 TIOC2A, // MTU2_PWM14_PIN
mbed_official 119:3921aeca8633 120 TIOC3A, // MTU2_PWM15_PIN
mbed_official 119:3921aeca8633 121 TIOC3A, // MTU2_PWM16_PIN
mbed_official 119:3921aeca8633 122 TIOC3A, // MTU2_PWM17_PIN
mbed_official 119:3921aeca8633 123 TIOC3C, // MTU2_PWM18_PIN
mbed_official 119:3921aeca8633 124 TIOC3C, // MTU2_PWM19_PIN
mbed_official 119:3921aeca8633 125 TIOC3C, // MTU2_PWM20_PIN
mbed_official 119:3921aeca8633 126 TIOC4A, // MTU2_PWM21_PIN
mbed_official 119:3921aeca8633 127 TIOC4A, // MTU2_PWM22_PIN
mbed_official 119:3921aeca8633 128 TIOC4A, // MTU2_PWM23_PIN
mbed_official 119:3921aeca8633 129 TIOC4C, // MTU2_PWM24_PIN
mbed_official 119:3921aeca8633 130 TIOC4C, // MTU2_PWM25_PIN
mbed_official 119:3921aeca8633 131 TIOC4C, // MTU2_PWM26_PIN
mbed_official 119:3921aeca8633 132 };
mbed_official 119:3921aeca8633 133
mbed_official 119:3921aeca8633 134 static __IO uint16_t *PWM_MATCH[] = {
mbed_official 119:3921aeca8633 135 &PWMPWBFR_1A, // PWM0_PIN
mbed_official 119:3921aeca8633 136 &PWMPWBFR_1A, // PWM1_PIN
mbed_official 119:3921aeca8633 137 &PWMPWBFR_1C, // PWM2_PIN
mbed_official 119:3921aeca8633 138 &PWMPWBFR_1C, // PWM3_PIN
mbed_official 119:3921aeca8633 139 &PWMPWBFR_1E, // PWM4_PIN
mbed_official 119:3921aeca8633 140 &PWMPWBFR_1E, // PWM5_PIN
mbed_official 119:3921aeca8633 141 &PWMPWBFR_1G, // PWM6_PIN
mbed_official 119:3921aeca8633 142 &PWMPWBFR_1G, // PWM7_PIN
mbed_official 119:3921aeca8633 143 &PWMPWBFR_2A, // PWM8_PIN
mbed_official 119:3921aeca8633 144 &PWMPWBFR_2A, // PWM9_PIN
mbed_official 119:3921aeca8633 145 &PWMPWBFR_2C, // PWM10_PIN
mbed_official 119:3921aeca8633 146 &PWMPWBFR_2C, // PWM11_PIN
mbed_official 119:3921aeca8633 147 &PWMPWBFR_2E, // PWM12_PIN
mbed_official 119:3921aeca8633 148 &PWMPWBFR_2E, // PWM13_PIN
mbed_official 119:3921aeca8633 149 &PWMPWBFR_2G, // PWM14_PIN
mbed_official 119:3921aeca8633 150 &PWMPWBFR_2G, // PWM15_PIN
mbed_official 119:3921aeca8633 151 };
mbed_official 119:3921aeca8633 152
mbed_official 119:3921aeca8633 153 static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM][MTU2_PWM_SIGNAL] = {
mbed_official 119:3921aeca8633 154 { &MTU2TGRA_0, &MTU2TGRB_0 } // MTU2_PWM0_PIN
mbed_official 119:3921aeca8633 155 { &MTU2TGRA_0, &MTU2TGRB_0 } // MTU2_PWM1_PIN
mbed_official 119:3921aeca8633 156 { &MTU2TGRA_0, &MTU2TGRB_0 } // MTU2_PWM2_PIN
mbed_official 119:3921aeca8633 157 { &MTU2TGRC_0, &MTU2TGRD_0 } // MTU2_PWM3_PIN
mbed_official 119:3921aeca8633 158 { &MTU2TGRC_0, &MTU2TGRD_0 } // MTU2_PWM4_PIN
mbed_official 119:3921aeca8633 159 { &MTU2TGRC_0, &MTU2TGRD_0 } // MTU2_PWM5_PIN
mbed_official 119:3921aeca8633 160 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM6_PIN
mbed_official 119:3921aeca8633 161 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM7_PIN
mbed_official 119:3921aeca8633 162 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM8_PIN
mbed_official 119:3921aeca8633 163 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM9_PIN
mbed_official 119:3921aeca8633 164 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM10_PIN
mbed_official 119:3921aeca8633 165 { &MTU2TGRA_2, &MTU2TGRB_2 } // MTU2_PWM11_PIN
mbed_official 119:3921aeca8633 166 { &MTU2TGRA_2, &MTU2TGRB_2 } // MTU2_PWM12_PIN
mbed_official 119:3921aeca8633 167 { &MTU2TGRA_2, &MTU2TGRB_2 } // MTU2_PWM13_PIN
mbed_official 119:3921aeca8633 168 { &MTU2TGRA_2, &MTU2TGRB_2 } // MTU2_PWM14_PIN
mbed_official 119:3921aeca8633 169 { &MTU2TGRA_3, &MTU2TGRB_3 } // MTU2_PWM15_PIN
mbed_official 119:3921aeca8633 170 { &MTU2TGRA_3, &MTU2TGRB_3 } // MTU2_PWM16_PIN
mbed_official 119:3921aeca8633 171 { &MTU2TGRA_3, &MTU2TGRB_3 } // MTU2_PWM17_PIN
mbed_official 119:3921aeca8633 172 { &MTU2TGRC_3, &MTU2TGRD_3 } // MTU2_PWM18_PIN
mbed_official 119:3921aeca8633 173 { &MTU2TGRC_3, &MTU2TGRD_3 } // MTU2_PWM19_PIN
mbed_official 119:3921aeca8633 174 { &MTU2TGRC_3, &MTU2TGRD_3 } // MTU2_PWM20_PIN
mbed_official 119:3921aeca8633 175 { &MTU2TGRA_4, &MTU2TGRB_2 } // MTU2_PWM21_PIN
mbed_official 119:3921aeca8633 176 { &MTU2TGRA_4, &MTU2TGRB_2 } // MTU2_PWM22_PIN
mbed_official 119:3921aeca8633 177 { &MTU2TGRA_4, &MTU2TGRB_2 } // MTU2_PWM23_PIN
mbed_official 119:3921aeca8633 178 { &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM24_PIN
mbed_official 119:3921aeca8633 179 { &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM25_PIN
mbed_official 119:3921aeca8633 180 { &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM26_PIN
mbed_official 119:3921aeca8633 181 };
mbed_official 119:3921aeca8633 182 #else
mbed_official 119:3921aeca8633 183 #define MTU2_PWM_NUM 12
mbed_official 119:3921aeca8633 184 #define MTU2_PWM_SIGNAL 2
mbed_official 119:3921aeca8633 185 #define MTU2_PWM_OFFSET 0x20
mbed_official 119:3921aeca8633 186
mbed_official 119:3921aeca8633 187 // PORT ID, PWM ID, Pin function
mbed_official 119:3921aeca8633 188 static const PinMap PinMap_PWM[] = {
mbed_official 119:3921aeca8633 189 //TIOC0 A,C
mbed_official 119:3921aeca8633 190 {P4_0 , MTU2_PWM0_PIN , 2}, //TIOC0A
mbed_official 119:3921aeca8633 191 {P5_0 , MTU2_PWM1_PIN , 6}, //TIOC0A
mbed_official 119:3921aeca8633 192 {P4_2 , MTU2_PWM2_PIN , 2}, //TIOC0C
mbed_official 119:3921aeca8633 193 {P5_5 , MTU2_PWM3_PIN , 6}, //TIOC0C
mbed_official 119:3921aeca8633 194 //TIOC2 A
mbed_official 119:3921aeca8633 195 {P8_14 , MTU2_PWM4_PIN , 4}, //TIOC2A
mbed_official 119:3921aeca8633 196 //TIOC3 A,C
mbed_official 119:3921aeca8633 197 {P8_10 , MTU2_PWM5_PIN , 4}, //TIOC3A
mbed_official 119:3921aeca8633 198 {P5_3 , MTU2_PWM6_PIN , 6}, //TIOC3C
mbed_official 119:3921aeca8633 199 {P8_12 , MTU2_PWM7_PIN , 4}, //TIOC3C
mbed_official 119:3921aeca8633 200 //TIOC4 A,C
mbed_official 119:3921aeca8633 201 {P3_8 , MTU2_PWM8_PIN , 6}, //TIOC4A
mbed_official 119:3921aeca8633 202 {P4_4 , MTU2_PWM9_PIN , 3}, //TIOC4A
mbed_official 119:3921aeca8633 203 {P3_10 , MTU2_PWM10_PIN , 6}, //TIOC4C
mbed_official 119:3921aeca8633 204 {P4_6 , MTU2_PWM11_PIN , 3}, //TIOC4C
mbed_official 119:3921aeca8633 205 //PWM1
mbed_official 119:3921aeca8633 206 {P8_10 , PWM0_PIN , 6}, //PWM1C
mbed_official 119:3921aeca8633 207 {P8_11 , PWM1_PIN , 6}, //PWM1D
mbed_official 119:3921aeca8633 208 {P8_12 , PWM2_PIN , 6}, //PWM1E
mbed_official 119:3921aeca8633 209 {P8_13 , PWM3_PIN , 6}, //PWM1F
mbed_official 119:3921aeca8633 210 {P8_14 , PWM4_PIN , 6}, //PWM1G
mbed_official 119:3921aeca8633 211 {P8_15 , PWM5_PIN , 6}, //PWM1H
mbed_official 119:3921aeca8633 212 //PWM2
mbed_official 119:3921aeca8633 213 {P3_0 , PWM6_PIN , 7}, //PWM2A
mbed_official 119:3921aeca8633 214 {P3_1 , PWM7_PIN , 7}, //PWM2B
mbed_official 119:3921aeca8633 215 {P3_2 , PWM8_PIN , 7}, //PWM2C
mbed_official 119:3921aeca8633 216 {P4_4 , PWM9_PIN , 4}, //PWM2E
mbed_official 119:3921aeca8633 217 {P4_5 , PWM10_PIN , 4}, //PWM2F
mbed_official 119:3921aeca8633 218 {P4_6 , PWM11_PIN , 4}, //PWM2G
mbed_official 119:3921aeca8633 219 {P4_7 , PWM12_PIN , 4}, //PWM2H
mbed_official 119:3921aeca8633 220 {NC , NC , 0}
mbed_official 119:3921aeca8633 221 };
mbed_official 119:3921aeca8633 222
mbed_official 119:3921aeca8633 223 static const PWMType PORT[] = {
mbed_official 119:3921aeca8633 224 PWM1C, // PWM0_PIN
mbed_official 119:3921aeca8633 225 PWM1D, // PWM1_PIN
mbed_official 119:3921aeca8633 226 PWM1E, // PWM2_PIN
mbed_official 119:3921aeca8633 227 PWM1F, // PWM3_PIN
mbed_official 119:3921aeca8633 228 PWM1G, // PWM4_PIN
mbed_official 119:3921aeca8633 229 PWM1H, // PWM5_PIN
mbed_official 119:3921aeca8633 230 PWM2A, // PWM6_PIN
mbed_official 119:3921aeca8633 231 PWM2B, // PWM7_PIN
mbed_official 119:3921aeca8633 232 PWM2C, // PWM8_PIN
mbed_official 119:3921aeca8633 233 PWM2E, // PWM9_PIN
mbed_official 119:3921aeca8633 234 PWM2F, // PWM10_PIN
mbed_official 119:3921aeca8633 235 PWM2G, // PWM11_PIN
mbed_official 119:3921aeca8633 236 PWM2H, // PWM12_PIN
mbed_official 119:3921aeca8633 237 };
mbed_official 119:3921aeca8633 238
mbed_official 119:3921aeca8633 239 static const MTU2_PWMType MTU2_PORT[] = {
mbed_official 119:3921aeca8633 240 TIOC0A, // MTU2_PWM0_PIN
mbed_official 119:3921aeca8633 241 TIOC0A, // MTU2_PWM1_PIN
mbed_official 119:3921aeca8633 242 TIOC0C, // MTU2_PWM2_PIN
mbed_official 119:3921aeca8633 243 TIOC0C, // MTU2_PWM3_PIN
mbed_official 119:3921aeca8633 244 TIOC2A, // MTU2_PWM4_PIN
mbed_official 119:3921aeca8633 245 TIOC3A, // MTU2_PWM5_PIN
mbed_official 119:3921aeca8633 246 TIOC3C, // MTU2_PWM6_PIN
mbed_official 119:3921aeca8633 247 TIOC3C, // MTU2_PWM7_PIN
mbed_official 119:3921aeca8633 248 TIOC4A, // MTU2_PWM8_PIN
mbed_official 119:3921aeca8633 249 TIOC4A, // MTU2_PWM9_PIN
mbed_official 119:3921aeca8633 250 TIOC4C, // MTU2_PWM10_PIN
mbed_official 119:3921aeca8633 251 TIOC4C, // MTU2_PWM11_PIN
mbed_official 119:3921aeca8633 252 };
mbed_official 119:3921aeca8633 253
mbed_official 119:3921aeca8633 254 static __IO uint16_t *PWM_MATCH[] = {
mbed_official 119:3921aeca8633 255 &PWMPWBFR_1C, // PWM0_PIN
mbed_official 119:3921aeca8633 256 &PWMPWBFR_1C, // PWM1_PIN
mbed_official 119:3921aeca8633 257 &PWMPWBFR_1E, // PWM2_PIN
mbed_official 119:3921aeca8633 258 &PWMPWBFR_1E, // PWM3_PIN
mbed_official 119:3921aeca8633 259 &PWMPWBFR_1G, // PWM4_PIN
mbed_official 119:3921aeca8633 260 &PWMPWBFR_1G, // PWM5_PIN
mbed_official 119:3921aeca8633 261 &PWMPWBFR_2A, // PWM6_PIN
mbed_official 119:3921aeca8633 262 &PWMPWBFR_2A, // PWM7_PIN
mbed_official 119:3921aeca8633 263 &PWMPWBFR_2C, // PWM8_PIN
mbed_official 119:3921aeca8633 264 &PWMPWBFR_2E, // PWM9_PIN
mbed_official 119:3921aeca8633 265 &PWMPWBFR_2E, // PWM10_PIN
mbed_official 119:3921aeca8633 266 &PWMPWBFR_2G, // PWM11_PIN
mbed_official 119:3921aeca8633 267 &PWMPWBFR_2G, // PWM12_PIN
mbed_official 119:3921aeca8633 268 };
mbed_official 119:3921aeca8633 269
mbed_official 119:3921aeca8633 270 static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM][MTU2_PWM_SIGNAL] = {
mbed_official 119:3921aeca8633 271 { &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM0_PIN
mbed_official 119:3921aeca8633 272 { &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM1_PIN
mbed_official 119:3921aeca8633 273 { &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM2_PIN
mbed_official 119:3921aeca8633 274 { &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM3_PIN
mbed_official 119:3921aeca8633 275 { &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM4_PIN
mbed_official 119:3921aeca8633 276 { &MTU2TGRA_3, &MTU2TGRB_3 }, // MTU2_PWM5_PIN
mbed_official 119:3921aeca8633 277 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM6_PIN
mbed_official 119:3921aeca8633 278 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM7_PIN
mbed_official 119:3921aeca8633 279 { &MTU2TGRA_4, &MTU2TGRB_2 }, // MTU2_PWM8_PIN
mbed_official 119:3921aeca8633 280 { &MTU2TGRA_4, &MTU2TGRB_2 }, // MTU2_PWM9_PIN
mbed_official 119:3921aeca8633 281 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM10_PIN
mbed_official 119:3921aeca8633 282 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM11_PIN
mbed_official 119:3921aeca8633 283 };
mbed_official 119:3921aeca8633 284 #endif
mbed_official 119:3921aeca8633 285
mbed_official 119:3921aeca8633 286
mbed_official 119:3921aeca8633 287 static __IO uint8_t *TCR_MATCH[] = {
mbed_official 119:3921aeca8633 288 &MTU2TCR_0,
mbed_official 119:3921aeca8633 289 &MTU2TCR_1,
mbed_official 119:3921aeca8633 290 &MTU2TCR_2,
mbed_official 119:3921aeca8633 291 &MTU2TCR_3,
mbed_official 119:3921aeca8633 292 &MTU2TCR_4,
mbed_official 119:3921aeca8633 293 };
mbed_official 119:3921aeca8633 294
mbed_official 119:3921aeca8633 295 static __IO uint8_t *TIORH_MATCH[] = {
mbed_official 119:3921aeca8633 296 &MTU2TIORH_0,
mbed_official 119:3921aeca8633 297 &MTU2TIOR_1,
mbed_official 119:3921aeca8633 298 &MTU2TIOR_2,
mbed_official 119:3921aeca8633 299 &MTU2TIORH_3,
mbed_official 119:3921aeca8633 300 &MTU2TIORH_4,
mbed_official 119:3921aeca8633 301 };
mbed_official 119:3921aeca8633 302
mbed_official 119:3921aeca8633 303 static __IO uint8_t *TIORL_MATCH[] = {
mbed_official 119:3921aeca8633 304 &MTU2TIORL_0,
mbed_official 119:3921aeca8633 305 NULL,
mbed_official 119:3921aeca8633 306 NULL,
mbed_official 119:3921aeca8633 307 &MTU2TIORL_3,
mbed_official 119:3921aeca8633 308 &MTU2TIORL_4,
mbed_official 119:3921aeca8633 309 };
mbed_official 119:3921aeca8633 310
mbed_official 119:3921aeca8633 311 static __IO uint16_t *TGRA_MATCH[] = {
mbed_official 119:3921aeca8633 312 &MTU2TGRA_0,
mbed_official 119:3921aeca8633 313 &MTU2TGRA_1,
mbed_official 119:3921aeca8633 314 &MTU2TGRA_2,
mbed_official 119:3921aeca8633 315 &MTU2TGRA_3,
mbed_official 119:3921aeca8633 316 &MTU2TGRA_4,
mbed_official 119:3921aeca8633 317 };
mbed_official 119:3921aeca8633 318
mbed_official 119:3921aeca8633 319 static __IO uint16_t *TGRC_MATCH[] = {
mbed_official 119:3921aeca8633 320 &MTU2TGRC_0,
mbed_official 119:3921aeca8633 321 NULL,
mbed_official 119:3921aeca8633 322 NULL,
mbed_official 119:3921aeca8633 323 &MTU2TGRC_3,
mbed_official 119:3921aeca8633 324 &MTU2TGRC_4,
mbed_official 119:3921aeca8633 325 };
mbed_official 119:3921aeca8633 326
mbed_official 119:3921aeca8633 327 static __IO uint8_t *TMDR_MATCH[] = {
mbed_official 119:3921aeca8633 328 &MTU2TMDR_0,
mbed_official 119:3921aeca8633 329 &MTU2TMDR_1,
mbed_official 119:3921aeca8633 330 &MTU2TMDR_2,
mbed_official 119:3921aeca8633 331 &MTU2TMDR_3,
mbed_official 119:3921aeca8633 332 &MTU2TMDR_4,
mbed_official 119:3921aeca8633 333 };
mbed_official 119:3921aeca8633 334
mbed_official 119:3921aeca8633 335 static int MAX_PERIOD[] = {
mbed_official 119:3921aeca8633 336 125000,
mbed_official 119:3921aeca8633 337 503000,
mbed_official 119:3921aeca8633 338 2000000,
mbed_official 119:3921aeca8633 339 2000000,
mbed_official 119:3921aeca8633 340 2000000,
mbed_official 119:3921aeca8633 341 };
mbed_official 119:3921aeca8633 342
mbed_official 119:3921aeca8633 343 typedef enum {
mbed_official 119:3921aeca8633 344 MODE_PWM = 0,
mbed_official 119:3921aeca8633 345 MODE_MTU2
mbed_official 119:3921aeca8633 346 } PWMmode;
mbed_official 119:3921aeca8633 347
mbed_official 119:3921aeca8633 348 typedef enum {
mbed_official 119:3921aeca8633 349 MTU2_PULSE = 0,
mbed_official 119:3921aeca8633 350 MTU2_PERIOD
mbed_official 119:3921aeca8633 351 } MTU2Signal;
mbed_official 119:3921aeca8633 352
mbed_official 119:3921aeca8633 353 static int pwm_mode = MODE_PWM;
mbed_official 119:3921aeca8633 354 static uint16_t init_period_ch1 = 0;
mbed_official 119:3921aeca8633 355 static uint16_t init_period_ch2 = 0;
mbed_official 119:3921aeca8633 356 static uint16_t init_mtu2_period_ch[5] = {0};
mbed_official 119:3921aeca8633 357 static int32_t period_ch1 = 1;
mbed_official 119:3921aeca8633 358 static int32_t period_ch2 = 1;
mbed_official 119:3921aeca8633 359 static int32_t mtu2_period_ch[5] = {1, 1, 1, 1, 1};
mbed_official 119:3921aeca8633 360
mbed_official 119:3921aeca8633 361 void pwmout_init(pwmout_t* obj, PinName pin) {
mbed_official 119:3921aeca8633 362 // determine the channel
mbed_official 119:3921aeca8633 363 PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
mbed_official 119:3921aeca8633 364 MBED_ASSERT(pwm != (PWMName)NC);
mbed_official 119:3921aeca8633 365
mbed_official 119:3921aeca8633 366 if (pwm >= MTU2_PWM_OFFSET) {
mbed_official 119:3921aeca8633 367 /* PWM by MTU2 */
mbed_official 119:3921aeca8633 368 int tmp_pwm;
mbed_official 119:3921aeca8633 369
mbed_official 119:3921aeca8633 370 pwm_mode = MODE_MTU2;
mbed_official 119:3921aeca8633 371 // power on
mbed_official 119:3921aeca8633 372 CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP33);
mbed_official 119:3921aeca8633 373
mbed_official 119:3921aeca8633 374 obj->pwm = pwm;
mbed_official 119:3921aeca8633 375 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
mbed_official 119:3921aeca8633 376 if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000040) == 0x00000040) {
mbed_official 119:3921aeca8633 377 obj->ch = 4;
mbed_official 119:3921aeca8633 378 MTU2TOER |= 0x36;
mbed_official 119:3921aeca8633 379 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000030) == 0x00000030) {
mbed_official 119:3921aeca8633 380 obj->ch = 3;
mbed_official 119:3921aeca8633 381 MTU2TOER |= 0x09;
mbed_official 119:3921aeca8633 382 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000020) == 0x00000020) {
mbed_official 119:3921aeca8633 383 obj->ch = 2;
mbed_official 119:3921aeca8633 384 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000010) == 0x00000010) {
mbed_official 119:3921aeca8633 385 obj->ch = 1;
mbed_official 119:3921aeca8633 386 } else {
mbed_official 119:3921aeca8633 387 obj->ch = 0;
mbed_official 119:3921aeca8633 388 }
mbed_official 119:3921aeca8633 389 // Wire pinout
mbed_official 119:3921aeca8633 390 pinmap_pinout(pin, PinMap_PWM);
mbed_official 119:3921aeca8633 391
mbed_official 119:3921aeca8633 392 int bitmask = 1 << (pin & 0xf);
mbed_official 119:3921aeca8633 393
mbed_official 119:3921aeca8633 394 *PMSR(PINGROUP(pin)) = (bitmask << 16) | 0;
mbed_official 119:3921aeca8633 395
mbed_official 119:3921aeca8633 396 // default duty 0.0f
mbed_official 119:3921aeca8633 397 pwmout_write(obj, 0);
mbed_official 119:3921aeca8633 398 if (init_mtu2_period_ch[obj->ch] == 0) {
mbed_official 119:3921aeca8633 399 // default period 1ms
mbed_official 119:3921aeca8633 400 pwmout_period_us(obj, 1000);
mbed_official 119:3921aeca8633 401 init_mtu2_period_ch[obj->ch] = 1;
mbed_official 119:3921aeca8633 402 }
mbed_official 119:3921aeca8633 403 } else {
mbed_official 119:3921aeca8633 404 /* PWM */
mbed_official 119:3921aeca8633 405 pwm_mode = MODE_PWM;
mbed_official 119:3921aeca8633 406 // power on
mbed_official 119:3921aeca8633 407 CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP30);
mbed_official 119:3921aeca8633 408
mbed_official 119:3921aeca8633 409 obj->pwm = pwm;
mbed_official 119:3921aeca8633 410 if (((uint32_t)PORT[obj->pwm] & 0x00000010) == 0x00000010) {
mbed_official 119:3921aeca8633 411 obj->ch = 2;
mbed_official 119:3921aeca8633 412 PWMPWPR_2_BYTE_L = 0x00;
mbed_official 119:3921aeca8633 413 } else {
mbed_official 119:3921aeca8633 414 obj->ch = 1;
mbed_official 119:3921aeca8633 415 PWMPWPR_1_BYTE_L = 0x00;
mbed_official 119:3921aeca8633 416 }
mbed_official 119:3921aeca8633 417
mbed_official 119:3921aeca8633 418 // Wire pinout
mbed_official 119:3921aeca8633 419 pinmap_pinout(pin, PinMap_PWM);
mbed_official 119:3921aeca8633 420
mbed_official 119:3921aeca8633 421 // default to 491us: standard for servos, and fine for e.g. brightness control
mbed_official 119:3921aeca8633 422 pwmout_write(obj, 0);
mbed_official 119:3921aeca8633 423 if ((obj->ch == 2) && (init_period_ch2 == 0)) {
mbed_official 119:3921aeca8633 424 pwmout_period_us(obj, 491);
mbed_official 119:3921aeca8633 425 init_period_ch2 = 1;
mbed_official 119:3921aeca8633 426 }
mbed_official 119:3921aeca8633 427 if ((obj->ch == 1) && (init_period_ch1 == 0)) {
mbed_official 119:3921aeca8633 428 pwmout_period_us(obj, 491);
mbed_official 119:3921aeca8633 429 init_period_ch1 = 1;
mbed_official 119:3921aeca8633 430 }
mbed_official 119:3921aeca8633 431 }
mbed_official 119:3921aeca8633 432 }
mbed_official 119:3921aeca8633 433
mbed_official 119:3921aeca8633 434 void pwmout_free(pwmout_t* obj) {
mbed_official 119:3921aeca8633 435 pwmout_write(obj, 0);
mbed_official 119:3921aeca8633 436 }
mbed_official 119:3921aeca8633 437
mbed_official 119:3921aeca8633 438 void pwmout_write(pwmout_t* obj, float value) {
mbed_official 119:3921aeca8633 439 uint32_t wk_cycle;
mbed_official 119:3921aeca8633 440 uint16_t v;
mbed_official 119:3921aeca8633 441
mbed_official 119:3921aeca8633 442 if (pwm_mode == MODE_MTU2) {
mbed_official 119:3921aeca8633 443 /* PWM by MTU2 */
mbed_official 119:3921aeca8633 444 int tmp_pwm;
mbed_official 119:3921aeca8633 445
mbed_official 119:3921aeca8633 446 if (value < 0.0f) {
mbed_official 119:3921aeca8633 447 value = 0.0f;
mbed_official 119:3921aeca8633 448 } else if (value > 1.0f) {
mbed_official 119:3921aeca8633 449 value = 1.0f;
mbed_official 119:3921aeca8633 450 } else {
mbed_official 119:3921aeca8633 451 // Do Nothing
mbed_official 119:3921aeca8633 452 }
mbed_official 119:3921aeca8633 453 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
mbed_official 119:3921aeca8633 454 wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
mbed_official 119:3921aeca8633 455 // set channel match to percentage
mbed_official 119:3921aeca8633 456 *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] = (uint16_t)((float)wk_cycle * value);
mbed_official 119:3921aeca8633 457 } else {
mbed_official 119:3921aeca8633 458 /* PWM */
mbed_official 119:3921aeca8633 459 if (value < 0.0f) {
mbed_official 119:3921aeca8633 460 value = 0.0f;
mbed_official 119:3921aeca8633 461 } else if (value > 1.0f) {
mbed_official 119:3921aeca8633 462 value = 1.0f;
mbed_official 119:3921aeca8633 463 } else {
mbed_official 119:3921aeca8633 464 // Do Nothing
mbed_official 119:3921aeca8633 465 }
mbed_official 119:3921aeca8633 466
mbed_official 119:3921aeca8633 467 if (obj->ch == 2) {
mbed_official 119:3921aeca8633 468 wk_cycle = PWMPWCYR_2 & 0x03ff;
mbed_official 119:3921aeca8633 469 } else {
mbed_official 119:3921aeca8633 470 wk_cycle = PWMPWCYR_1 & 0x03ff;
mbed_official 119:3921aeca8633 471 }
mbed_official 119:3921aeca8633 472
mbed_official 119:3921aeca8633 473 // set channel match to percentage
mbed_official 119:3921aeca8633 474 v = (uint16_t)((float)wk_cycle * value);
mbed_official 119:3921aeca8633 475 *PWM_MATCH[obj->pwm] = (v | ((PORT[obj->pwm] & 1) << 12));
mbed_official 119:3921aeca8633 476 }
mbed_official 119:3921aeca8633 477 }
mbed_official 119:3921aeca8633 478
mbed_official 119:3921aeca8633 479 float pwmout_read(pwmout_t* obj) {
mbed_official 119:3921aeca8633 480 uint32_t wk_cycle;
mbed_official 119:3921aeca8633 481 float value;
mbed_official 119:3921aeca8633 482
mbed_official 119:3921aeca8633 483 if (pwm_mode == MODE_MTU2) {
mbed_official 119:3921aeca8633 484 /* PWM by MTU2 */
mbed_official 119:3921aeca8633 485 uint32_t wk_pulse;
mbed_official 119:3921aeca8633 486 int tmp_pwm;
mbed_official 119:3921aeca8633 487
mbed_official 119:3921aeca8633 488 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
mbed_official 119:3921aeca8633 489 wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
mbed_official 119:3921aeca8633 490 wk_pulse = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] & 0xffff;
mbed_official 119:3921aeca8633 491 value = ((float)wk_pulse / (float)wk_cycle);
mbed_official 119:3921aeca8633 492 } else {
mbed_official 119:3921aeca8633 493 /* PWM */
mbed_official 119:3921aeca8633 494 if (obj->ch == 2) {
mbed_official 119:3921aeca8633 495 wk_cycle = PWMPWCYR_2 & 0x03ff;
mbed_official 119:3921aeca8633 496 } else {
mbed_official 119:3921aeca8633 497 wk_cycle = PWMPWCYR_1 & 0x03ff;
mbed_official 119:3921aeca8633 498 }
mbed_official 119:3921aeca8633 499 value = ((float)(*PWM_MATCH[obj->pwm] & 0x03ff) / (float)wk_cycle);
mbed_official 119:3921aeca8633 500 }
mbed_official 119:3921aeca8633 501
mbed_official 119:3921aeca8633 502 return (value > 1.0f) ? (1.0f) : (value);
mbed_official 119:3921aeca8633 503 }
mbed_official 119:3921aeca8633 504
mbed_official 119:3921aeca8633 505 void pwmout_period(pwmout_t* obj, float seconds) {
mbed_official 119:3921aeca8633 506 pwmout_period_us(obj, seconds * 1000000.0f);
mbed_official 119:3921aeca8633 507 }
mbed_official 119:3921aeca8633 508
mbed_official 119:3921aeca8633 509 void pwmout_period_ms(pwmout_t* obj, int ms) {
mbed_official 119:3921aeca8633 510 pwmout_period_us(obj, ms * 1000);
mbed_official 119:3921aeca8633 511 }
mbed_official 119:3921aeca8633 512
mbed_official 119:3921aeca8633 513 static void set_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){
mbed_official 119:3921aeca8633 514 uint16_t wk_pwmpbfr;
mbed_official 119:3921aeca8633 515 float value;
mbed_official 119:3921aeca8633 516 uint16_t v;
mbed_official 119:3921aeca8633 517
mbed_official 119:3921aeca8633 518 wk_pwmpbfr = *p_pwmpbfr;
mbed_official 119:3921aeca8633 519 value = ((float)(wk_pwmpbfr & 0x03ff) / (float)last_cycle);
mbed_official 119:3921aeca8633 520 v = (uint16_t)((float)new_cycle * value);
mbed_official 119:3921aeca8633 521 *p_pwmpbfr = (v | (wk_pwmpbfr & 0x1000));
mbed_official 119:3921aeca8633 522 }
mbed_official 119:3921aeca8633 523
mbed_official 119:3921aeca8633 524 static void set_mtu2_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){
mbed_official 119:3921aeca8633 525 uint16_t wk_pwmpbfr;
mbed_official 119:3921aeca8633 526 float value;
mbed_official 119:3921aeca8633 527
mbed_official 119:3921aeca8633 528 wk_pwmpbfr = *p_pwmpbfr;
mbed_official 119:3921aeca8633 529 value = ((float)(wk_pwmpbfr & 0xffff) / (float)last_cycle);
mbed_official 119:3921aeca8633 530 *p_pwmpbfr = (uint16_t)((float)new_cycle * value);
mbed_official 119:3921aeca8633 531 }
mbed_official 119:3921aeca8633 532
mbed_official 119:3921aeca8633 533 // Set the PWM period, keeping the duty cycle the same.
mbed_official 119:3921aeca8633 534 void pwmout_period_us(pwmout_t* obj, int us) {
mbed_official 119:3921aeca8633 535 uint64_t wk_cycle_mtu2;
mbed_official 119:3921aeca8633 536 uint32_t pclk_base;
mbed_official 119:3921aeca8633 537 uint32_t wk_cycle;
mbed_official 119:3921aeca8633 538 uint32_t wk_cks = 0;
mbed_official 119:3921aeca8633 539 uint16_t wk_last_cycle;
mbed_official 119:3921aeca8633 540 int max_us = 0;
mbed_official 119:3921aeca8633 541
mbed_official 119:3921aeca8633 542 if (pwm_mode == MODE_MTU2) {
mbed_official 119:3921aeca8633 543 /* PWM by MTU2 */
mbed_official 119:3921aeca8633 544 int tmp_pwm;
mbed_official 119:3921aeca8633 545 uint16_t tmp_tgra;
mbed_official 119:3921aeca8633 546 uint16_t tmp_tgrc;
mbed_official 119:3921aeca8633 547 uint8_t tmp_tcr_up;
mbed_official 119:3921aeca8633 548 uint8_t tmp_tstr_sp;
mbed_official 119:3921aeca8633 549 uint8_t tmp_tstr_st;
mbed_official 119:3921aeca8633 550
mbed_official 119:3921aeca8633 551 max_us = MAX_PERIOD[obj->ch];
mbed_official 119:3921aeca8633 552 if (us > max_us) {
mbed_official 119:3921aeca8633 553 us = max_us;
mbed_official 119:3921aeca8633 554 } else if (us < 1) {
mbed_official 119:3921aeca8633 555 us = 1;
mbed_official 119:3921aeca8633 556 } else {
mbed_official 119:3921aeca8633 557 // Do Nothing
mbed_official 119:3921aeca8633 558 }
mbed_official 119:3921aeca8633 559
mbed_official 119:3921aeca8633 560 if (RZ_A1_IsClockMode0() == false) {
mbed_official 119:3921aeca8633 561 pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK;
mbed_official 119:3921aeca8633 562 } else {
mbed_official 119:3921aeca8633 563 pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK;
mbed_official 119:3921aeca8633 564 }
mbed_official 119:3921aeca8633 565
mbed_official 119:3921aeca8633 566 wk_cycle_mtu2 = (uint64_t)pclk_base * us;
mbed_official 119:3921aeca8633 567 while (wk_cycle_mtu2 >= 65535000000) {
mbed_official 119:3921aeca8633 568 if ((obj->ch == 1) && (wk_cks == 3)) {
mbed_official 119:3921aeca8633 569 wk_cks+=2;
mbed_official 119:3921aeca8633 570 } else if ((obj->ch == 2) && (wk_cks == 3)) {
mbed_official 119:3921aeca8633 571 wk_cycle_mtu2 >>= 2;
mbed_official 119:3921aeca8633 572 wk_cks+=3;
mbed_official 119:3921aeca8633 573 }
mbed_official 119:3921aeca8633 574 wk_cycle_mtu2 >>= 2;
mbed_official 119:3921aeca8633 575 wk_cks++;
mbed_official 119:3921aeca8633 576 }
mbed_official 119:3921aeca8633 577 wk_cycle = (uint32_t)(wk_cycle_mtu2 / 1000000);
mbed_official 119:3921aeca8633 578
mbed_official 119:3921aeca8633 579 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
mbed_official 119:3921aeca8633 580 if (((uint8_t)MTU2_PORT[tmp_pwm] & 0x02) == 0x02) {
mbed_official 119:3921aeca8633 581 tmp_tcr_up = 0xC0;
mbed_official 119:3921aeca8633 582 } else {
mbed_official 119:3921aeca8633 583 tmp_tcr_up = 0x40;
mbed_official 119:3921aeca8633 584 }
mbed_official 119:3921aeca8633 585 if ((obj->ch == 4) || (obj->ch == 3)) {
mbed_official 119:3921aeca8633 586 tmp_tstr_sp = ~(0x38 | (1 << (obj->ch + 3)));
mbed_official 119:3921aeca8633 587 tmp_tstr_st = (1 << (obj->ch + 3));
mbed_official 119:3921aeca8633 588 } else {
mbed_official 119:3921aeca8633 589 tmp_tstr_sp = ~(0x38 | (1 << obj->ch));
mbed_official 119:3921aeca8633 590 tmp_tstr_st = (1 << obj->ch);
mbed_official 119:3921aeca8633 591 }
mbed_official 119:3921aeca8633 592 // Counter Stop
mbed_official 119:3921aeca8633 593 MTU2TSTR &= tmp_tstr_sp;
mbed_official 119:3921aeca8633 594 wk_last_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
mbed_official 119:3921aeca8633 595 *TCR_MATCH[obj->ch] = tmp_tcr_up | wk_cks;
mbed_official 119:3921aeca8633 596 *TIORH_MATCH[obj->ch] = 0x21;
mbed_official 119:3921aeca8633 597 if ((obj->ch == 0) || (obj->ch == 3) || (obj->ch == 4)) {
mbed_official 119:3921aeca8633 598 *TIORL_MATCH[obj->ch] = 0x21;
mbed_official 119:3921aeca8633 599 }
mbed_official 119:3921aeca8633 600 *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] = (uint16_t)wk_cycle; // Set period
mbed_official 119:3921aeca8633 601
mbed_official 119:3921aeca8633 602 // Set duty again(TGRA)
mbed_official 119:3921aeca8633 603 tmp_tgra = *TGRA_MATCH[obj->ch];
mbed_official 119:3921aeca8633 604 set_mtu2_duty_again(&tmp_tgra, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 605 if ((obj->ch == 0) || (obj->ch == 3) || (obj->ch == 4)) {
mbed_official 119:3921aeca8633 606 // Set duty again(TGRC)
mbed_official 119:3921aeca8633 607 tmp_tgrc = *TGRC_MATCH[obj->ch];
mbed_official 119:3921aeca8633 608 set_mtu2_duty_again(&tmp_tgrc, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 609 }
mbed_official 119:3921aeca8633 610 *TMDR_MATCH[obj->ch] = 0x02; // PWM mode 1
mbed_official 119:3921aeca8633 611
mbed_official 119:3921aeca8633 612 // Counter Start
mbed_official 119:3921aeca8633 613 MTU2TSTR |= tmp_tstr_st;
mbed_official 119:3921aeca8633 614 // Save for future use
mbed_official 119:3921aeca8633 615 mtu2_period_ch[obj->ch] = us;
mbed_official 119:3921aeca8633 616 } else {
mbed_official 119:3921aeca8633 617 /* PWM */
mbed_official 119:3921aeca8633 618 if (us > 491) {
mbed_official 119:3921aeca8633 619 us = 491;
mbed_official 119:3921aeca8633 620 } else if (us < 1) {
mbed_official 119:3921aeca8633 621 us = 1;
mbed_official 119:3921aeca8633 622 } else {
mbed_official 119:3921aeca8633 623 // Do Nothing
mbed_official 119:3921aeca8633 624 }
mbed_official 119:3921aeca8633 625
mbed_official 119:3921aeca8633 626 if (RZ_A1_IsClockMode0() == false) {
mbed_official 119:3921aeca8633 627 pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK / 10000;
mbed_official 119:3921aeca8633 628 } else {
mbed_official 119:3921aeca8633 629 pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK / 10000;
mbed_official 119:3921aeca8633 630 }
mbed_official 119:3921aeca8633 631
mbed_official 119:3921aeca8633 632 wk_cycle = pclk_base * us;
mbed_official 119:3921aeca8633 633 while (wk_cycle >= 102350) {
mbed_official 119:3921aeca8633 634 wk_cycle >>= 1;
mbed_official 119:3921aeca8633 635 wk_cks++;
mbed_official 119:3921aeca8633 636 }
mbed_official 119:3921aeca8633 637 wk_cycle = (wk_cycle + 50) / 100;
mbed_official 119:3921aeca8633 638
mbed_official 119:3921aeca8633 639 if (obj->ch == 2) {
mbed_official 119:3921aeca8633 640 wk_last_cycle = PWMPWCYR_2 & 0x03ff;
mbed_official 119:3921aeca8633 641 PWMPWCR_2_BYTE_L = 0xc0 | wk_cks;
mbed_official 119:3921aeca8633 642 PWMPWCYR_2 = (uint16_t)wk_cycle;
mbed_official 119:3921aeca8633 643
mbed_official 119:3921aeca8633 644 // Set duty again
mbed_official 119:3921aeca8633 645 set_duty_again(&PWMPWBFR_2A, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 646 set_duty_again(&PWMPWBFR_2C, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 647 set_duty_again(&PWMPWBFR_2E, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 648 set_duty_again(&PWMPWBFR_2G, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 649
mbed_official 119:3921aeca8633 650 // Counter Start
mbed_official 119:3921aeca8633 651 PWMPWCR_2_BYTE_L |= 0x08;
mbed_official 119:3921aeca8633 652
mbed_official 119:3921aeca8633 653 // Save for future use
mbed_official 119:3921aeca8633 654 period_ch2 = us;
mbed_official 119:3921aeca8633 655 } else {
mbed_official 119:3921aeca8633 656 wk_last_cycle = PWMPWCYR_1 & 0x03ff;
mbed_official 119:3921aeca8633 657 PWMPWCR_1_BYTE_L = 0xc0 | wk_cks;
mbed_official 119:3921aeca8633 658 PWMPWCYR_1 = (uint16_t)wk_cycle;
mbed_official 119:3921aeca8633 659
mbed_official 119:3921aeca8633 660 // Set duty again
mbed_official 119:3921aeca8633 661 set_duty_again(&PWMPWBFR_1A, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 662 set_duty_again(&PWMPWBFR_1C, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 663 set_duty_again(&PWMPWBFR_1E, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 664 set_duty_again(&PWMPWBFR_1G, wk_last_cycle, wk_cycle);
mbed_official 119:3921aeca8633 665
mbed_official 119:3921aeca8633 666 // Counter Start
mbed_official 119:3921aeca8633 667 PWMPWCR_1_BYTE_L |= 0x08;
mbed_official 119:3921aeca8633 668
mbed_official 119:3921aeca8633 669 // Save for future use
mbed_official 119:3921aeca8633 670 period_ch1 = us;
mbed_official 119:3921aeca8633 671 }
mbed_official 119:3921aeca8633 672 }
mbed_official 119:3921aeca8633 673 }
mbed_official 119:3921aeca8633 674
mbed_official 119:3921aeca8633 675 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
mbed_official 119:3921aeca8633 676 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
mbed_official 119:3921aeca8633 677 }
mbed_official 119:3921aeca8633 678
mbed_official 119:3921aeca8633 679 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
mbed_official 119:3921aeca8633 680 pwmout_pulsewidth_us(obj, ms * 1000);
mbed_official 119:3921aeca8633 681 }
mbed_official 119:3921aeca8633 682
mbed_official 119:3921aeca8633 683 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
mbed_official 119:3921aeca8633 684 float value = 0;
mbed_official 119:3921aeca8633 685
mbed_official 119:3921aeca8633 686 if (pwm_mode == MODE_MTU2) {
mbed_official 119:3921aeca8633 687 /* PWM by MTU2 */
mbed_official 119:3921aeca8633 688 if (mtu2_period_ch[obj->ch] != 0) {
mbed_official 119:3921aeca8633 689 value = (float)us / (float)mtu2_period_ch[obj->ch];
mbed_official 119:3921aeca8633 690 }
mbed_official 119:3921aeca8633 691 } else {
mbed_official 119:3921aeca8633 692 /* PWM */
mbed_official 119:3921aeca8633 693 if (obj->ch == 2) {
mbed_official 119:3921aeca8633 694 if (period_ch2 != 0) {
mbed_official 119:3921aeca8633 695 value = (float)us / (float)period_ch2;
mbed_official 119:3921aeca8633 696 }
mbed_official 119:3921aeca8633 697 } else {
mbed_official 119:3921aeca8633 698 if (period_ch1 != 0) {
mbed_official 119:3921aeca8633 699 value = (float)us / (float)period_ch1;
mbed_official 119:3921aeca8633 700 }
mbed_official 119:3921aeca8633 701 }
mbed_official 119:3921aeca8633 702
mbed_official 119:3921aeca8633 703 pwmout_write(obj, value);
mbed_official 119:3921aeca8633 704 }
mbed_official 119:3921aeca8633 705 }