Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_NUVOTON/TARGET_NUC472/analogin_api.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015-2016 Nuvoton
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16
<> 144:ef7eb2e8f9f7 17 #include "analogin_api.h"
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #if DEVICE_ANALOGIN
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 22 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 23 #include "PeripheralPins.h"
<> 144:ef7eb2e8f9f7 24 #include "nu_modutil.h"
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 struct nu_adc_var {
<> 144:ef7eb2e8f9f7 27 uint32_t en_msk;
<> 144:ef7eb2e8f9f7 28 };
<> 144:ef7eb2e8f9f7 29
<> 144:ef7eb2e8f9f7 30 static struct nu_adc_var adc0_var = {
<> 144:ef7eb2e8f9f7 31 .en_msk = 0
<> 144:ef7eb2e8f9f7 32 };
<> 144:ef7eb2e8f9f7 33 static struct nu_adc_var adc1_var = {
<> 144:ef7eb2e8f9f7 34 .en_msk = 0
<> 144:ef7eb2e8f9f7 35 };
<> 144:ef7eb2e8f9f7 36 static struct nu_adc_var adc2_var = {
<> 144:ef7eb2e8f9f7 37 .en_msk = 0
<> 144:ef7eb2e8f9f7 38 };
<> 144:ef7eb2e8f9f7 39 static struct nu_adc_var adc3_var = {
<> 144:ef7eb2e8f9f7 40 .en_msk = 0
<> 144:ef7eb2e8f9f7 41 };
<> 144:ef7eb2e8f9f7 42 static struct nu_adc_var adc4_var = {
<> 144:ef7eb2e8f9f7 43 .en_msk = 0
<> 144:ef7eb2e8f9f7 44 };
<> 144:ef7eb2e8f9f7 45 static struct nu_adc_var adc5_var = {
<> 144:ef7eb2e8f9f7 46 .en_msk = 0
<> 144:ef7eb2e8f9f7 47 };
<> 144:ef7eb2e8f9f7 48 static struct nu_adc_var adc6_var = {
<> 144:ef7eb2e8f9f7 49 .en_msk = 0
<> 144:ef7eb2e8f9f7 50 };
<> 144:ef7eb2e8f9f7 51 static struct nu_adc_var adc7_var = {
<> 144:ef7eb2e8f9f7 52 .en_msk = 0
<> 144:ef7eb2e8f9f7 53 };
<> 144:ef7eb2e8f9f7 54 static struct nu_adc_var adc8_var = {
<> 144:ef7eb2e8f9f7 55 .en_msk = 0
<> 144:ef7eb2e8f9f7 56 };
<> 144:ef7eb2e8f9f7 57 static struct nu_adc_var adc9_var = {
<> 144:ef7eb2e8f9f7 58 .en_msk = 0
<> 144:ef7eb2e8f9f7 59 };
<> 144:ef7eb2e8f9f7 60 static struct nu_adc_var adc10_var = {
<> 144:ef7eb2e8f9f7 61 .en_msk = 0
<> 144:ef7eb2e8f9f7 62 };
<> 144:ef7eb2e8f9f7 63 static struct nu_adc_var adc11_var = {
<> 144:ef7eb2e8f9f7 64 .en_msk = 0
<> 144:ef7eb2e8f9f7 65 };
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 static const struct nu_modinit_s adc_modinit_tab[] = {
<> 144:ef7eb2e8f9f7 68 {ADC_0_0, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc0_var},
<> 144:ef7eb2e8f9f7 69 {ADC_0_1, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc1_var},
<> 144:ef7eb2e8f9f7 70 {ADC_0_2, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc2_var},
<> 144:ef7eb2e8f9f7 71 {ADC_0_3, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc3_var},
<> 144:ef7eb2e8f9f7 72 {ADC_0_4, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc4_var},
<> 144:ef7eb2e8f9f7 73 {ADC_0_5, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc5_var},
<> 144:ef7eb2e8f9f7 74 {ADC_0_6, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc6_var},
<> 144:ef7eb2e8f9f7 75 {ADC_0_7, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc7_var},
<> 144:ef7eb2e8f9f7 76 {ADC_0_8, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc8_var},
<> 144:ef7eb2e8f9f7 77 {ADC_0_9, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc9_var},
<> 144:ef7eb2e8f9f7 78 {ADC_0_10, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc10_var},
<> 144:ef7eb2e8f9f7 79 {ADC_0_11, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc11_var}
<> 144:ef7eb2e8f9f7 80 };
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 void analogin_init(analogin_t *obj, PinName pin)
<> 144:ef7eb2e8f9f7 83 {
<> 144:ef7eb2e8f9f7 84 obj->adc = (ADCName) pinmap_peripheral(pin, PinMap_ADC);
<> 144:ef7eb2e8f9f7 85 MBED_ASSERT(obj->adc != (ADCName) NC);
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 const struct nu_modinit_s *modinit = get_modinit(obj->adc, adc_modinit_tab);
<> 144:ef7eb2e8f9f7 88 MBED_ASSERT(modinit != NULL);
<> 144:ef7eb2e8f9f7 89 MBED_ASSERT(modinit->modname == obj->adc);
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 // NOTE: All channels (identified by ADCName) share a ADC module. This reset will also affect other channels of the same ADC module.
<> 144:ef7eb2e8f9f7 92 if (! ((struct nu_adc_var *) modinit->var)->en_msk) {
<> 144:ef7eb2e8f9f7 93 // Reset this module if no channel enabled
<> 144:ef7eb2e8f9f7 94 SYS_ResetModule(modinit->rsetidx);
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 // Select clock source of paired channels
<> 144:ef7eb2e8f9f7 97 CLK_SetModuleClock(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
<> 144:ef7eb2e8f9f7 98 // Enable clock of paired channels
<> 144:ef7eb2e8f9f7 99 CLK_EnableModuleClock(modinit->clkidx);
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 // Power on ADC
<> 144:ef7eb2e8f9f7 102 ADC_POWER_ON(ADC);
<> 144:ef7eb2e8f9f7 103 }
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 ADC_T *adc_base = (ADC_T *) NU_MODBASE(obj->adc);
<> 144:ef7eb2e8f9f7 106 uint32_t chn = NU_MODSUBINDEX(obj->adc);
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 // Wire pinout
<> 144:ef7eb2e8f9f7 109 pinmap_pinout(pin, PinMap_ADC);
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 // Enable channel 0
<> 144:ef7eb2e8f9f7 112 ADC_Open(adc_base,
<> 144:ef7eb2e8f9f7 113 ADC_INPUT_MODE_SINGLE_END,
<> 144:ef7eb2e8f9f7 114 ADC_OPERATION_MODE_SINGLE,
<> 144:ef7eb2e8f9f7 115 1 << chn); // ADC_CH_0_MASK~ADC_CH_11_MASK
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 ((struct nu_adc_var *) modinit->var)->en_msk |= 1 << chn;
<> 144:ef7eb2e8f9f7 118 }
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 uint16_t analogin_read_u16(analogin_t *obj)
<> 144:ef7eb2e8f9f7 121 {
<> 144:ef7eb2e8f9f7 122 ADC_T *adc_base = (ADC_T *) NU_MODBASE(obj->adc);
<> 144:ef7eb2e8f9f7 123 uint32_t chn = NU_MODSUBINDEX(obj->adc);
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 ADC_START_CONV(adc_base);
<> 144:ef7eb2e8f9f7 126 while (adc_base->CTL & ADC_CTL_SWTRG_Msk);
<> 144:ef7eb2e8f9f7 127 uint16_t conv_res_12 = ADC_GET_CONVERSION_DATA(adc_base, chn);
<> 144:ef7eb2e8f9f7 128 // Just 12 bits are effective. Convert to 16 bits.
<> 144:ef7eb2e8f9f7 129 // conv_res_12: 0000 b11b10b9b8 b7b6b5b4 b3b2b1b0
<> 144:ef7eb2e8f9f7 130 // conv_res_16: b11b10b9b8 b7b6b5b4 b3b2b1b0 b11b10b9b8
<> 144:ef7eb2e8f9f7 131 uint16_t conv_res_16 = (conv_res_12 << 4) | (conv_res_12 >> 8);
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 return conv_res_16;
<> 144:ef7eb2e8f9f7 134 }
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 float analogin_read(analogin_t *obj)
<> 144:ef7eb2e8f9f7 137 {
<> 144:ef7eb2e8f9f7 138 uint16_t value = analogin_read_u16(obj);
<> 144:ef7eb2e8f9f7 139 return (float) value * (1.0f / (float) 0xFFFF);
<> 144:ef7eb2e8f9f7 140 }
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 #endif