Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/PeripheralNames.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015-2016 Nuvoton
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16
<> 144:ef7eb2e8f9f7 17 #ifndef MBED_PERIPHERALNAMES_H
<> 144:ef7eb2e8f9f7 18 #define MBED_PERIPHERALNAMES_H
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 23 extern "C" {
<> 144:ef7eb2e8f9f7 24 #endif
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 // NOTE: TIMER0_BASE=(APBPERIPH_BASE + 0x10000)
<> 144:ef7eb2e8f9f7 27 // TIMER1_BASE=(APBPERIPH_BASE + 0x10020)
<> 144:ef7eb2e8f9f7 28 #define NU_MODNAME(MODBASE, SUBINDEX) ((MODBASE) | (SUBINDEX))
<> 144:ef7eb2e8f9f7 29 #define NU_MODBASE(MODNAME) ((MODNAME) & 0xFFFFFFE0)
<> 144:ef7eb2e8f9f7 30 #define NU_MODSUBINDEX(MODNAME) ((MODNAME) & 0x0000001F)
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 #if 0
<> 144:ef7eb2e8f9f7 33 typedef enum {
<> 144:ef7eb2e8f9f7 34 GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0),
<> 144:ef7eb2e8f9f7 35 GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 0),
<> 144:ef7eb2e8f9f7 36 GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 0),
<> 144:ef7eb2e8f9f7 37 GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 0),
<> 144:ef7eb2e8f9f7 38 GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 0),
<> 144:ef7eb2e8f9f7 39 GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 0),
<> 144:ef7eb2e8f9f7 40 GPIO_G = (int) NU_MODNAME(GPIOG_BASE, 0),
<> 144:ef7eb2e8f9f7 41 GPIO_H = (int) NU_MODNAME(GPIOH_BASE, 0),
<> 144:ef7eb2e8f9f7 42 GPIO_I = (int) NU_MODNAME(GPIOI_BASE, 0)
<> 144:ef7eb2e8f9f7 43 } GPIOName;
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 typedef enum {
<> 144:ef7eb2e8f9f7 47 ADC_0_0 = (int) NU_MODNAME(ADC_BASE, 0),
<> 144:ef7eb2e8f9f7 48 ADC_0_1 = (int) NU_MODNAME(ADC_BASE, 1),
<> 144:ef7eb2e8f9f7 49 ADC_0_2 = (int) NU_MODNAME(ADC_BASE, 2),
<> 144:ef7eb2e8f9f7 50 ADC_0_3 = (int) NU_MODNAME(ADC_BASE, 3),
<> 144:ef7eb2e8f9f7 51 ADC_0_4 = (int) NU_MODNAME(ADC_BASE, 4),
<> 144:ef7eb2e8f9f7 52 ADC_0_5 = (int) NU_MODNAME(ADC_BASE, 5),
<> 144:ef7eb2e8f9f7 53 ADC_0_6 = (int) NU_MODNAME(ADC_BASE, 6),
<> 144:ef7eb2e8f9f7 54 ADC_0_7 = (int) NU_MODNAME(ADC_BASE, 7),
<> 144:ef7eb2e8f9f7 55 ADC_0_8 = (int) NU_MODNAME(ADC_BASE, 8),
<> 144:ef7eb2e8f9f7 56 ADC_0_9 = (int) NU_MODNAME(ADC_BASE, 9),
<> 144:ef7eb2e8f9f7 57 ADC_0_10 = (int) NU_MODNAME(ADC_BASE, 10),
<> 144:ef7eb2e8f9f7 58 ADC_0_11 = (int) NU_MODNAME(ADC_BASE, 11)
<> 144:ef7eb2e8f9f7 59 } ADCName;
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 typedef enum {
<> 144:ef7eb2e8f9f7 62 UART_0 = (int) NU_MODNAME(UART0_BASE, 0),
<> 144:ef7eb2e8f9f7 63 UART_1 = (int) NU_MODNAME(UART1_BASE, 0),
<> 144:ef7eb2e8f9f7 64 UART_2 = (int) NU_MODNAME(UART2_BASE, 0),
<> 144:ef7eb2e8f9f7 65 UART_3 = (int) NU_MODNAME(UART3_BASE, 0),
<> 144:ef7eb2e8f9f7 66 UART_4 = (int) NU_MODNAME(UART4_BASE, 0),
<> 144:ef7eb2e8f9f7 67 UART_5 = (int) NU_MODNAME(UART5_BASE, 0),
<> 144:ef7eb2e8f9f7 68 // FIXME: board-specific
<> 144:ef7eb2e8f9f7 69 STDIO_UART = UART_3
<> 144:ef7eb2e8f9f7 70 } UARTName;
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 typedef enum {
<> 144:ef7eb2e8f9f7 73 SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0),
<> 144:ef7eb2e8f9f7 74 SPI_1 = (int) NU_MODNAME(SPI1_BASE, 0),
<> 144:ef7eb2e8f9f7 75 SPI_2 = (int) NU_MODNAME(SPI2_BASE, 0),
<> 144:ef7eb2e8f9f7 76 SPI_3 = (int) NU_MODNAME(SPI3_BASE, 0)
<> 144:ef7eb2e8f9f7 77 } SPIName;
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 typedef enum {
<> 144:ef7eb2e8f9f7 80 I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0),
<> 144:ef7eb2e8f9f7 81 I2C_1 = (int) NU_MODNAME(I2C1_BASE, 0),
<> 144:ef7eb2e8f9f7 82 I2C_2 = (int) NU_MODNAME(I2C2_BASE, 0),
<> 144:ef7eb2e8f9f7 83 I2C_3 = (int) NU_MODNAME(I2C3_BASE, 0),
<> 144:ef7eb2e8f9f7 84 I2C_4 = (int) NU_MODNAME(I2C4_BASE, 0)
<> 144:ef7eb2e8f9f7 85 } I2CName;
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 typedef enum {
<> 144:ef7eb2e8f9f7 88 PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0),
<> 144:ef7eb2e8f9f7 89 PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 1),
<> 144:ef7eb2e8f9f7 90 PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 2),
<> 144:ef7eb2e8f9f7 91 PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 3),
<> 144:ef7eb2e8f9f7 92 PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 4),
<> 144:ef7eb2e8f9f7 93 PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 5),
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 0),
<> 144:ef7eb2e8f9f7 96 PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1),
<> 144:ef7eb2e8f9f7 97 PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 2),
<> 144:ef7eb2e8f9f7 98 PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 3),
<> 144:ef7eb2e8f9f7 99 PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 4),
<> 144:ef7eb2e8f9f7 100 PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 5)
<> 144:ef7eb2e8f9f7 101 } PWMName;
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 typedef enum {
<> 144:ef7eb2e8f9f7 104 TIMER_0 = (int) NU_MODNAME(TIMER0_BASE, 0),
<> 144:ef7eb2e8f9f7 105 TIMER_1 = (int) NU_MODNAME(TIMER1_BASE, 0),
<> 144:ef7eb2e8f9f7 106 TIMER_2 = (int) NU_MODNAME(TIMER2_BASE, 0),
<> 144:ef7eb2e8f9f7 107 TIMER_3 = (int) NU_MODNAME(TIMER3_BASE, 0)
<> 144:ef7eb2e8f9f7 108 } TIMERName;
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 typedef enum {
<> 144:ef7eb2e8f9f7 111 RTC_0 = (int) NU_MODNAME(RTC_BASE, 0)
<> 144:ef7eb2e8f9f7 112 } RTCName;
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 typedef enum {
<> 144:ef7eb2e8f9f7 115 DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0)
<> 144:ef7eb2e8f9f7 116 } DMAName;
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 119 }
<> 144:ef7eb2e8f9f7 120 #endif
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 #endif