Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Maxim/TARGET_MAX32620/us_ticker.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 35 #include "us_ticker_api.h"
<> 144:ef7eb2e8f9f7 36 #include "PeripheralNames.h"
<> 144:ef7eb2e8f9f7 37 #include "tmr_regs.h"
<> 144:ef7eb2e8f9f7 38 #include "clkman_regs.h"
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #define US_TIMER MXC_TMR0
<> 144:ef7eb2e8f9f7 41 #define US_TIMER_IRQn TMR0_0_IRQn
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /**
<> 144:ef7eb2e8f9f7 44 * Defines timer modes for 16 and 32-bit timers
<> 144:ef7eb2e8f9f7 45 */
<> 144:ef7eb2e8f9f7 46 typedef enum {
<> 144:ef7eb2e8f9f7 47 /** 32-bit or 16-bit timer one-shot mode */
<> 144:ef7eb2e8f9f7 48 MXC_E_TMR_MODE_ONE_SHOT = 0,
<> 144:ef7eb2e8f9f7 49 /** 32-bit or 16-bit timer one-shot mode */
<> 144:ef7eb2e8f9f7 50 MXC_E_TMR_MODE_CONTINUOUS,
<> 144:ef7eb2e8f9f7 51 /** 32-bit timer counter mode */
<> 144:ef7eb2e8f9f7 52 MXC_E_TMR_MODE_COUNTER,
<> 144:ef7eb2e8f9f7 53 /** 32-bit timer pulse width modulation mode */
<> 144:ef7eb2e8f9f7 54 MXC_E_TMR_MODE_PWM,
<> 144:ef7eb2e8f9f7 55 /** 32-bit timer capture mode */
<> 144:ef7eb2e8f9f7 56 MXC_E_TMR_MODE_CAPTURE,
<> 144:ef7eb2e8f9f7 57 /** 32-bit timer compare mode */
<> 144:ef7eb2e8f9f7 58 MXC_E_TMR_MODE_COMPARE,
<> 144:ef7eb2e8f9f7 59 /** 32-bit timer gated mode */
<> 144:ef7eb2e8f9f7 60 MXC_E_TMR_MODE_GATED,
<> 144:ef7eb2e8f9f7 61 /** 32-bit timer measure mode */
<> 144:ef7eb2e8f9f7 62 MXC_E_TMR_MODE_MEASURE
<> 144:ef7eb2e8f9f7 63 } mxc_tmr_mode_t;
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 static int us_ticker_inited = 0;
<> 144:ef7eb2e8f9f7 66 static uint32_t ticks_per_us;
<> 144:ef7eb2e8f9f7 67 static uint32_t tick_win;
<> 144:ef7eb2e8f9f7 68 static volatile uint64_t current_cnt; // Hold the current ticks
<> 144:ef7eb2e8f9f7 69 static volatile uint64_t event_cnt; // Holds the value of the next event
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 #define ticks_to_us(ticks) ((ticks) / ticks_per_us);
<> 144:ef7eb2e8f9f7 72 #define MAX_TICK_VAL ((uint64_t)0xFFFFFFFF * ticks_per_us)
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 //******************************************************************************
<> 144:ef7eb2e8f9f7 75 static inline void inc_current_cnt(uint32_t inc) {
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 // Overflow the ticker when the us ticker overflows
<> 144:ef7eb2e8f9f7 78 current_cnt += inc;
<> 144:ef7eb2e8f9f7 79 if (current_cnt > MAX_TICK_VAL) {
<> 144:ef7eb2e8f9f7 80 current_cnt -= (MAX_TICK_VAL + 1);
<> 144:ef7eb2e8f9f7 81 }
<> 144:ef7eb2e8f9f7 82 }
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 //******************************************************************************
<> 144:ef7eb2e8f9f7 85 static inline int event_passed(uint64_t current, uint64_t event) {
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 // Determine if the event has already happened.
<> 144:ef7eb2e8f9f7 88 // If the event is behind the current ticker, within a window,
<> 144:ef7eb2e8f9f7 89 // then the event has already happened.
<> 144:ef7eb2e8f9f7 90 if (((current < tick_win) && ((event < current) ||
<> 144:ef7eb2e8f9f7 91 (event > (MAX_TICK_VAL - (tick_win - current))))) ||
<> 144:ef7eb2e8f9f7 92 ((event < current) && (event > (current - tick_win)))) {
<> 144:ef7eb2e8f9f7 93 return 1;
<> 144:ef7eb2e8f9f7 94 }
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 return 0;
<> 144:ef7eb2e8f9f7 97 }
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 //******************************************************************************
<> 144:ef7eb2e8f9f7 100 static inline uint64_t event_diff(uint64_t current, uint64_t event) {
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 // Check to see if the ticker will overflow before the event
<> 144:ef7eb2e8f9f7 103 if(current <= event) {
<> 144:ef7eb2e8f9f7 104 return (event - current);
<> 144:ef7eb2e8f9f7 105 }
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 return ((MAX_TICK_VAL - current) + event);
<> 144:ef7eb2e8f9f7 108 }
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 //******************************************************************************
<> 144:ef7eb2e8f9f7 111 static void tmr_handler(void)
<> 144:ef7eb2e8f9f7 112 {
<> 144:ef7eb2e8f9f7 113 uint32_t term_cnt32 = US_TIMER->term_cnt32;
<> 144:ef7eb2e8f9f7 114 US_TIMER->term_cnt32 = 0xFFFFFFFF; // reset to max value to prevent further interrupts
<> 144:ef7eb2e8f9f7 115 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
<> 144:ef7eb2e8f9f7 116 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 inc_current_cnt(term_cnt32);
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) {
<> 144:ef7eb2e8f9f7 121 // the timestamp has expired
<> 144:ef7eb2e8f9f7 122 event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
<> 144:ef7eb2e8f9f7 123 us_ticker_irq_handler();
<> 144:ef7eb2e8f9f7 124 } else {
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 uint64_t diff = event_diff(current_cnt, event_cnt);
<> 144:ef7eb2e8f9f7 127 if (diff < (uint64_t)0xFFFFFFFF) {
<> 144:ef7eb2e8f9f7 128 // the event occurs before the next overflow
<> 144:ef7eb2e8f9f7 129 US_TIMER->term_cnt32 = diff;
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 // Since the timer keeps counting after the terminal value is reached, it is possible that the new
<> 144:ef7eb2e8f9f7 132 // terminal value is in the past.
<> 144:ef7eb2e8f9f7 133 if (US_TIMER->term_cnt32 < US_TIMER->count32) {
<> 144:ef7eb2e8f9f7 134 // the timestamp has expired
<> 144:ef7eb2e8f9f7 135 US_TIMER->term_cnt32 = 0xFFFFFFFF; // reset to max value to prevent further interrupts
<> 144:ef7eb2e8f9f7 136 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
<> 144:ef7eb2e8f9f7 137 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
<> 144:ef7eb2e8f9f7 138 event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
<> 144:ef7eb2e8f9f7 139 us_ticker_irq_handler();
<> 144:ef7eb2e8f9f7 140 }
<> 144:ef7eb2e8f9f7 141 }
<> 144:ef7eb2e8f9f7 142 }
<> 144:ef7eb2e8f9f7 143 }
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 //******************************************************************************
<> 144:ef7eb2e8f9f7 146 void us_ticker_init(void)
<> 144:ef7eb2e8f9f7 147 {
<> 144:ef7eb2e8f9f7 148 if (us_ticker_inited)
<> 144:ef7eb2e8f9f7 149 return;
<> 144:ef7eb2e8f9f7 150 us_ticker_inited = 1;
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 /* Ensure that the TIMER0 clock is enabled */
<> 144:ef7eb2e8f9f7 153 if (!(MXC_CLKMAN->clk_gate_ctrl1 & MXC_F_CLKMAN_CLK_GATE_CTRL1_TIMER0_CLK_GATER)) {
<> 144:ef7eb2e8f9f7 154 MXC_CLKMAN->clk_gate_ctrl1 |= (2 << MXC_F_CLKMAN_CLK_GATE_CTRL1_TIMER0_CLK_GATER_POS);
<> 144:ef7eb2e8f9f7 155 }
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 current_cnt = 0;
<> 144:ef7eb2e8f9f7 158 event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 if (SystemCoreClock <= 1000000) {
<> 144:ef7eb2e8f9f7 161 error("us_ticker cannot operate at this SystemCoreClock");
<> 144:ef7eb2e8f9f7 162 return;
<> 144:ef7eb2e8f9f7 163 }
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 // Configure timer for 32-bit continuous mode with /1 prescaler
<> 144:ef7eb2e8f9f7 166 US_TIMER->ctrl = MXC_E_TMR_MODE_CONTINUOUS << MXC_F_TMR_CTRL_MODE_POS | (0 << MXC_F_TMR_CTRL_PRESCALE_POS);
<> 144:ef7eb2e8f9f7 167 ticks_per_us = SystemCoreClock / 1000000;
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 // Set the tick window to 10ms
<> 144:ef7eb2e8f9f7 170 tick_win = SystemCoreClock/100;
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 // Set timer overflow to the max
<> 144:ef7eb2e8f9f7 173 US_TIMER->term_cnt32 = 0xFFFFFFFF;
<> 144:ef7eb2e8f9f7 174 US_TIMER->pwm_cap32 = 0xFFFFFFFF;
<> 144:ef7eb2e8f9f7 175 US_TIMER->count32 = 0;
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear pending interrupts
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 NVIC_SetVector(US_TIMER_IRQn, (uint32_t)tmr_handler);
<> 144:ef7eb2e8f9f7 180 NVIC_EnableIRQ(US_TIMER_IRQn);
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 US_TIMER->inten |= MXC_F_TMR_INTEN_TIMER0; // enable interrupts
<> 144:ef7eb2e8f9f7 183 US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
<> 144:ef7eb2e8f9f7 184 }
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 //******************************************************************************
<> 144:ef7eb2e8f9f7 187 void us_ticker_deinit(void)
<> 144:ef7eb2e8f9f7 188 {
<> 144:ef7eb2e8f9f7 189 US_TIMER->ctrl = 0; // disable timer
<> 144:ef7eb2e8f9f7 190 US_TIMER->inten = 0; // disable interrupts
<> 144:ef7eb2e8f9f7 191 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupts
<> 144:ef7eb2e8f9f7 192 us_ticker_inited = 0;
<> 144:ef7eb2e8f9f7 193 }
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 //******************************************************************************
<> 144:ef7eb2e8f9f7 196 uint32_t us_ticker_read(void)
<> 144:ef7eb2e8f9f7 197 {
<> 144:ef7eb2e8f9f7 198 uint64_t current_cnt1, current_cnt2;
<> 144:ef7eb2e8f9f7 199 uint32_t term_cnt, tmr_cnt;
<> 144:ef7eb2e8f9f7 200 uint32_t intfl1, intfl2;
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 if (!us_ticker_inited)
<> 144:ef7eb2e8f9f7 203 us_ticker_init();
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 // Ensure coherency between current_cnt and US_TIMER->count32
<> 144:ef7eb2e8f9f7 206 do {
<> 144:ef7eb2e8f9f7 207 current_cnt1 = current_cnt;
<> 144:ef7eb2e8f9f7 208 intfl1 = US_TIMER->intfl;
<> 144:ef7eb2e8f9f7 209 term_cnt = US_TIMER->term_cnt32;
<> 144:ef7eb2e8f9f7 210 tmr_cnt = US_TIMER->count32;
<> 144:ef7eb2e8f9f7 211 intfl2 = US_TIMER->intfl;
<> 144:ef7eb2e8f9f7 212 current_cnt2 = current_cnt;
<> 144:ef7eb2e8f9f7 213 } while ((current_cnt1 != current_cnt2) || (intfl1 != intfl2));
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 // Account for an unserviced interrupt
<> 144:ef7eb2e8f9f7 216 if (intfl1) {
<> 144:ef7eb2e8f9f7 217 current_cnt1 += term_cnt;
<> 144:ef7eb2e8f9f7 218 }
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 current_cnt1 += tmr_cnt;
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 return (current_cnt1 / ticks_per_us);
<> 144:ef7eb2e8f9f7 223 }
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 //******************************************************************************
<> 144:ef7eb2e8f9f7 226 void us_ticker_set_interrupt(timestamp_t timestamp)
<> 144:ef7eb2e8f9f7 227 {
<> 144:ef7eb2e8f9f7 228 // Note: interrupts are disabled before this function is called.
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 if (US_TIMER->intfl) {
<> 144:ef7eb2e8f9f7 233 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
<> 144:ef7eb2e8f9f7 234 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
<> 144:ef7eb2e8f9f7 235 inc_current_cnt(US_TIMER->term_cnt32);
<> 144:ef7eb2e8f9f7 236 }
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 // add and reset the current count value
<> 144:ef7eb2e8f9f7 239 inc_current_cnt(US_TIMER->count32);
<> 144:ef7eb2e8f9f7 240 US_TIMER->count32 = 0;
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 // add the number of cycles that the timer is disabled here for
<> 144:ef7eb2e8f9f7 243 inc_current_cnt(200);
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 event_cnt = (uint64_t)timestamp * ticks_per_us;
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 // Check to see if the event has already passed
<> 144:ef7eb2e8f9f7 248 if (!event_passed(current_cnt, event_cnt)) {
<> 144:ef7eb2e8f9f7 249 uint64_t diff = event_diff(current_cnt, event_cnt);
<> 144:ef7eb2e8f9f7 250 if (diff < (uint64_t)0xFFFFFFFF) {
<> 144:ef7eb2e8f9f7 251 // the event occurs before the next overflow
<> 144:ef7eb2e8f9f7 252 US_TIMER->term_cnt32 = diff;
<> 144:ef7eb2e8f9f7 253 } else {
<> 144:ef7eb2e8f9f7 254 // the event occurs after the next overflow
<> 144:ef7eb2e8f9f7 255 US_TIMER->term_cnt32 = 0xFFFFFFFF; // set to max
<> 144:ef7eb2e8f9f7 256 }
<> 144:ef7eb2e8f9f7 257 } else {
<> 144:ef7eb2e8f9f7 258 // the requested timestamp occurs in the past
<> 144:ef7eb2e8f9f7 259 // set the timer up to immediately expire
<> 144:ef7eb2e8f9f7 260 US_TIMER->term_cnt32 = 1;
<> 144:ef7eb2e8f9f7 261 }
<> 144:ef7eb2e8f9f7 262 US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
<> 144:ef7eb2e8f9f7 263 }
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 //******************************************************************************
<> 144:ef7eb2e8f9f7 266 void us_ticker_disable_interrupt(void)
<> 144:ef7eb2e8f9f7 267 {
<> 144:ef7eb2e8f9f7 268 // There are no more events, set timer overflow to the max
<> 144:ef7eb2e8f9f7 269 US_TIMER->term_cnt32 = 0xFFFFFFFF;
<> 144:ef7eb2e8f9f7 270 }
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 //******************************************************************************
<> 144:ef7eb2e8f9f7 273 void us_ticker_clear_interrupt(void)
<> 144:ef7eb2e8f9f7 274 {
<> 144:ef7eb2e8f9f7 275 // cleared in the local handler
<> 144:ef7eb2e8f9f7 276 }
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 //******************************************************************************
<> 144:ef7eb2e8f9f7 279 void us_ticker_set(timestamp_t timestamp)
<> 144:ef7eb2e8f9f7 280 {
<> 144:ef7eb2e8f9f7 281 US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer
<> 144:ef7eb2e8f9f7 282 current_cnt = (uint64_t)timestamp * ticks_per_us;
<> 144:ef7eb2e8f9f7 283 US_TIMER->count32 = 0;
<> 144:ef7eb2e8f9f7 284 US_TIMER->term_cnt32 = 0xFFFFFFFF;
<> 144:ef7eb2e8f9f7 285 US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 if (((uint64_t)timestamp * ticks_per_us) >= event_cnt) {
<> 144:ef7eb2e8f9f7 288 // The next timestamp has elapsed. Trigger the interrupt to handle it.
<> 144:ef7eb2e8f9f7 289 NVIC_SetPendingIRQ(US_TIMER_IRQn);
<> 144:ef7eb2e8f9f7 290 }
<> 144:ef7eb2e8f9f7 291 }