Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Maxim/TARGET_MAX32620/objects.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #ifndef MBED_OBJECTS_H
<> 144:ef7eb2e8f9f7 35 #define MBED_OBJECTS_H
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 38 #include "PortNames.h"
<> 144:ef7eb2e8f9f7 39 #include "PeripheralNames.h"
<> 144:ef7eb2e8f9f7 40 #include "PinNames.h"
<> 144:ef7eb2e8f9f7 41 #include "gpio_object.h"
<> 144:ef7eb2e8f9f7 42 #include "gpio_regs.h"
<> 144:ef7eb2e8f9f7 43 #include "uart_regs.h"
<> 144:ef7eb2e8f9f7 44 #include "i2cm_regs.h"
<> 144:ef7eb2e8f9f7 45 #include "spi_regs.h"
<> 144:ef7eb2e8f9f7 46 #include "pt_regs.h"
<> 144:ef7eb2e8f9f7 47 #include "adc_regs.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 50 extern "C" {
<> 144:ef7eb2e8f9f7 51 #endif
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 struct port_s {
<> 144:ef7eb2e8f9f7 54 PortName port;
<> 144:ef7eb2e8f9f7 55 uint32_t mask;
<> 144:ef7eb2e8f9f7 56 __IO uint32_t *reg_out;
<> 144:ef7eb2e8f9f7 57 __I uint32_t *reg_in;
<> 144:ef7eb2e8f9f7 58 };
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 struct gpio_irq_s {
<> 144:ef7eb2e8f9f7 61 uint8_t port;
<> 144:ef7eb2e8f9f7 62 uint8_t pin;
<> 144:ef7eb2e8f9f7 63 uint8_t rise_en;
<> 144:ef7eb2e8f9f7 64 uint8_t fall_en;
<> 144:ef7eb2e8f9f7 65 uint32_t id;
<> 144:ef7eb2e8f9f7 66 };
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 struct serial_s {
<> 144:ef7eb2e8f9f7 69 int index;
<> 144:ef7eb2e8f9f7 70 mxc_uart_regs_t *uart;
<> 144:ef7eb2e8f9f7 71 mxc_uart_fifo_regs_t *fifo;
<> 144:ef7eb2e8f9f7 72 };
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 struct i2c_s {
<> 144:ef7eb2e8f9f7 75 int index;
<> 144:ef7eb2e8f9f7 76 mxc_i2cm_regs_t *i2c;
<> 144:ef7eb2e8f9f7 77 mxc_i2cm_fifo_regs_t *fifos;
<> 144:ef7eb2e8f9f7 78 int start_pending;
<> 144:ef7eb2e8f9f7 79 int stop_pending;
<> 144:ef7eb2e8f9f7 80 };
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 struct spi_s {
<> 144:ef7eb2e8f9f7 83 int index;
<> 144:ef7eb2e8f9f7 84 mxc_spi_regs_t *spi;
<> 144:ef7eb2e8f9f7 85 mxc_spi_fifo_regs_t *fifo;
<> 144:ef7eb2e8f9f7 86 int bits;
<> 144:ef7eb2e8f9f7 87 int ssel;
<> 144:ef7eb2e8f9f7 88 uint32_t width; // SPI data width (number of data lines to use)
<> 144:ef7eb2e8f9f7 89 PinName sclk; // PinName saved to use in Quad SPI pin mapping table
<> 144:ef7eb2e8f9f7 90 #if DEVICE_SPI_ASYNCH
<> 144:ef7eb2e8f9f7 91 // Async transaction state
<> 144:ef7eb2e8f9f7 92 const uint8_t *tx_data; // TX buffer
<> 144:ef7eb2e8f9f7 93 uint8_t *rx_data; // RX buffer
<> 144:ef7eb2e8f9f7 94 unsigned len; // Number of bytes to send
<> 144:ef7eb2e8f9f7 95 unsigned read_num; // Number of bytes read
<> 144:ef7eb2e8f9f7 96 unsigned write_num; // Number of bytes written
<> 144:ef7eb2e8f9f7 97 void (*callback)(); // Callback for asynchronous request
<> 144:ef7eb2e8f9f7 98 unsigned head_rem; // Remaining count for current header
<> 144:ef7eb2e8f9f7 99 uint32_t event; // Callback response events
<> 144:ef7eb2e8f9f7 100 #endif
<> 144:ef7eb2e8f9f7 101 };
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 struct pwmout_s {
<> 144:ef7eb2e8f9f7 104 mxc_pt_regs_t *pwm;
<> 144:ef7eb2e8f9f7 105 int period;
<> 144:ef7eb2e8f9f7 106 int pulse_width;
<> 144:ef7eb2e8f9f7 107 };
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 struct analogin_s {
<> 144:ef7eb2e8f9f7 110 mxc_adc_regs_t *adc;
<> 144:ef7eb2e8f9f7 111 PinName adc_pin;
<> 144:ef7eb2e8f9f7 112 };
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 typedef struct {
<> 144:ef7eb2e8f9f7 115 volatile uint32_t *reg_req;
<> 144:ef7eb2e8f9f7 116 volatile uint32_t *reg_ack;
<> 144:ef7eb2e8f9f7 117 uint32_t req_val;
<> 144:ef7eb2e8f9f7 118 uint32_t ack_mask;
<> 144:ef7eb2e8f9f7 119 } pin_function_t;
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 122 }
<> 144:ef7eb2e8f9f7 123 #endif
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 #endif