added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include <string.h>
<> 144:ef7eb2e8f9f7 35 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 36 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 37 #include "spi_api.h"
<> 144:ef7eb2e8f9f7 38 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 39 #include "ioman_regs.h"
<> 144:ef7eb2e8f9f7 40 #include "clkman_regs.h"
<> 144:ef7eb2e8f9f7 41 #include "PeripheralPins.h"
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 #define DEFAULT_CHAR 8
<> 144:ef7eb2e8f9f7 44 #define DEFAULT_MODE 0
<> 144:ef7eb2e8f9f7 45 #define DEFAULT_FREQ 1000000
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 // Formatting settings
<> 144:ef7eb2e8f9f7 48 static int spi_bits;
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 //******************************************************************************
<> 144:ef7eb2e8f9f7 51 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
<> 144:ef7eb2e8f9f7 52 {
<> 144:ef7eb2e8f9f7 53 // Make sure pins are pointing to the same SPI instance
<> 144:ef7eb2e8f9f7 54 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 55 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 56 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 57 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
<> 144:ef7eb2e8f9f7 60 SPIName spi_cntl;
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 // Give the application the option to manually control Slave Select
<> 144:ef7eb2e8f9f7 63 if((SPIName)spi_ssel != (SPIName)NC) {
<> 144:ef7eb2e8f9f7 64 spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
<> 144:ef7eb2e8f9f7 65 } else {
<> 144:ef7eb2e8f9f7 66 spi_cntl = spi_sclk;
<> 144:ef7eb2e8f9f7 67 }
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 SPIName spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 MBED_ASSERT((SPIName)spi != (SPIName)NC);
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 // Set the obj pointer to the proper SPI Instance
<> 144:ef7eb2e8f9f7 74 obj->spi = (mxc_spi_regs_t*)spi;
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 // Set the SPI index and FIFOs
<> 144:ef7eb2e8f9f7 77 obj->index = MXC_SPI_BASE_TO_INSTANCE(obj->spi);
<> 144:ef7eb2e8f9f7 78 obj->rxfifo = MXC_SPI_GET_RXFIFO(obj->index);
<> 144:ef7eb2e8f9f7 79 obj->txfifo = MXC_SPI_GET_TXFIFO(obj->index);
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 // Configure the pins
<> 144:ef7eb2e8f9f7 82 pinmap_pinout(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 83 pinmap_pinout(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 84 pinmap_pinout(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 85 pinmap_pinout(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 // Enable SPI and FIFOs
<> 144:ef7eb2e8f9f7 88 obj->spi->gen_ctrl = (MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN |
<> 144:ef7eb2e8f9f7 89 MXC_F_SPI_GEN_CTRL_TX_FIFO_EN |
<> 144:ef7eb2e8f9f7 90 MXC_F_SPI_GEN_CTRL_RX_FIFO_EN );
<> 144:ef7eb2e8f9f7 91 }
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 //******************************************************************************
<> 144:ef7eb2e8f9f7 94 void spi_format(spi_t *obj, int bits, int mode, int slave)
<> 144:ef7eb2e8f9f7 95 {
<> 144:ef7eb2e8f9f7 96 // Check the validity of the inputs
<> 144:ef7eb2e8f9f7 97 MBED_ASSERT(((bits >= 1) && (bits <= 32)) && ((mode >= 0) && (mode <= 3)));
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 // Only supports master mode
<> 144:ef7eb2e8f9f7 100 MBED_ASSERT(!slave);
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 // Save formatting data
<> 144:ef7eb2e8f9f7 103 spi_bits = bits;
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 // Set the mode
<> 144:ef7eb2e8f9f7 106 obj->spi->mstr_cfg &= ~(MXC_F_SPI_MSTR_CFG_SPI_MODE);
<> 144:ef7eb2e8f9f7 107 obj->spi->mstr_cfg |= (mode << MXC_F_SPI_MSTR_CFG_SPI_MODE_POS);
<> 144:ef7eb2e8f9f7 108 }
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 //******************************************************************************
<> 144:ef7eb2e8f9f7 111 void spi_frequency(spi_t *obj, int hz)
<> 144:ef7eb2e8f9f7 112 {
<> 144:ef7eb2e8f9f7 113 // Maximum frequency is half the system frequency
<> 144:ef7eb2e8f9f7 114 MBED_ASSERT((unsigned int)hz <= (SystemCoreClock / 2));
<> 144:ef7eb2e8f9f7 115 unsigned clocks = ((SystemCoreClock/2)/(hz));
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 // Figure out the divider ratio
<> 144:ef7eb2e8f9f7 118 int clk_div = 1;
<> 144:ef7eb2e8f9f7 119 while(clk_div < 10) {
<> 144:ef7eb2e8f9f7 120 if(clocks < 0x10) {
<> 144:ef7eb2e8f9f7 121 break;
<> 144:ef7eb2e8f9f7 122 }
<> 144:ef7eb2e8f9f7 123 clk_div++;
<> 144:ef7eb2e8f9f7 124 clocks = clocks >> 1;
<> 144:ef7eb2e8f9f7 125 }
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 // Turn on the SPI clock
<> 144:ef7eb2e8f9f7 128 if(obj->index == 0) {
<> 144:ef7eb2e8f9f7 129 MXC_CLKMAN->clk_ctrl_3_spi0 = clk_div;
<> 144:ef7eb2e8f9f7 130 } else if(obj->index == 1) {
<> 144:ef7eb2e8f9f7 131 MXC_CLKMAN->clk_ctrl_4_spi1 = clk_div;
<> 144:ef7eb2e8f9f7 132 } else if(obj->index == 2) {
<> 144:ef7eb2e8f9f7 133 MXC_CLKMAN->clk_ctrl_5_spi2 = clk_div;
<> 144:ef7eb2e8f9f7 134 } else {
<> 144:ef7eb2e8f9f7 135 MBED_ASSERT(0);
<> 144:ef7eb2e8f9f7 136 }
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 // Set the number of clocks to hold sclk high and low
<> 144:ef7eb2e8f9f7 139 MXC_SET_FIELD(&obj->spi->mstr_cfg, (MXC_F_SPI_MSTR_CFG_SCK_HI_CLK | MXC_F_SPI_MSTR_CFG_SCK_LO_CLK),
<> 144:ef7eb2e8f9f7 140 ((clocks << MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS) | (clocks << MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS)));
<> 144:ef7eb2e8f9f7 141 }
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 //******************************************************************************
<> 144:ef7eb2e8f9f7 144 int spi_master_write(spi_t *obj, int value)
<> 144:ef7eb2e8f9f7 145 {
<> 144:ef7eb2e8f9f7 146 int bits = spi_bits;
<> 144:ef7eb2e8f9f7 147 if(spi_bits == 32) {
<> 144:ef7eb2e8f9f7 148 bits = 0;
<> 144:ef7eb2e8f9f7 149 }
<> 144:ef7eb2e8f9f7 150 // Create the header
<> 144:ef7eb2e8f9f7 151 uint16_t header = ((0x3 << MXC_F_SPI_FIFO_DIR_POS ) | // TX and RX
<> 144:ef7eb2e8f9f7 152 (0x0 << MXC_F_SPI_FIFO_UNIT_POS) | // Send bits
<> 144:ef7eb2e8f9f7 153 (bits << MXC_F_SPI_FIFO_SIZE_POS) | // Number of units
<> 144:ef7eb2e8f9f7 154 (0x1 << MXC_F_SPI_FIFO_DASS_POS)); // Deassert SS
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 // Send the message header
<> 144:ef7eb2e8f9f7 157 obj->txfifo->txfifo_16 = header;
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 // Send the data
<> 144:ef7eb2e8f9f7 160 if(spi_bits < 17) {
<> 144:ef7eb2e8f9f7 161 obj->txfifo->txfifo_16 = (uint16_t)value;
<> 144:ef7eb2e8f9f7 162 } else {
<> 144:ef7eb2e8f9f7 163 obj->txfifo->txfifo_32 = (uint32_t)value;
<> 144:ef7eb2e8f9f7 164 }
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 // Get the data
<> 144:ef7eb2e8f9f7 167 bits = spi_bits;
<> 144:ef7eb2e8f9f7 168 int result = 0;
<> 144:ef7eb2e8f9f7 169 int i = 0;
<> 144:ef7eb2e8f9f7 170 while(bits > 0) {
<> 144:ef7eb2e8f9f7 171 // Wait for data
<> 144:ef7eb2e8f9f7 172 while(((obj->spi->fifo_ctrl & MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED)
<> 144:ef7eb2e8f9f7 173 >> MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS) < 1) {}
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 result |= (obj->rxfifo->rxfifo_8 << (i++*8));
<> 144:ef7eb2e8f9f7 176 bits-=8;
<> 144:ef7eb2e8f9f7 177 }
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 return result;
<> 144:ef7eb2e8f9f7 180 }
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 //******************************************************************************
<> 144:ef7eb2e8f9f7 183 int spi_busy(spi_t *obj)
<> 144:ef7eb2e8f9f7 184 {
<> 144:ef7eb2e8f9f7 185 return !(obj->spi->intfl & MXC_F_SPI_INTFL_TX_READY);
<> 144:ef7eb2e8f9f7 186 }