added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 35 #include "gpio_regs.h"
<> 144:ef7eb2e8f9f7 36 #include "clkman_regs.h"
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Application developer should override where necessary with different external HFX source */
<> 144:ef7eb2e8f9f7 39 #ifndef __SYSTEM_HFX
<> 144:ef7eb2e8f9f7 40 #define __SYSTEM_HFX 24000000
<> 144:ef7eb2e8f9f7 41 #endif
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 //******************************************************************************
<> 144:ef7eb2e8f9f7 44 // This function will get called early in system initialization
<> 144:ef7eb2e8f9f7 45 void low_level_init(void)
<> 144:ef7eb2e8f9f7 46 {
<> 144:ef7eb2e8f9f7 47 /* wait for the RO to stabilize */
<> 144:ef7eb2e8f9f7 48 while (!(MXC_CLKMAN->intfl & MXC_F_CLKMAN_INTFL_RING_STABLE));
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /* Configure and enable the oscillator */
<> 144:ef7eb2e8f9f7 51 if (!(MXC_CLKMAN->clk_config & MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE)) {
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 MXC_CLKMAN->clk_config = (0x4 << MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS);
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /* Enable the external crystal */
<> 144:ef7eb2e8f9f7 56 MXC_CLKMAN->clk_config |= MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE;
<> 144:ef7eb2e8f9f7 57 }
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /* Wait for external crystal to stabilize */
<> 144:ef7eb2e8f9f7 60 for (volatile int waitcnt = 0; waitcnt < 0x4000; waitcnt++); // 0x4000 ~10ms 0x10000 ~35ms, 0x20000 ~75ms
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /* Configure the PLL */
<> 144:ef7eb2e8f9f7 63 uint32_t clk_config = MXC_CLKMAN->clk_config;
<> 144:ef7eb2e8f9f7 64 clk_config = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT) | (MXC_E_CLKMAN_PLL_INPUT_SELECT_HFX << MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS);
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 #if (__SYSTEM_HFX == 8000000)
<> 144:ef7eb2e8f9f7 67 clk_config = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT) | (MXC_E_CLKMAN_PLL_DIVISOR_SELECT_8MHZ << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS);
<> 144:ef7eb2e8f9f7 68 #elif (__SYSTEM_HFX == 12000000)
<> 144:ef7eb2e8f9f7 69 clk_config = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT) | (MXC_E_CLKMAN_PLL_DIVISOR_SELECT_12MHZ << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS);
<> 144:ef7eb2e8f9f7 70 #elif (__SYSTEM_HFX == 24000000)
<> 144:ef7eb2e8f9f7 71 clk_config = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT) | (MXC_E_CLKMAN_PLL_DIVISOR_SELECT_24MHZ << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS);
<> 144:ef7eb2e8f9f7 72 #else
<> 144:ef7eb2e8f9f7 73 #error Invalid __SYSTEM_HFX setting
<> 144:ef7eb2e8f9f7 74 #endif
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 clk_config |= MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE;
<> 144:ef7eb2e8f9f7 77 clk_config &= ~MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS;
<> 144:ef7eb2e8f9f7 78 clk_config = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT) | (MXC_E_CLKMAN_STABILITY_COUNT_2_13_CLKS << MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS);
<> 144:ef7eb2e8f9f7 79 MXC_CLKMAN->clk_config = clk_config;
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /* Enable the PLL and wait for stable */
<> 144:ef7eb2e8f9f7 82 MXC_CLKMAN->clk_config |= (MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE | MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N);
<> 144:ef7eb2e8f9f7 83 while (!(MXC_CLKMAN->intfl & MXC_F_CLKMAN_INTFL_PLL_STABLE));
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 /* Switch to the PLL */
<> 144:ef7eb2e8f9f7 86 MXC_CLKMAN->clk_ctrl = (MXC_CLKMAN->clk_ctrl & ~MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT) |
<> 144:ef7eb2e8f9f7 87 ((MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2 << MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS));
<> 144:ef7eb2e8f9f7 88 }