added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/serial_api.c@147:ba84b7dc41a7, 2016-09-10 (annotated)
- Committer:
- JojoS
- Date:
- Sat Sep 10 15:32:04 2016 +0000
- Revision:
- 147:ba84b7dc41a7
- Parent:
- 144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #include "serial_api.h" |
<> | 144:ef7eb2e8f9f7 | 17 | |
<> | 144:ef7eb2e8f9f7 | 18 | #if DEVICE_SERIAL |
<> | 144:ef7eb2e8f9f7 | 19 | |
<> | 144:ef7eb2e8f9f7 | 20 | // math.h required for floating point operations for baud rate calculation |
<> | 144:ef7eb2e8f9f7 | 21 | #include <math.h> |
<> | 144:ef7eb2e8f9f7 | 22 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 23 | |
<> | 144:ef7eb2e8f9f7 | 24 | #include <string.h> |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 144:ef7eb2e8f9f7 | 26 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 27 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 28 | #include "fsl_lpuart.h" |
<> | 144:ef7eb2e8f9f7 | 29 | #include "peripheral_clock_defines.h" |
<> | 144:ef7eb2e8f9f7 | 30 | #include "PeripheralPins.h" |
<> | 144:ef7eb2e8f9f7 | 31 | #include "fsl_clock_config.h" |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | static uint32_t serial_irq_ids[FSL_FEATURE_SOC_LPUART_COUNT] = {0}; |
<> | 144:ef7eb2e8f9f7 | 34 | static uart_irq_handler irq_handler; |
<> | 144:ef7eb2e8f9f7 | 35 | /* Array of UART peripheral base address. */ |
<> | 144:ef7eb2e8f9f7 | 36 | static LPUART_Type *const uart_addrs[] = LPUART_BASE_PTRS; |
<> | 144:ef7eb2e8f9f7 | 37 | /* Array of LPUART bus clock frequencies */ |
<> | 144:ef7eb2e8f9f7 | 38 | static clock_name_t const uart_clocks[] = LPUART_CLOCK_FREQS; |
<> | 144:ef7eb2e8f9f7 | 39 | |
<> | 144:ef7eb2e8f9f7 | 40 | int stdio_uart_inited = 0; |
<> | 144:ef7eb2e8f9f7 | 41 | serial_t stdio_uart; |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | void serial_init(serial_t *obj, PinName tx, PinName rx) { |
<> | 144:ef7eb2e8f9f7 | 44 | uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX); |
<> | 144:ef7eb2e8f9f7 | 45 | uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX); |
<> | 144:ef7eb2e8f9f7 | 46 | obj->index = pinmap_merge(uart_tx, uart_rx); |
<> | 144:ef7eb2e8f9f7 | 47 | MBED_ASSERT((int)obj->index != NC); |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | // Need to initialize the clocks here as ticker init gets called before mbed_sdk_init |
<> | 144:ef7eb2e8f9f7 | 50 | if (SystemCoreClock == DEFAULT_SYSTEM_CLOCK) |
<> | 144:ef7eb2e8f9f7 | 51 | BOARD_BootClockRUN(); |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | /* Set the LPUART clock source */ |
<> | 144:ef7eb2e8f9f7 | 54 | if (obj->index == LPUART_0) { |
<> | 144:ef7eb2e8f9f7 | 55 | CLOCK_SetLpuart0Clock(1U); |
<> | 144:ef7eb2e8f9f7 | 56 | } else { |
<> | 144:ef7eb2e8f9f7 | 57 | CLOCK_SetLpuart1Clock(1U); |
<> | 144:ef7eb2e8f9f7 | 58 | } |
<> | 144:ef7eb2e8f9f7 | 59 | |
<> | 144:ef7eb2e8f9f7 | 60 | lpuart_config_t config; |
<> | 144:ef7eb2e8f9f7 | 61 | LPUART_GetDefaultConfig(&config); |
<> | 144:ef7eb2e8f9f7 | 62 | config.baudRate_Bps = 9600; |
<> | 144:ef7eb2e8f9f7 | 63 | config.enableTx = false; |
<> | 144:ef7eb2e8f9f7 | 64 | config.enableRx = false; |
<> | 144:ef7eb2e8f9f7 | 65 | |
<> | 144:ef7eb2e8f9f7 | 66 | LPUART_Init(uart_addrs[obj->index], &config, CLOCK_GetFreq(uart_clocks[obj->index])); |
<> | 144:ef7eb2e8f9f7 | 67 | |
<> | 144:ef7eb2e8f9f7 | 68 | pinmap_pinout(tx, PinMap_UART_TX); |
<> | 144:ef7eb2e8f9f7 | 69 | pinmap_pinout(rx, PinMap_UART_RX); |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | if (tx != NC) { |
<> | 144:ef7eb2e8f9f7 | 72 | LPUART_EnableTx(uart_addrs[obj->index], true); |
<> | 144:ef7eb2e8f9f7 | 73 | pin_mode(tx, PullUp); |
<> | 144:ef7eb2e8f9f7 | 74 | } |
<> | 144:ef7eb2e8f9f7 | 75 | if (rx != NC) { |
<> | 144:ef7eb2e8f9f7 | 76 | LPUART_EnableRx(uart_addrs[obj->index], true); |
<> | 144:ef7eb2e8f9f7 | 77 | pin_mode(rx, PullUp); |
<> | 144:ef7eb2e8f9f7 | 78 | } |
<> | 144:ef7eb2e8f9f7 | 79 | |
<> | 144:ef7eb2e8f9f7 | 80 | if (obj->index == STDIO_UART) { |
<> | 144:ef7eb2e8f9f7 | 81 | stdio_uart_inited = 1; |
<> | 144:ef7eb2e8f9f7 | 82 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
<> | 144:ef7eb2e8f9f7 | 83 | } |
<> | 144:ef7eb2e8f9f7 | 84 | } |
<> | 144:ef7eb2e8f9f7 | 85 | |
<> | 144:ef7eb2e8f9f7 | 86 | void serial_free(serial_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 87 | LPUART_Deinit(uart_addrs[obj->index]); |
<> | 144:ef7eb2e8f9f7 | 88 | serial_irq_ids[obj->index] = 0; |
<> | 144:ef7eb2e8f9f7 | 89 | } |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 144:ef7eb2e8f9f7 | 91 | void serial_baud(serial_t *obj, int baudrate) { |
<> | 144:ef7eb2e8f9f7 | 92 | LPUART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index])); |
<> | 144:ef7eb2e8f9f7 | 93 | } |
<> | 144:ef7eb2e8f9f7 | 94 | |
<> | 144:ef7eb2e8f9f7 | 95 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
<> | 144:ef7eb2e8f9f7 | 96 | LPUART_Type *base = uart_addrs[obj->index]; |
<> | 144:ef7eb2e8f9f7 | 97 | uint8_t temp; |
<> | 144:ef7eb2e8f9f7 | 98 | /* Set bit count and parity mode. */ |
<> | 144:ef7eb2e8f9f7 | 99 | temp = base->CTRL & ~(LPUART_CTRL_PE_MASK | LPUART_CTRL_PT_MASK | LPUART_CTRL_M_MASK); |
<> | 144:ef7eb2e8f9f7 | 100 | if (parity != ParityNone) |
<> | 144:ef7eb2e8f9f7 | 101 | { |
<> | 144:ef7eb2e8f9f7 | 102 | /* Enable Parity */ |
<> | 144:ef7eb2e8f9f7 | 103 | temp |= (LPUART_CTRL_PE_MASK | LPUART_CTRL_M_MASK); |
<> | 144:ef7eb2e8f9f7 | 104 | if (parity == ParityOdd) { |
<> | 144:ef7eb2e8f9f7 | 105 | temp |= LPUART_CTRL_PT_MASK; |
<> | 144:ef7eb2e8f9f7 | 106 | } else { |
<> | 144:ef7eb2e8f9f7 | 107 | // Hardware does not support forced parity |
<> | 144:ef7eb2e8f9f7 | 108 | MBED_ASSERT(0); |
<> | 144:ef7eb2e8f9f7 | 109 | } |
<> | 144:ef7eb2e8f9f7 | 110 | } |
<> | 144:ef7eb2e8f9f7 | 111 | base->CTRL = temp; |
<> | 144:ef7eb2e8f9f7 | 112 | |
<> | 144:ef7eb2e8f9f7 | 113 | #if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT |
<> | 144:ef7eb2e8f9f7 | 114 | /* set stop bit per char */ |
<> | 144:ef7eb2e8f9f7 | 115 | temp = base->BAUD & ~LPUART_BAUD_SBNS_MASK; |
<> | 144:ef7eb2e8f9f7 | 116 | base->BAUD = temp | LPUART_BAUD_SBNS((uint8_t)--stop_bits); |
<> | 144:ef7eb2e8f9f7 | 117 | #endif |
<> | 144:ef7eb2e8f9f7 | 118 | } |
<> | 144:ef7eb2e8f9f7 | 119 | |
<> | 144:ef7eb2e8f9f7 | 120 | /****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 121 | * INTERRUPTS HANDLING |
<> | 144:ef7eb2e8f9f7 | 122 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 123 | static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) { |
<> | 144:ef7eb2e8f9f7 | 124 | LPUART_Type *base = uart_addrs[index]; |
<> | 144:ef7eb2e8f9f7 | 125 | |
<> | 144:ef7eb2e8f9f7 | 126 | /* If RX overrun. */ |
<> | 144:ef7eb2e8f9f7 | 127 | if (LPUART_STAT_OR_MASK & base->STAT) |
<> | 144:ef7eb2e8f9f7 | 128 | { |
<> | 144:ef7eb2e8f9f7 | 129 | /* Read base->D, otherwise the RX does not work. */ |
<> | 144:ef7eb2e8f9f7 | 130 | (void)base->DATA; |
<> | 144:ef7eb2e8f9f7 | 131 | LPUART_ClearStatusFlags(base, kLPUART_RxOverrunFlag); |
<> | 144:ef7eb2e8f9f7 | 132 | } |
<> | 144:ef7eb2e8f9f7 | 133 | |
<> | 144:ef7eb2e8f9f7 | 134 | if (serial_irq_ids[index] != 0) { |
<> | 144:ef7eb2e8f9f7 | 135 | if (transmit_empty) |
<> | 144:ef7eb2e8f9f7 | 136 | irq_handler(serial_irq_ids[index], TxIrq); |
<> | 144:ef7eb2e8f9f7 | 137 | |
<> | 144:ef7eb2e8f9f7 | 138 | if (receive_full) |
<> | 144:ef7eb2e8f9f7 | 139 | irq_handler(serial_irq_ids[index], RxIrq); |
<> | 144:ef7eb2e8f9f7 | 140 | } |
<> | 144:ef7eb2e8f9f7 | 141 | } |
<> | 144:ef7eb2e8f9f7 | 142 | |
<> | 144:ef7eb2e8f9f7 | 143 | void uart0_irq() { |
<> | 144:ef7eb2e8f9f7 | 144 | uint32_t status_flags = LPUART0->STAT; |
<> | 144:ef7eb2e8f9f7 | 145 | uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 0); |
<> | 144:ef7eb2e8f9f7 | 146 | } |
<> | 144:ef7eb2e8f9f7 | 147 | |
<> | 144:ef7eb2e8f9f7 | 148 | void uart1_irq() { |
<> | 144:ef7eb2e8f9f7 | 149 | uint32_t status_flags = LPUART1->STAT; |
<> | 144:ef7eb2e8f9f7 | 150 | uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 1); |
<> | 144:ef7eb2e8f9f7 | 151 | } |
<> | 144:ef7eb2e8f9f7 | 152 | |
<> | 144:ef7eb2e8f9f7 | 153 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
<> | 144:ef7eb2e8f9f7 | 154 | irq_handler = handler; |
<> | 144:ef7eb2e8f9f7 | 155 | serial_irq_ids[obj->index] = id; |
<> | 144:ef7eb2e8f9f7 | 156 | } |
<> | 144:ef7eb2e8f9f7 | 157 | |
<> | 144:ef7eb2e8f9f7 | 158 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
<> | 144:ef7eb2e8f9f7 | 159 | IRQn_Type uart_irqs[] = LPUART_RX_TX_IRQS; |
<> | 144:ef7eb2e8f9f7 | 160 | uint32_t vector = 0; |
<> | 144:ef7eb2e8f9f7 | 161 | |
<> | 144:ef7eb2e8f9f7 | 162 | switch (obj->index) { |
<> | 144:ef7eb2e8f9f7 | 163 | case 0: |
<> | 144:ef7eb2e8f9f7 | 164 | vector = (uint32_t)&uart0_irq; |
<> | 144:ef7eb2e8f9f7 | 165 | break; |
<> | 144:ef7eb2e8f9f7 | 166 | case 1: |
<> | 144:ef7eb2e8f9f7 | 167 | vector = (uint32_t)&uart1_irq; |
<> | 144:ef7eb2e8f9f7 | 168 | break; |
<> | 144:ef7eb2e8f9f7 | 169 | default: |
<> | 144:ef7eb2e8f9f7 | 170 | break; |
<> | 144:ef7eb2e8f9f7 | 171 | } |
<> | 144:ef7eb2e8f9f7 | 172 | |
<> | 144:ef7eb2e8f9f7 | 173 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 174 | switch (irq) { |
<> | 144:ef7eb2e8f9f7 | 175 | case RxIrq: |
<> | 144:ef7eb2e8f9f7 | 176 | LPUART_EnableInterrupts(uart_addrs[obj->index], kLPUART_RxDataRegFullInterruptEnable); |
<> | 144:ef7eb2e8f9f7 | 177 | break; |
<> | 144:ef7eb2e8f9f7 | 178 | case TxIrq: |
<> | 144:ef7eb2e8f9f7 | 179 | LPUART_EnableInterrupts(uart_addrs[obj->index], kLPUART_TxDataRegEmptyInterruptEnable); |
<> | 144:ef7eb2e8f9f7 | 180 | break; |
<> | 144:ef7eb2e8f9f7 | 181 | default: |
<> | 144:ef7eb2e8f9f7 | 182 | break; |
<> | 144:ef7eb2e8f9f7 | 183 | } |
<> | 144:ef7eb2e8f9f7 | 184 | NVIC_SetVector(uart_irqs[obj->index], vector); |
<> | 144:ef7eb2e8f9f7 | 185 | NVIC_EnableIRQ(uart_irqs[obj->index]); |
<> | 144:ef7eb2e8f9f7 | 186 | |
<> | 144:ef7eb2e8f9f7 | 187 | } else { // disable |
<> | 144:ef7eb2e8f9f7 | 188 | int all_disabled = 0; |
<> | 144:ef7eb2e8f9f7 | 189 | SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq); |
<> | 144:ef7eb2e8f9f7 | 190 | switch (irq) { |
<> | 144:ef7eb2e8f9f7 | 191 | case RxIrq: |
<> | 144:ef7eb2e8f9f7 | 192 | LPUART_DisableInterrupts(uart_addrs[obj->index], kLPUART_RxDataRegFullInterruptEnable); |
<> | 144:ef7eb2e8f9f7 | 193 | break; |
<> | 144:ef7eb2e8f9f7 | 194 | case TxIrq: |
<> | 144:ef7eb2e8f9f7 | 195 | LPUART_DisableInterrupts(uart_addrs[obj->index], kLPUART_TxDataRegEmptyInterruptEnable); |
<> | 144:ef7eb2e8f9f7 | 196 | break; |
<> | 144:ef7eb2e8f9f7 | 197 | default: |
<> | 144:ef7eb2e8f9f7 | 198 | break; |
<> | 144:ef7eb2e8f9f7 | 199 | } |
<> | 144:ef7eb2e8f9f7 | 200 | switch (other_irq) { |
<> | 144:ef7eb2e8f9f7 | 201 | case RxIrq: |
<> | 144:ef7eb2e8f9f7 | 202 | all_disabled = ((LPUART_GetEnabledInterrupts(uart_addrs[obj->index]) & kLPUART_RxDataRegFullInterruptEnable) == 0); |
<> | 144:ef7eb2e8f9f7 | 203 | break; |
<> | 144:ef7eb2e8f9f7 | 204 | case TxIrq: |
<> | 144:ef7eb2e8f9f7 | 205 | all_disabled = ((LPUART_GetEnabledInterrupts(uart_addrs[obj->index]) & kLPUART_TxDataRegEmptyInterruptEnable) == 0); |
<> | 144:ef7eb2e8f9f7 | 206 | break; |
<> | 144:ef7eb2e8f9f7 | 207 | default: |
<> | 144:ef7eb2e8f9f7 | 208 | break; |
<> | 144:ef7eb2e8f9f7 | 209 | } |
<> | 144:ef7eb2e8f9f7 | 210 | if (all_disabled) |
<> | 144:ef7eb2e8f9f7 | 211 | NVIC_DisableIRQ(uart_irqs[obj->index]); |
<> | 144:ef7eb2e8f9f7 | 212 | } |
<> | 144:ef7eb2e8f9f7 | 213 | } |
<> | 144:ef7eb2e8f9f7 | 214 | |
<> | 144:ef7eb2e8f9f7 | 215 | int serial_getc(serial_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 216 | uint8_t data; |
<> | 144:ef7eb2e8f9f7 | 217 | |
<> | 144:ef7eb2e8f9f7 | 218 | LPUART_ReadBlocking(uart_addrs[obj->index], &data, 1); |
<> | 144:ef7eb2e8f9f7 | 219 | return data; |
<> | 144:ef7eb2e8f9f7 | 220 | } |
<> | 144:ef7eb2e8f9f7 | 221 | |
<> | 144:ef7eb2e8f9f7 | 222 | void serial_putc(serial_t *obj, int c) { |
<> | 144:ef7eb2e8f9f7 | 223 | while (!serial_writable(obj)); |
<> | 144:ef7eb2e8f9f7 | 224 | LPUART_WriteByte(uart_addrs[obj->index], (uint8_t)c); |
<> | 144:ef7eb2e8f9f7 | 225 | } |
<> | 144:ef7eb2e8f9f7 | 226 | |
<> | 144:ef7eb2e8f9f7 | 227 | int serial_readable(serial_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 228 | uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]); |
<> | 144:ef7eb2e8f9f7 | 229 | if (status_flags & kLPUART_RxOverrunFlag) |
<> | 144:ef7eb2e8f9f7 | 230 | LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag); |
<> | 144:ef7eb2e8f9f7 | 231 | return (status_flags & kLPUART_RxDataRegFullFlag); |
<> | 144:ef7eb2e8f9f7 | 232 | } |
<> | 144:ef7eb2e8f9f7 | 233 | |
<> | 144:ef7eb2e8f9f7 | 234 | int serial_writable(serial_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 235 | uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]); |
<> | 144:ef7eb2e8f9f7 | 236 | if (status_flags & kLPUART_RxOverrunFlag) |
<> | 144:ef7eb2e8f9f7 | 237 | LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag); |
<> | 144:ef7eb2e8f9f7 | 238 | return (status_flags & kLPUART_TxDataRegEmptyFlag); |
<> | 144:ef7eb2e8f9f7 | 239 | } |
<> | 144:ef7eb2e8f9f7 | 240 | |
<> | 144:ef7eb2e8f9f7 | 241 | void serial_clear(serial_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 242 | } |
<> | 144:ef7eb2e8f9f7 | 243 | |
<> | 144:ef7eb2e8f9f7 | 244 | void serial_pinout_tx(PinName tx) { |
<> | 144:ef7eb2e8f9f7 | 245 | pinmap_pinout(tx, PinMap_UART_TX); |
<> | 144:ef7eb2e8f9f7 | 246 | } |
<> | 144:ef7eb2e8f9f7 | 247 | |
<> | 144:ef7eb2e8f9f7 | 248 | void serial_break_set(serial_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 249 | uart_addrs[obj->index]->CTRL |= LPUART_CTRL_SBK_MASK; |
<> | 144:ef7eb2e8f9f7 | 250 | } |
<> | 144:ef7eb2e8f9f7 | 251 | |
<> | 144:ef7eb2e8f9f7 | 252 | void serial_break_clear(serial_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 253 | uart_addrs[obj->index]->CTRL &= ~LPUART_CTRL_SBK_MASK; |
<> | 144:ef7eb2e8f9f7 | 254 | } |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | #endif |