Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_flexio_i2s_dma.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30 #ifndef _FSL_FLEXIO_I2S_DMA_H_
<> 144:ef7eb2e8f9f7 31 #define _FSL_FLEXIO_I2S_DMA_H_
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "fsl_flexio_i2s.h"
<> 144:ef7eb2e8f9f7 34 #include "fsl_dma.h"
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /*!
<> 144:ef7eb2e8f9f7 37 * @addtogroup flexio_dma_i2s
<> 144:ef7eb2e8f9f7 38 * @{
<> 144:ef7eb2e8f9f7 39 */
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 /*! @file */
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /*******************************************************************************
<> 144:ef7eb2e8f9f7 44 * Definitions
<> 144:ef7eb2e8f9f7 45 ******************************************************************************/
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 typedef struct _flexio_i2s_dma_handle flexio_i2s_dma_handle_t;
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /*! @brief FlexIO I2S DMA transfer callback function for finish and error */
<> 144:ef7eb2e8f9f7 50 typedef void (*flexio_i2s_dma_callback_t)(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 51 flexio_i2s_dma_handle_t *handle,
<> 144:ef7eb2e8f9f7 52 status_t status,
<> 144:ef7eb2e8f9f7 53 void *userData);
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /*! @brief FlexIO I2S DMA transfer handle, users should not touch the content of the handle.*/
<> 144:ef7eb2e8f9f7 56 struct _flexio_i2s_dma_handle
<> 144:ef7eb2e8f9f7 57 {
<> 144:ef7eb2e8f9f7 58 dma_handle_t *dmaHandle; /*!< DMA handler for FlexIO I2S send */
<> 144:ef7eb2e8f9f7 59 uint8_t bytesPerFrame; /*!< Bytes in a frame */
<> 144:ef7eb2e8f9f7 60 uint32_t state; /*!< Internal state for FlexIO I2S DMA transfer */
<> 144:ef7eb2e8f9f7 61 flexio_i2s_dma_callback_t callback; /*!< Callback for users while transfer finish or error occurred */
<> 144:ef7eb2e8f9f7 62 void *userData; /*!< User callback parameter */
<> 144:ef7eb2e8f9f7 63 flexio_i2s_transfer_t queue[FLEXIO_I2S_XFER_QUEUE_SIZE]; /*!< Transfer queue storing queued transfer. */
<> 144:ef7eb2e8f9f7 64 size_t transferSize[FLEXIO_I2S_XFER_QUEUE_SIZE]; /*!< Data bytes need to transfer */
<> 144:ef7eb2e8f9f7 65 volatile uint8_t queueUser; /*!< Index for user to queue transfer. */
<> 144:ef7eb2e8f9f7 66 volatile uint8_t queueDriver; /*!< Index for driver to get the transfer data and size */
<> 144:ef7eb2e8f9f7 67 };
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 /*******************************************************************************
<> 144:ef7eb2e8f9f7 70 * APIs
<> 144:ef7eb2e8f9f7 71 ******************************************************************************/
<> 144:ef7eb2e8f9f7 72 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 73 extern "C" {
<> 144:ef7eb2e8f9f7 74 #endif
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 /*!
<> 144:ef7eb2e8f9f7 77 * @name DMA Transactional
<> 144:ef7eb2e8f9f7 78 * @{
<> 144:ef7eb2e8f9f7 79 */
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /*!
<> 144:ef7eb2e8f9f7 82 * @brief Initializes the FlexIO I2S DMA handle.
<> 144:ef7eb2e8f9f7 83 *
<> 144:ef7eb2e8f9f7 84 * This function initializes the FlexIO I2S master DMA handle which can be used for other FlexIO I2S master
<> 144:ef7eb2e8f9f7 85 * transactional APIs.
<> 144:ef7eb2e8f9f7 86 * Usually, for a specified FlexIO I2S instance, user need only call this API once to get the initialized handle.
<> 144:ef7eb2e8f9f7 87 *
<> 144:ef7eb2e8f9f7 88 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 89 * @param handle FlexIO I2S DMA handle pointer.
<> 144:ef7eb2e8f9f7 90 * @param callback FlexIO I2S DMA callback function called while finished a block.
<> 144:ef7eb2e8f9f7 91 * @param userData User parameter for callback.
<> 144:ef7eb2e8f9f7 92 * @param dmaHandle DMA handle for FlexIO I2S. This handle shall be a static value allocated by users.
<> 144:ef7eb2e8f9f7 93 */
<> 144:ef7eb2e8f9f7 94 void FLEXIO_I2S_TransferTxCreateHandleDMA(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 95 flexio_i2s_dma_handle_t *handle,
<> 144:ef7eb2e8f9f7 96 flexio_i2s_dma_callback_t callback,
<> 144:ef7eb2e8f9f7 97 void *userData,
<> 144:ef7eb2e8f9f7 98 dma_handle_t *dmaHandle);
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /*!
<> 144:ef7eb2e8f9f7 101 * @brief Initializes the FlexIO I2S Rx DMA handle.
<> 144:ef7eb2e8f9f7 102 *
<> 144:ef7eb2e8f9f7 103 * This function initializes the FlexIO I2S slave DMA handle which can be used for other FlexIO I2S master transactional
<> 144:ef7eb2e8f9f7 104 * APIs.
<> 144:ef7eb2e8f9f7 105 * Usually, for a specified FlexIO I2S instance, user need only call this API once to get the initialized handle.
<> 144:ef7eb2e8f9f7 106 *
<> 144:ef7eb2e8f9f7 107 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 108 * @param handle FlexIO I2S DMA handle pointer.
<> 144:ef7eb2e8f9f7 109 * @param callback FlexIO I2S DMA callback function called while finished a block.
<> 144:ef7eb2e8f9f7 110 * @param userData User parameter for callback.
<> 144:ef7eb2e8f9f7 111 * @param dmaHandle DMA handle for FlexIO I2S. This handle shall be a static value allocated by users.
<> 144:ef7eb2e8f9f7 112 */
<> 144:ef7eb2e8f9f7 113 void FLEXIO_I2S_TransferRxCreateHandleDMA(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 114 flexio_i2s_dma_handle_t *handle,
<> 144:ef7eb2e8f9f7 115 flexio_i2s_dma_callback_t callback,
<> 144:ef7eb2e8f9f7 116 void *userData,
<> 144:ef7eb2e8f9f7 117 dma_handle_t *dmaHandle);
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /*!
<> 144:ef7eb2e8f9f7 120 * @brief Configures the FlexIO I2S Tx audio format.
<> 144:ef7eb2e8f9f7 121 *
<> 144:ef7eb2e8f9f7 122 * Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data
<> 144:ef7eb2e8f9f7 123 * format to be transferred. This function also sets DMA parameter according to format.
<> 144:ef7eb2e8f9f7 124 *
<> 144:ef7eb2e8f9f7 125 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 126 * @param handle FlexIO I2S DMA handle pointer
<> 144:ef7eb2e8f9f7 127 * @param format Pointer to FlexIO I2S audio data format structure.
<> 144:ef7eb2e8f9f7 128 * @param srcClock_Hz FlexIO I2S clock source frequency in Hz. It should be 0 while in slave mode.
<> 144:ef7eb2e8f9f7 129 * @retval kStatus_Success Audio format set successfully.
<> 144:ef7eb2e8f9f7 130 * @retval kStatus_InvalidArgument The input arguments is invalid.
<> 144:ef7eb2e8f9f7 131 */
<> 144:ef7eb2e8f9f7 132 void FLEXIO_I2S_TransferSetFormatDMA(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 133 flexio_i2s_dma_handle_t *handle,
<> 144:ef7eb2e8f9f7 134 flexio_i2s_format_t *format,
<> 144:ef7eb2e8f9f7 135 uint32_t srcClock_Hz);
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 /*!
<> 144:ef7eb2e8f9f7 138 * @brief Performs a non-blocking FlexIO I2S transfer using DMA.
<> 144:ef7eb2e8f9f7 139 *
<> 144:ef7eb2e8f9f7 140 * @note This interface returns immediately after transfer initiates. Call
<> 144:ef7eb2e8f9f7 141 * FLEXIO_I2S_GetTransferStatus to poll the transfer status and check whether FLEXIO I2S transfer finished.
<> 144:ef7eb2e8f9f7 142 *
<> 144:ef7eb2e8f9f7 143 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 144 * @param handle FlexIO I2S DMA handle pointer.
<> 144:ef7eb2e8f9f7 145 * @param xfer Pointer to DMA transfer structure.
<> 144:ef7eb2e8f9f7 146 * @retval kStatus_Success Start a FlexIO I2S DMA send successfully.
<> 144:ef7eb2e8f9f7 147 * @retval kStatus_InvalidArgument The input arguments is invalid.
<> 144:ef7eb2e8f9f7 148 * @retval kStatus_TxBusy FlexIO I2S is busy sending data.
<> 144:ef7eb2e8f9f7 149 */
<> 144:ef7eb2e8f9f7 150 status_t FLEXIO_I2S_TransferSendDMA(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 151 flexio_i2s_dma_handle_t *handle,
<> 144:ef7eb2e8f9f7 152 flexio_i2s_transfer_t *xfer);
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /*!
<> 144:ef7eb2e8f9f7 155 * @brief Performs a non-blocking FlexIO I2S receive using DMA.
<> 144:ef7eb2e8f9f7 156 *
<> 144:ef7eb2e8f9f7 157 * @note This interface returns immediately after transfer initiates. Call
<> 144:ef7eb2e8f9f7 158 * FLEXIO_I2S_GetReceiveRemainingBytes to poll the transfer status to check whether the FlexIO I2S transfer is finished.
<> 144:ef7eb2e8f9f7 159 *
<> 144:ef7eb2e8f9f7 160 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 161 * @param handle FlexIO I2S DMA handle pointer.
<> 144:ef7eb2e8f9f7 162 * @param xfer Pointer to DMA transfer structure.
<> 144:ef7eb2e8f9f7 163 * @retval kStatus_Success Start a FlexIO I2S DMA receive successfully.
<> 144:ef7eb2e8f9f7 164 * @retval kStatus_InvalidArgument The input arguments is invalid.
<> 144:ef7eb2e8f9f7 165 * @retval kStatus_RxBusy FlexIO I2S is busy receiving data.
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167 status_t FLEXIO_I2S_TransferReceiveDMA(FLEXIO_I2S_Type *base,
<> 144:ef7eb2e8f9f7 168 flexio_i2s_dma_handle_t *handle,
<> 144:ef7eb2e8f9f7 169 flexio_i2s_transfer_t *xfer);
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 /*!
<> 144:ef7eb2e8f9f7 172 * @brief Aborts a FlexIO I2S transfer using DMA.
<> 144:ef7eb2e8f9f7 173 *
<> 144:ef7eb2e8f9f7 174 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 175 * @param handle FlexIO I2S DMA handle pointer.
<> 144:ef7eb2e8f9f7 176 */
<> 144:ef7eb2e8f9f7 177 void FLEXIO_I2S_TransferAbortSendDMA(FLEXIO_I2S_Type *base, flexio_i2s_dma_handle_t *handle);
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 /*!
<> 144:ef7eb2e8f9f7 180 * @brief Aborts a FlexIO I2S receive using DMA.
<> 144:ef7eb2e8f9f7 181 *
<> 144:ef7eb2e8f9f7 182 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 183 * @param handle FlexIO I2S DMA handle pointer.
<> 144:ef7eb2e8f9f7 184 */
<> 144:ef7eb2e8f9f7 185 void FLEXIO_I2S_TransferAbortReceiveDMA(FLEXIO_I2S_Type *base, flexio_i2s_dma_handle_t *handle);
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /*!
<> 144:ef7eb2e8f9f7 188 * @brief Gets the remaining bytes to be sent.
<> 144:ef7eb2e8f9f7 189 *
<> 144:ef7eb2e8f9f7 190 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 191 * @param handle FlexIO I2S DMA handle pointer.
<> 144:ef7eb2e8f9f7 192 * @param count Bytes sent.
<> 144:ef7eb2e8f9f7 193 * @retval kStatus_Success Succeed get the transfer count.
<> 144:ef7eb2e8f9f7 194 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196 status_t FLEXIO_I2S_TransferGetSendCountDMA(FLEXIO_I2S_Type *base, flexio_i2s_dma_handle_t *handle, size_t *count);
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /*!
<> 144:ef7eb2e8f9f7 199 * @brief Gets the remaining bytes to be received.
<> 144:ef7eb2e8f9f7 200 *
<> 144:ef7eb2e8f9f7 201 * @param base FlexIO I2S peripheral base address.
<> 144:ef7eb2e8f9f7 202 * @param handle FlexIO I2S DMA handle pointer.
<> 144:ef7eb2e8f9f7 203 * @param count Bytes received.
<> 144:ef7eb2e8f9f7 204 * @retval kStatus_Success Succeed get the transfer count.
<> 144:ef7eb2e8f9f7 205 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
<> 144:ef7eb2e8f9f7 206 */
<> 144:ef7eb2e8f9f7 207 status_t FLEXIO_I2S_TransferGetReceiveCountDMA(FLEXIO_I2S_Type *base, flexio_i2s_dma_handle_t *handle, size_t *count);
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /*! @} */
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 212 }
<> 144:ef7eb2e8f9f7 213 #endif
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /*!
<> 144:ef7eb2e8f9f7 216 * @}
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218 #endif