Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_wdog.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 #include "fsl_wdog.h"
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 /*******************************************************************************
<> 144:ef7eb2e8f9f7 34 * Code
<> 144:ef7eb2e8f9f7 35 ******************************************************************************/
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 void WDOG_GetDefaultConfig(wdog_config_t *config)
<> 144:ef7eb2e8f9f7 38 {
<> 144:ef7eb2e8f9f7 39 assert(config);
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 config->enableWdog = true;
<> 144:ef7eb2e8f9f7 42 config->clockSource = kWDOG_LpoClockSource;
<> 144:ef7eb2e8f9f7 43 config->prescaler = kWDOG_ClockPrescalerDivide1;
<> 144:ef7eb2e8f9f7 44 #if defined(FSL_FEATURE_WDOG_HAS_WAITEN) && FSL_FEATURE_WDOG_HAS_WAITEN
<> 144:ef7eb2e8f9f7 45 config->workMode.enableWait = true;
<> 144:ef7eb2e8f9f7 46 #endif /* FSL_FEATURE_WDOG_HAS_WAITEN */
<> 144:ef7eb2e8f9f7 47 config->workMode.enableStop = false;
<> 144:ef7eb2e8f9f7 48 config->workMode.enableDebug = false;
<> 144:ef7eb2e8f9f7 49 config->enableUpdate = true;
<> 144:ef7eb2e8f9f7 50 config->enableInterrupt = false;
<> 144:ef7eb2e8f9f7 51 config->enableWindowMode = false;
<> 144:ef7eb2e8f9f7 52 config->windowValue = 0U;
<> 144:ef7eb2e8f9f7 53 config->timeoutValue = 0xFFFFU;
<> 144:ef7eb2e8f9f7 54 }
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 void WDOG_Init(WDOG_Type *base, const wdog_config_t *config)
<> 144:ef7eb2e8f9f7 57 {
<> 144:ef7eb2e8f9f7 58 assert(config);
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 uint32_t value = 0U;
<> 144:ef7eb2e8f9f7 61 uint32_t primaskValue = 0U;
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 value = WDOG_STCTRLH_WDOGEN(config->enableWdog) | WDOG_STCTRLH_CLKSRC(config->clockSource) |
<> 144:ef7eb2e8f9f7 64 WDOG_STCTRLH_IRQRSTEN(config->enableInterrupt) | WDOG_STCTRLH_WINEN(config->enableWindowMode) |
<> 144:ef7eb2e8f9f7 65 WDOG_STCTRLH_ALLOWUPDATE(config->enableUpdate) | WDOG_STCTRLH_DBGEN(config->workMode.enableDebug) |
<> 144:ef7eb2e8f9f7 66 WDOG_STCTRLH_STOPEN(config->workMode.enableStop) |
<> 144:ef7eb2e8f9f7 67 #if defined(FSL_FEATURE_WDOG_HAS_WAITEN) && FSL_FEATURE_WDOG_HAS_WAITEN
<> 144:ef7eb2e8f9f7 68 WDOG_STCTRLH_WAITEN(config->workMode.enableWait) |
<> 144:ef7eb2e8f9f7 69 #endif /* FSL_FEATURE_WDOG_HAS_WAITEN */
<> 144:ef7eb2e8f9f7 70 WDOG_STCTRLH_DISTESTWDOG(1U);
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 /* Disable the global interrupts. Otherwise, an interrupt could effectively invalidate the unlock sequence
<> 144:ef7eb2e8f9f7 73 * and the WCT may expire. After the configuration finishes, re-enable the global interrupts. */
<> 144:ef7eb2e8f9f7 74 primaskValue = DisableGlobalIRQ();
<> 144:ef7eb2e8f9f7 75 WDOG_Unlock(base);
<> 144:ef7eb2e8f9f7 76 /* Wait one bus clock cycle */
<> 144:ef7eb2e8f9f7 77 base->RSTCNT = 0U;
<> 144:ef7eb2e8f9f7 78 /* Set configruation */
<> 144:ef7eb2e8f9f7 79 base->PRESC = WDOG_PRESC_PRESCVAL(config->prescaler);
<> 144:ef7eb2e8f9f7 80 base->WINH = (uint16_t)((config->windowValue >> 16U) & 0xFFFFU);
<> 144:ef7eb2e8f9f7 81 base->WINL = (uint16_t)((config->windowValue) & 0xFFFFU);
<> 144:ef7eb2e8f9f7 82 base->TOVALH = (uint16_t)((config->timeoutValue >> 16U) & 0xFFFFU);
<> 144:ef7eb2e8f9f7 83 base->TOVALL = (uint16_t)((config->timeoutValue) & 0xFFFFU);
<> 144:ef7eb2e8f9f7 84 base->STCTRLH = value;
<> 144:ef7eb2e8f9f7 85 EnableGlobalIRQ(primaskValue);
<> 144:ef7eb2e8f9f7 86 }
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 void WDOG_Deinit(WDOG_Type *base)
<> 144:ef7eb2e8f9f7 89 {
<> 144:ef7eb2e8f9f7 90 uint32_t primaskValue = 0U;
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 /* Disable the global interrupts */
<> 144:ef7eb2e8f9f7 93 primaskValue = DisableGlobalIRQ();
<> 144:ef7eb2e8f9f7 94 WDOG_Unlock(base);
<> 144:ef7eb2e8f9f7 95 /* Wait one bus clock cycle */
<> 144:ef7eb2e8f9f7 96 base->RSTCNT = 0U;
<> 144:ef7eb2e8f9f7 97 WDOG_Disable(base);
<> 144:ef7eb2e8f9f7 98 EnableGlobalIRQ(primaskValue);
<> 144:ef7eb2e8f9f7 99 WDOG_ClearResetCount(base);
<> 144:ef7eb2e8f9f7 100 }
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 void WDOG_SetTestModeConfig(WDOG_Type *base, wdog_test_config_t *config)
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 assert(config);
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 uint32_t value = 0U;
<> 144:ef7eb2e8f9f7 107 uint32_t primaskValue = 0U;
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 value = WDOG_STCTRLH_DISTESTWDOG(0U) | WDOG_STCTRLH_TESTWDOG(1U) | WDOG_STCTRLH_TESTSEL(config->testMode) |
<> 144:ef7eb2e8f9f7 110 WDOG_STCTRLH_BYTESEL(config->testedByte) | WDOG_STCTRLH_IRQRSTEN(0U) | WDOG_STCTRLH_WDOGEN(1U) |
<> 144:ef7eb2e8f9f7 111 WDOG_STCTRLH_ALLOWUPDATE(1U);
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /* Disable the global interrupts. Otherwise, an interrupt could effectively invalidate the unlock sequence
<> 144:ef7eb2e8f9f7 114 * and the WCT may expire. After the configuration finishes, re-enable the global interrupts. */
<> 144:ef7eb2e8f9f7 115 primaskValue = DisableGlobalIRQ();
<> 144:ef7eb2e8f9f7 116 WDOG_Unlock(base);
<> 144:ef7eb2e8f9f7 117 /* Wait one bus clock cycle */
<> 144:ef7eb2e8f9f7 118 base->RSTCNT = 0U;
<> 144:ef7eb2e8f9f7 119 /* Set configruation */
<> 144:ef7eb2e8f9f7 120 base->TOVALH = (uint16_t)((config->timeoutValue >> 16U) & 0xFFFFU);
<> 144:ef7eb2e8f9f7 121 base->TOVALL = (uint16_t)((config->timeoutValue) & 0xFFFFU);
<> 144:ef7eb2e8f9f7 122 base->STCTRLH = value;
<> 144:ef7eb2e8f9f7 123 EnableGlobalIRQ(primaskValue);
<> 144:ef7eb2e8f9f7 124 }
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 uint32_t WDOG_GetStatusFlags(WDOG_Type *base)
<> 144:ef7eb2e8f9f7 127 {
<> 144:ef7eb2e8f9f7 128 uint32_t status_flag = 0U;
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 status_flag |= (base->STCTRLH & WDOG_STCTRLH_WDOGEN_MASK);
<> 144:ef7eb2e8f9f7 131 status_flag |= (base->STCTRLL & WDOG_STCTRLL_INTFLG_MASK);
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 return status_flag;
<> 144:ef7eb2e8f9f7 134 }
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 void WDOG_ClearStatusFlags(WDOG_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 137 {
<> 144:ef7eb2e8f9f7 138 if (mask & kWDOG_TimeoutFlag)
<> 144:ef7eb2e8f9f7 139 {
<> 144:ef7eb2e8f9f7 140 base->STCTRLL |= WDOG_STCTRLL_INTFLG_MASK;
<> 144:ef7eb2e8f9f7 141 }
<> 144:ef7eb2e8f9f7 142 }
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 void WDOG_Refresh(WDOG_Type *base)
<> 144:ef7eb2e8f9f7 145 {
<> 144:ef7eb2e8f9f7 146 uint32_t primaskValue = 0U;
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /* Disable the global interrupt to protect refresh sequence */
<> 144:ef7eb2e8f9f7 149 primaskValue = DisableGlobalIRQ();
<> 144:ef7eb2e8f9f7 150 base->REFRESH = WDOG_FIRST_WORD_OF_REFRESH;
<> 144:ef7eb2e8f9f7 151 base->REFRESH = WDOG_SECOND_WORD_OF_REFRESH;
<> 144:ef7eb2e8f9f7 152 EnableGlobalIRQ(primaskValue);
<> 144:ef7eb2e8f9f7 153 }