Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_lpuart_edma.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 #include "fsl_lpuart_edma.h"
<> 144:ef7eb2e8f9f7 32 #include "fsl_dmamux.h"
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 /*******************************************************************************
<> 144:ef7eb2e8f9f7 35 * Definitions
<> 144:ef7eb2e8f9f7 36 ******************************************************************************/
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /*<! Structure definition for lpuart_edma_private_handle_t. The structure is private. */
<> 144:ef7eb2e8f9f7 39 typedef struct _lpuart_edma_private_handle
<> 144:ef7eb2e8f9f7 40 {
<> 144:ef7eb2e8f9f7 41 LPUART_Type *base;
<> 144:ef7eb2e8f9f7 42 lpuart_edma_handle_t *handle;
<> 144:ef7eb2e8f9f7 43 } lpuart_edma_private_handle_t;
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 /* LPUART EDMA transfer handle. */
<> 144:ef7eb2e8f9f7 46 enum _lpuart_edma_tansfer_states
<> 144:ef7eb2e8f9f7 47 {
<> 144:ef7eb2e8f9f7 48 kLPUART_TxIdle, /* TX idle. */
<> 144:ef7eb2e8f9f7 49 kLPUART_TxBusy, /* TX busy. */
<> 144:ef7eb2e8f9f7 50 kLPUART_RxIdle, /* RX idle. */
<> 144:ef7eb2e8f9f7 51 kLPUART_RxBusy /* RX busy. */
<> 144:ef7eb2e8f9f7 52 };
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /*******************************************************************************
<> 144:ef7eb2e8f9f7 55 * Definitions
<> 144:ef7eb2e8f9f7 56 ******************************************************************************/
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /*<! Private handle only used for internally. */
<> 144:ef7eb2e8f9f7 59 static lpuart_edma_private_handle_t s_edmaPrivateHandle[FSL_FEATURE_SOC_LPUART_COUNT];
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /*******************************************************************************
<> 144:ef7eb2e8f9f7 62 * Prototypes
<> 144:ef7eb2e8f9f7 63 ******************************************************************************/
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 /*!
<> 144:ef7eb2e8f9f7 66 * @brief LPUART EDMA send finished callback function.
<> 144:ef7eb2e8f9f7 67 *
<> 144:ef7eb2e8f9f7 68 * This function is called when LPUART EDMA send finished. It disables the LPUART
<> 144:ef7eb2e8f9f7 69 * TX EDMA request and sends @ref kStatus_LPUART_TxIdle to LPUART callback.
<> 144:ef7eb2e8f9f7 70 *
<> 144:ef7eb2e8f9f7 71 * @param handle The EDMA handle.
<> 144:ef7eb2e8f9f7 72 * @param param Callback function parameter.
<> 144:ef7eb2e8f9f7 73 */
<> 144:ef7eb2e8f9f7 74 static void LPUART_SendEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds);
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 /*!
<> 144:ef7eb2e8f9f7 77 * @brief LPUART EDMA receive finished callback function.
<> 144:ef7eb2e8f9f7 78 *
<> 144:ef7eb2e8f9f7 79 * This function is called when LPUART EDMA receive finished. It disables the LPUART
<> 144:ef7eb2e8f9f7 80 * RX EDMA request and sends @ref kStatus_LPUART_RxIdle to LPUART callback.
<> 144:ef7eb2e8f9f7 81 *
<> 144:ef7eb2e8f9f7 82 * @param handle The EDMA handle.
<> 144:ef7eb2e8f9f7 83 * @param param Callback function parameter.
<> 144:ef7eb2e8f9f7 84 */
<> 144:ef7eb2e8f9f7 85 static void LPUART_ReceiveEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds);
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 /*!
<> 144:ef7eb2e8f9f7 88 * @brief Get the LPUART instance from peripheral base address.
<> 144:ef7eb2e8f9f7 89 *
<> 144:ef7eb2e8f9f7 90 * @param base LPUART peripheral base address.
<> 144:ef7eb2e8f9f7 91 * @return LPUART instance.
<> 144:ef7eb2e8f9f7 92 */
<> 144:ef7eb2e8f9f7 93 extern uint32_t LPUART_GetInstance(LPUART_Type *base);
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /*******************************************************************************
<> 144:ef7eb2e8f9f7 96 * Code
<> 144:ef7eb2e8f9f7 97 ******************************************************************************/
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 static void LPUART_SendEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds)
<> 144:ef7eb2e8f9f7 100 {
<> 144:ef7eb2e8f9f7 101 lpuart_edma_private_handle_t *lpuartPrivateHandle = (lpuart_edma_private_handle_t *)param;
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 /* Avoid the warning for unused variables. */
<> 144:ef7eb2e8f9f7 104 handle = handle;
<> 144:ef7eb2e8f9f7 105 tcds = tcds;
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 if (transferDone)
<> 144:ef7eb2e8f9f7 108 {
<> 144:ef7eb2e8f9f7 109 LPUART_TransferAbortSendEDMA(lpuartPrivateHandle->base, lpuartPrivateHandle->handle);
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 if (lpuartPrivateHandle->handle->callback)
<> 144:ef7eb2e8f9f7 112 {
<> 144:ef7eb2e8f9f7 113 lpuartPrivateHandle->handle->callback(lpuartPrivateHandle->base, lpuartPrivateHandle->handle,
<> 144:ef7eb2e8f9f7 114 kStatus_LPUART_TxIdle, lpuartPrivateHandle->handle->userData);
<> 144:ef7eb2e8f9f7 115 }
<> 144:ef7eb2e8f9f7 116 }
<> 144:ef7eb2e8f9f7 117 }
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 static void LPUART_ReceiveEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds)
<> 144:ef7eb2e8f9f7 120 {
<> 144:ef7eb2e8f9f7 121 lpuart_edma_private_handle_t *lpuartPrivateHandle = (lpuart_edma_private_handle_t *)param;
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 /* Avoid warning for unused parameters. */
<> 144:ef7eb2e8f9f7 124 handle = handle;
<> 144:ef7eb2e8f9f7 125 tcds = tcds;
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 if (transferDone)
<> 144:ef7eb2e8f9f7 128 {
<> 144:ef7eb2e8f9f7 129 /* Disable transfer. */
<> 144:ef7eb2e8f9f7 130 LPUART_TransferAbortReceiveEDMA(lpuartPrivateHandle->base, lpuartPrivateHandle->handle);
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 if (lpuartPrivateHandle->handle->callback)
<> 144:ef7eb2e8f9f7 133 {
<> 144:ef7eb2e8f9f7 134 lpuartPrivateHandle->handle->callback(lpuartPrivateHandle->base, lpuartPrivateHandle->handle,
<> 144:ef7eb2e8f9f7 135 kStatus_LPUART_RxIdle, lpuartPrivateHandle->handle->userData);
<> 144:ef7eb2e8f9f7 136 }
<> 144:ef7eb2e8f9f7 137 }
<> 144:ef7eb2e8f9f7 138 }
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 void LPUART_TransferCreateHandleEDMA(LPUART_Type *base,
<> 144:ef7eb2e8f9f7 141 lpuart_edma_handle_t *handle,
<> 144:ef7eb2e8f9f7 142 lpuart_edma_transfer_callback_t callback,
<> 144:ef7eb2e8f9f7 143 void *userData,
<> 144:ef7eb2e8f9f7 144 edma_handle_t *txEdmaHandle,
<> 144:ef7eb2e8f9f7 145 edma_handle_t *rxEdmaHandle)
<> 144:ef7eb2e8f9f7 146 {
<> 144:ef7eb2e8f9f7 147 assert(handle);
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 uint32_t instance = LPUART_GetInstance(base);
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 s_edmaPrivateHandle[instance].base = base;
<> 144:ef7eb2e8f9f7 152 s_edmaPrivateHandle[instance].handle = handle;
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 memset(handle, 0, sizeof(*handle));
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 handle->rxState = kLPUART_RxIdle;
<> 144:ef7eb2e8f9f7 157 handle->txState = kLPUART_TxIdle;
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 handle->rxEdmaHandle = rxEdmaHandle;
<> 144:ef7eb2e8f9f7 160 handle->txEdmaHandle = txEdmaHandle;
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 handle->callback = callback;
<> 144:ef7eb2e8f9f7 163 handle->userData = userData;
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
<> 144:ef7eb2e8f9f7 166 /* Note:
<> 144:ef7eb2e8f9f7 167 Take care of the RX FIFO, EDMA request only assert when received bytes
<> 144:ef7eb2e8f9f7 168 equal or more than RX water mark, there is potential issue if RX water
<> 144:ef7eb2e8f9f7 169 mark larger than 1.
<> 144:ef7eb2e8f9f7 170 For example, if RX FIFO water mark is 2, upper layer needs 5 bytes and
<> 144:ef7eb2e8f9f7 171 5 bytes are received. the last byte will be saved in FIFO but not trigger
<> 144:ef7eb2e8f9f7 172 EDMA transfer because the water mark is 2.
<> 144:ef7eb2e8f9f7 173 */
<> 144:ef7eb2e8f9f7 174 if (rxEdmaHandle)
<> 144:ef7eb2e8f9f7 175 {
<> 144:ef7eb2e8f9f7 176 base->WATER &= (~LPUART_WATER_RXWATER_MASK);
<> 144:ef7eb2e8f9f7 177 }
<> 144:ef7eb2e8f9f7 178 #endif
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /* Configure TX. */
<> 144:ef7eb2e8f9f7 181 if (txEdmaHandle)
<> 144:ef7eb2e8f9f7 182 {
<> 144:ef7eb2e8f9f7 183 EDMA_SetCallback(handle->txEdmaHandle, LPUART_SendEDMACallback, &s_edmaPrivateHandle[instance]);
<> 144:ef7eb2e8f9f7 184 }
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 /* Configure RX. */
<> 144:ef7eb2e8f9f7 187 if (rxEdmaHandle)
<> 144:ef7eb2e8f9f7 188 {
<> 144:ef7eb2e8f9f7 189 EDMA_SetCallback(handle->rxEdmaHandle, LPUART_ReceiveEDMACallback, &s_edmaPrivateHandle[instance]);
<> 144:ef7eb2e8f9f7 190 }
<> 144:ef7eb2e8f9f7 191 }
<> 144:ef7eb2e8f9f7 192 status_t LPUART_SendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer)
<> 144:ef7eb2e8f9f7 193 {
<> 144:ef7eb2e8f9f7 194 assert(handle->txEdmaHandle);
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 edma_transfer_config_t xferConfig;
<> 144:ef7eb2e8f9f7 197 status_t status;
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /* Return error if xfer invalid. */
<> 144:ef7eb2e8f9f7 200 if ((0U == xfer->dataSize) || (NULL == xfer->data))
<> 144:ef7eb2e8f9f7 201 {
<> 144:ef7eb2e8f9f7 202 return kStatus_InvalidArgument;
<> 144:ef7eb2e8f9f7 203 }
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 /* If previous TX not finished. */
<> 144:ef7eb2e8f9f7 206 if (kLPUART_TxBusy == handle->txState)
<> 144:ef7eb2e8f9f7 207 {
<> 144:ef7eb2e8f9f7 208 status = kStatus_LPUART_TxBusy;
<> 144:ef7eb2e8f9f7 209 }
<> 144:ef7eb2e8f9f7 210 else
<> 144:ef7eb2e8f9f7 211 {
<> 144:ef7eb2e8f9f7 212 handle->txState = kLPUART_TxBusy;
<> 144:ef7eb2e8f9f7 213 handle->txDataSizeAll = xfer->dataSize;
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /* Prepare transfer. */
<> 144:ef7eb2e8f9f7 216 EDMA_PrepareTransfer(&xferConfig, xfer->data, sizeof(uint8_t), (void *)LPUART_GetDataRegisterAddress(base),
<> 144:ef7eb2e8f9f7 217 sizeof(uint8_t), sizeof(uint8_t), xfer->dataSize, kEDMA_MemoryToPeripheral);
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 /* Submit transfer. */
<> 144:ef7eb2e8f9f7 220 EDMA_SubmitTransfer(handle->txEdmaHandle, &xferConfig);
<> 144:ef7eb2e8f9f7 221 EDMA_StartTransfer(handle->txEdmaHandle);
<> 144:ef7eb2e8f9f7 222
<> 144:ef7eb2e8f9f7 223 /* Enable LPUART TX EDMA. */
<> 144:ef7eb2e8f9f7 224 LPUART_EnableTxDMA(base, true);
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 status = kStatus_Success;
<> 144:ef7eb2e8f9f7 227 }
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 return status;
<> 144:ef7eb2e8f9f7 230 }
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 status_t LPUART_ReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer)
<> 144:ef7eb2e8f9f7 233 {
<> 144:ef7eb2e8f9f7 234 assert(handle->rxEdmaHandle);
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 edma_transfer_config_t xferConfig;
<> 144:ef7eb2e8f9f7 237 status_t status;
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /* Return error if xfer invalid. */
<> 144:ef7eb2e8f9f7 240 if ((0U == xfer->dataSize) || (NULL == xfer->data))
<> 144:ef7eb2e8f9f7 241 {
<> 144:ef7eb2e8f9f7 242 return kStatus_InvalidArgument;
<> 144:ef7eb2e8f9f7 243 }
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 /* If previous RX not finished. */
<> 144:ef7eb2e8f9f7 246 if (kLPUART_RxBusy == handle->rxState)
<> 144:ef7eb2e8f9f7 247 {
<> 144:ef7eb2e8f9f7 248 status = kStatus_LPUART_RxBusy;
<> 144:ef7eb2e8f9f7 249 }
<> 144:ef7eb2e8f9f7 250 else
<> 144:ef7eb2e8f9f7 251 {
<> 144:ef7eb2e8f9f7 252 handle->rxState = kLPUART_RxBusy;
<> 144:ef7eb2e8f9f7 253 handle->rxDataSizeAll = xfer->dataSize;
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /* Prepare transfer. */
<> 144:ef7eb2e8f9f7 256 EDMA_PrepareTransfer(&xferConfig, (void *)LPUART_GetDataRegisterAddress(base), sizeof(uint8_t), xfer->data,
<> 144:ef7eb2e8f9f7 257 sizeof(uint8_t), sizeof(uint8_t), xfer->dataSize, kEDMA_PeripheralToMemory);
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /* Submit transfer. */
<> 144:ef7eb2e8f9f7 260 EDMA_SubmitTransfer(handle->rxEdmaHandle, &xferConfig);
<> 144:ef7eb2e8f9f7 261 EDMA_StartTransfer(handle->rxEdmaHandle);
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 /* Enable LPUART RX EDMA. */
<> 144:ef7eb2e8f9f7 264 LPUART_EnableRxDMA(base, true);
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 status = kStatus_Success;
<> 144:ef7eb2e8f9f7 267 }
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 return status;
<> 144:ef7eb2e8f9f7 270 }
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 void LPUART_TransferAbortSendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle)
<> 144:ef7eb2e8f9f7 273 {
<> 144:ef7eb2e8f9f7 274 assert(handle->txEdmaHandle);
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 /* Disable LPUART TX EDMA. */
<> 144:ef7eb2e8f9f7 277 LPUART_EnableTxDMA(base, false);
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 /* Stop transfer. */
<> 144:ef7eb2e8f9f7 280 EDMA_AbortTransfer(handle->txEdmaHandle);
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 handle->txState = kLPUART_TxIdle;
<> 144:ef7eb2e8f9f7 283 }
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 void LPUART_TransferAbortReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle)
<> 144:ef7eb2e8f9f7 286 {
<> 144:ef7eb2e8f9f7 287 assert(handle->rxEdmaHandle);
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 /* Disable LPUART RX EDMA. */
<> 144:ef7eb2e8f9f7 290 LPUART_EnableRxDMA(base, false);
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 /* Stop transfer. */
<> 144:ef7eb2e8f9f7 293 EDMA_AbortTransfer(handle->rxEdmaHandle);
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 handle->rxState = kLPUART_RxIdle;
<> 144:ef7eb2e8f9f7 296 }
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 status_t LPUART_TransferGetReceiveCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count)
<> 144:ef7eb2e8f9f7 299 {
<> 144:ef7eb2e8f9f7 300 assert(handle->rxEdmaHandle);
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 if (kLPUART_RxIdle == handle->rxState)
<> 144:ef7eb2e8f9f7 303 {
<> 144:ef7eb2e8f9f7 304 return kStatus_NoTransferInProgress;
<> 144:ef7eb2e8f9f7 305 }
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 if (!count)
<> 144:ef7eb2e8f9f7 308 {
<> 144:ef7eb2e8f9f7 309 return kStatus_InvalidArgument;
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 *count = handle->rxDataSizeAll - EDMA_GetRemainingBytes(handle->rxEdmaHandle->base, handle->rxEdmaHandle->channel);
<> 144:ef7eb2e8f9f7 313
<> 144:ef7eb2e8f9f7 314 return kStatus_Success;
<> 144:ef7eb2e8f9f7 315 }
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 status_t LPUART_TransferGetSendCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count)
<> 144:ef7eb2e8f9f7 318 {
<> 144:ef7eb2e8f9f7 319 assert(handle->txEdmaHandle);
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 if (kLPUART_TxIdle == handle->txState)
<> 144:ef7eb2e8f9f7 322 {
<> 144:ef7eb2e8f9f7 323 return kStatus_NoTransferInProgress;
<> 144:ef7eb2e8f9f7 324 }
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 if (!count)
<> 144:ef7eb2e8f9f7 327 {
<> 144:ef7eb2e8f9f7 328 return kStatus_InvalidArgument;
<> 144:ef7eb2e8f9f7 329 }
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 *count = handle->txDataSizeAll - EDMA_GetRemainingBytes(handle->txEdmaHandle->base, handle->txEdmaHandle->channel);
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 return kStatus_Success;
<> 144:ef7eb2e8f9f7 334 }