Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_crc.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 #ifndef _FSL_CRC_H_
<> 144:ef7eb2e8f9f7 32 #define _FSL_CRC_H_
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include "fsl_common.h"
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /*!
<> 144:ef7eb2e8f9f7 37 * @addtogroup crc_driver
<> 144:ef7eb2e8f9f7 38 * @{
<> 144:ef7eb2e8f9f7 39 */
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 /*! @file */
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /*******************************************************************************
<> 144:ef7eb2e8f9f7 44 * Definitions
<> 144:ef7eb2e8f9f7 45 ******************************************************************************/
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /*! @name Driver version */
<> 144:ef7eb2e8f9f7 48 /*@{*/
<> 144:ef7eb2e8f9f7 49 /*! @brief CRC driver version. Version 2.0.0. */
<> 144:ef7eb2e8f9f7 50 #define FSL_CRC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
<> 144:ef7eb2e8f9f7 51 /*@}*/
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /*! @internal @brief Has data register with name CRC. */
<> 144:ef7eb2e8f9f7 54 #if defined(FSL_FEATURE_CRC_HAS_CRC_REG) && FSL_FEATURE_CRC_HAS_CRC_REG
<> 144:ef7eb2e8f9f7 55 #define DATA CRC
<> 144:ef7eb2e8f9f7 56 #define DATALL CRCLL
<> 144:ef7eb2e8f9f7 57 #endif
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 #ifndef CRC_DRIVER_CUSTOM_DEFAULTS
<> 144:ef7eb2e8f9f7 60 /*! @brief Default configuration structure filled by CRC_GetDefaultConfig(). Use CRC16-CCIT-FALSE as defeault. */
<> 144:ef7eb2e8f9f7 61 #define CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT 1
<> 144:ef7eb2e8f9f7 62 #endif
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /*! @brief CRC bit width */
<> 144:ef7eb2e8f9f7 65 typedef enum _crc_bits
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 kCrcBits16 = 0U, /*!< Generate 16-bit CRC code */
<> 144:ef7eb2e8f9f7 68 kCrcBits32 = 1U /*!< Generate 32-bit CRC code */
<> 144:ef7eb2e8f9f7 69 } crc_bits_t;
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 /*! @brief CRC result type */
<> 144:ef7eb2e8f9f7 72 typedef enum _crc_result
<> 144:ef7eb2e8f9f7 73 {
<> 144:ef7eb2e8f9f7 74 kCrcFinalChecksum = 0U, /*!< CRC data register read value is the final checksum.
<> 144:ef7eb2e8f9f7 75 Reflect out and final xor protocol features are applied. */
<> 144:ef7eb2e8f9f7 76 kCrcIntermediateChecksum = 1U /*!< CRC data register read value is intermediate checksum (raw value).
<> 144:ef7eb2e8f9f7 77 Reflect out and final xor protocol feature are not applied.
<> 144:ef7eb2e8f9f7 78 Intermediate checksum can be used as a seed for CRC_Init()
<> 144:ef7eb2e8f9f7 79 to continue adding data to this checksum. */
<> 144:ef7eb2e8f9f7 80 } crc_result_t;
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /*!
<> 144:ef7eb2e8f9f7 83 * @brief CRC protocol configuration.
<> 144:ef7eb2e8f9f7 84 *
<> 144:ef7eb2e8f9f7 85 * This structure holds the configuration for the CRC protocol.
<> 144:ef7eb2e8f9f7 86 *
<> 144:ef7eb2e8f9f7 87 */
<> 144:ef7eb2e8f9f7 88 typedef struct _crc_config
<> 144:ef7eb2e8f9f7 89 {
<> 144:ef7eb2e8f9f7 90 uint32_t polynomial; /*!< CRC Polynomial, MSBit first.
<> 144:ef7eb2e8f9f7 91 Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1 */
<> 144:ef7eb2e8f9f7 92 uint32_t seed; /*!< Starting checksum value */
<> 144:ef7eb2e8f9f7 93 bool reflectIn; /*!< Reflect bits on input. */
<> 144:ef7eb2e8f9f7 94 bool reflectOut; /*!< Reflect bits on output. */
<> 144:ef7eb2e8f9f7 95 bool complementChecksum; /*!< True if the result shall be complement of the actual checksum. */
<> 144:ef7eb2e8f9f7 96 crc_bits_t crcBits; /*!< Selects 16- or 32- bit CRC protocol. */
<> 144:ef7eb2e8f9f7 97 crc_result_t crcResult; /*!< Selects final or intermediate checksum return from CRC_Get16bitResult() or
<> 144:ef7eb2e8f9f7 98 CRC_Get32bitResult() */
<> 144:ef7eb2e8f9f7 99 } crc_config_t;
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 /*******************************************************************************
<> 144:ef7eb2e8f9f7 102 * API
<> 144:ef7eb2e8f9f7 103 ******************************************************************************/
<> 144:ef7eb2e8f9f7 104 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 105 extern "C" {
<> 144:ef7eb2e8f9f7 106 #endif
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 /*!
<> 144:ef7eb2e8f9f7 109 * @brief Enables and configures the CRC peripheral module.
<> 144:ef7eb2e8f9f7 110 *
<> 144:ef7eb2e8f9f7 111 * This functions enables the clock gate in the Kinetis SIM module for the CRC peripheral.
<> 144:ef7eb2e8f9f7 112 * It also configures the CRC module and starts checksum computation by writing the seed.
<> 144:ef7eb2e8f9f7 113 *
<> 144:ef7eb2e8f9f7 114 * @param base CRC peripheral address.
<> 144:ef7eb2e8f9f7 115 * @param config CRC module configuration structure
<> 144:ef7eb2e8f9f7 116 */
<> 144:ef7eb2e8f9f7 117 void CRC_Init(CRC_Type *base, const crc_config_t *config);
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /*!
<> 144:ef7eb2e8f9f7 120 * @brief Disables the CRC peripheral module.
<> 144:ef7eb2e8f9f7 121 *
<> 144:ef7eb2e8f9f7 122 * This functions disables the clock gate in the Kinetis SIM module for the CRC peripheral.
<> 144:ef7eb2e8f9f7 123 *
<> 144:ef7eb2e8f9f7 124 * @param base CRC peripheral address.
<> 144:ef7eb2e8f9f7 125 */
<> 144:ef7eb2e8f9f7 126 static inline void CRC_Deinit(CRC_Type *base)
<> 144:ef7eb2e8f9f7 127 {
<> 144:ef7eb2e8f9f7 128 /* gate clock */
<> 144:ef7eb2e8f9f7 129 CLOCK_DisableClock(kCLOCK_Crc0);
<> 144:ef7eb2e8f9f7 130 }
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /*!
<> 144:ef7eb2e8f9f7 133 * @brief Loads default values to CRC protocol configuration structure.
<> 144:ef7eb2e8f9f7 134 *
<> 144:ef7eb2e8f9f7 135 * Loads default values to CRC protocol configuration structure. The default values are:
<> 144:ef7eb2e8f9f7 136 * @code
<> 144:ef7eb2e8f9f7 137 * config->polynomial = 0x1021;
<> 144:ef7eb2e8f9f7 138 * config->seed = 0xFFFF;
<> 144:ef7eb2e8f9f7 139 * config->reflectIn = false;
<> 144:ef7eb2e8f9f7 140 * config->reflectOut = false;
<> 144:ef7eb2e8f9f7 141 * config->complementChecksum = false;
<> 144:ef7eb2e8f9f7 142 * config->crcBits = kCrcBits16;
<> 144:ef7eb2e8f9f7 143 * config->crcResult = kCrcFinalChecksum;
<> 144:ef7eb2e8f9f7 144 * @endcode
<> 144:ef7eb2e8f9f7 145 *
<> 144:ef7eb2e8f9f7 146 * @param config CRC protocol configuration structure
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148 void CRC_GetDefaultConfig(crc_config_t *config);
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /*!
<> 144:ef7eb2e8f9f7 151 * @brief Writes data to the CRC module.
<> 144:ef7eb2e8f9f7 152 *
<> 144:ef7eb2e8f9f7 153 * Writes input data buffer bytes to CRC data register.
<> 144:ef7eb2e8f9f7 154 * The configured type of transpose is applied.
<> 144:ef7eb2e8f9f7 155 *
<> 144:ef7eb2e8f9f7 156 * @param base CRC peripheral address.
<> 144:ef7eb2e8f9f7 157 * @param data Input data stream, MSByte in data[0].
<> 144:ef7eb2e8f9f7 158 * @param dataSize Size in bytes of the input data buffer.
<> 144:ef7eb2e8f9f7 159 */
<> 144:ef7eb2e8f9f7 160 void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize);
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /*!
<> 144:ef7eb2e8f9f7 163 * @brief Reads 32-bit checksum from the CRC module.
<> 144:ef7eb2e8f9f7 164 *
<> 144:ef7eb2e8f9f7 165 * Reads CRC data register (intermediate or final checksum).
<> 144:ef7eb2e8f9f7 166 * The configured type of transpose and complement are applied.
<> 144:ef7eb2e8f9f7 167 *
<> 144:ef7eb2e8f9f7 168 * @param base CRC peripheral address.
<> 144:ef7eb2e8f9f7 169 * @return intermediate or final 32-bit checksum, after configured transpose and complement operations.
<> 144:ef7eb2e8f9f7 170 */
<> 144:ef7eb2e8f9f7 171 static inline uint32_t CRC_Get32bitResult(CRC_Type *base)
<> 144:ef7eb2e8f9f7 172 {
<> 144:ef7eb2e8f9f7 173 return base->DATA;
<> 144:ef7eb2e8f9f7 174 }
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 /*!
<> 144:ef7eb2e8f9f7 177 * @brief Reads 16-bit checksum from the CRC module.
<> 144:ef7eb2e8f9f7 178 *
<> 144:ef7eb2e8f9f7 179 * Reads CRC data register (intermediate or final checksum).
<> 144:ef7eb2e8f9f7 180 * The configured type of transpose and complement are applied.
<> 144:ef7eb2e8f9f7 181 *
<> 144:ef7eb2e8f9f7 182 * @param base CRC peripheral address.
<> 144:ef7eb2e8f9f7 183 * @return intermediate or final 16-bit checksum, after configured transpose and complement operations.
<> 144:ef7eb2e8f9f7 184 */
<> 144:ef7eb2e8f9f7 185 uint16_t CRC_Get16bitResult(CRC_Type *base);
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 188 }
<> 144:ef7eb2e8f9f7 189 #endif
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /*!
<> 144:ef7eb2e8f9f7 192 *@}
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 #endif /* _FSL_CRC_H_ */