Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/PeripheralNames.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #ifndef MBED_PERIPHERALNAMES_H
<> 144:ef7eb2e8f9f7 17 #define MBED_PERIPHERALNAMES_H
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 22 extern "C" {
<> 144:ef7eb2e8f9f7 23 #endif
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 typedef enum {
<> 144:ef7eb2e8f9f7 26 OSC32KCLK = 0,
<> 144:ef7eb2e8f9f7 27 RTC_CLKIN = 2
<> 144:ef7eb2e8f9f7 28 } RTCName;
<> 144:ef7eb2e8f9f7 29
<> 144:ef7eb2e8f9f7 30 typedef enum {
<> 144:ef7eb2e8f9f7 31 UART_0 = (int)UART0_BASE,
<> 144:ef7eb2e8f9f7 32 UART_1 = (int)UART1_BASE,
<> 144:ef7eb2e8f9f7 33 UART_2 = (int)UART2_BASE
<> 144:ef7eb2e8f9f7 34 } UARTName;
<> 144:ef7eb2e8f9f7 35 #define STDIO_UART_TX USBTX
<> 144:ef7eb2e8f9f7 36 #define STDIO_UART_RX USBRX
<> 144:ef7eb2e8f9f7 37 #define STDIO_UART UART_0
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 typedef enum {
<> 144:ef7eb2e8f9f7 40 I2C_0 = (int)I2C0_BASE,
<> 144:ef7eb2e8f9f7 41 I2C_1 = (int)I2C1_BASE,
<> 144:ef7eb2e8f9f7 42 } I2CName;
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #define TPM_SHIFT 8
<> 144:ef7eb2e8f9f7 45 typedef enum {
<> 144:ef7eb2e8f9f7 46 PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
<> 144:ef7eb2e8f9f7 47 PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
<> 144:ef7eb2e8f9f7 48 PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
<> 144:ef7eb2e8f9f7 49 PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
<> 144:ef7eb2e8f9f7 50 PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
<> 144:ef7eb2e8f9f7 51 PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
<> 144:ef7eb2e8f9f7 54 PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
<> 144:ef7eb2e8f9f7 57 PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
<> 144:ef7eb2e8f9f7 58 } PWMName;
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 #define CHANNELS_A_SHIFT 5
<> 144:ef7eb2e8f9f7 61 typedef enum {
<> 144:ef7eb2e8f9f7 62 ADC0_SE0 = 0,
<> 144:ef7eb2e8f9f7 63 ADC0_SE3 = 3,
<> 144:ef7eb2e8f9f7 64 ADC0_SE4a = (1 << CHANNELS_A_SHIFT) | (4),
<> 144:ef7eb2e8f9f7 65 ADC0_SE4b = 4,
<> 144:ef7eb2e8f9f7 66 ADC0_SE5b = 5,
<> 144:ef7eb2e8f9f7 67 ADC0_SE6b = 6,
<> 144:ef7eb2e8f9f7 68 ADC0_SE7a = (1 << CHANNELS_A_SHIFT) | (7),
<> 144:ef7eb2e8f9f7 69 ADC0_SE7b = 7,
<> 144:ef7eb2e8f9f7 70 ADC0_SE8 = 8,
<> 144:ef7eb2e8f9f7 71 ADC0_SE9 = 9,
<> 144:ef7eb2e8f9f7 72 ADC0_SE11 = 11,
<> 144:ef7eb2e8f9f7 73 ADC0_SE12 = 12,
<> 144:ef7eb2e8f9f7 74 ADC0_SE13 = 13,
<> 144:ef7eb2e8f9f7 75 ADC0_SE14 = 14,
<> 144:ef7eb2e8f9f7 76 ADC0_SE15 = 15,
<> 144:ef7eb2e8f9f7 77 ADC0_SE23 = 23
<> 144:ef7eb2e8f9f7 78 } ADCName;
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 typedef enum {
<> 144:ef7eb2e8f9f7 81 DAC_0 = 0
<> 144:ef7eb2e8f9f7 82 } DACName;
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 typedef enum {
<> 144:ef7eb2e8f9f7 86 SPI_0 = (int)SPI0_BASE,
<> 144:ef7eb2e8f9f7 87 SPI_1 = (int)SPI1_BASE,
<> 144:ef7eb2e8f9f7 88 } SPIName;
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 92 }
<> 144:ef7eb2e8f9f7 93 #endif
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 #endif