Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/spi_api.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "spi_api.h"
<> 144:ef7eb2e8f9f7 17
<> 144:ef7eb2e8f9f7 18 #include <math.h>
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 21 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 22 #include "clk_freqs.h"
<> 144:ef7eb2e8f9f7 23 #include "PeripheralPins.h"
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
<> 144:ef7eb2e8f9f7 26 // determine the SPI to use
<> 144:ef7eb2e8f9f7 27 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 28 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 29 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 30 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 31 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
<> 144:ef7eb2e8f9f7 32 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 obj->spi = (SPI_Type*)pinmap_merge(spi_data, spi_cntl);
<> 144:ef7eb2e8f9f7 35 MBED_ASSERT((int)obj->spi != NC);
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 // enable power and clocking
<> 144:ef7eb2e8f9f7 38 switch ((int)obj->spi) {
<> 144:ef7eb2e8f9f7 39 case SPI_0: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 22; break;
<> 144:ef7eb2e8f9f7 40 case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break;
<> 144:ef7eb2e8f9f7 41 }
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 // enable SPI
<> 144:ef7eb2e8f9f7 44 obj->spi->C1 |= SPI_C1_SPE_MASK;
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 // pin out the spi pins
<> 144:ef7eb2e8f9f7 47 pinmap_pinout(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 48 pinmap_pinout(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 49 pinmap_pinout(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 50 if (ssel != NC) {
<> 144:ef7eb2e8f9f7 51 pinmap_pinout(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 52 }
<> 144:ef7eb2e8f9f7 53 }
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 void spi_free(spi_t *obj) {
<> 144:ef7eb2e8f9f7 56 // [TODO]
<> 144:ef7eb2e8f9f7 57 }
<> 144:ef7eb2e8f9f7 58 void spi_format(spi_t *obj, int bits, int mode, int slave) {
<> 144:ef7eb2e8f9f7 59 MBED_ASSERT(bits == 8);
<> 144:ef7eb2e8f9f7 60 MBED_ASSERT((mode >= 0) && (mode <= 3));
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 uint8_t polarity = (mode & 0x2) ? 1 : 0;
<> 144:ef7eb2e8f9f7 63 uint8_t phase = (mode & 0x1) ? 1 : 0;
<> 144:ef7eb2e8f9f7 64 uint8_t c1_data = ((!slave) << 4) | (polarity << 3) | (phase << 2);
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 // clear MSTR, CPOL and CPHA bits
<> 144:ef7eb2e8f9f7 67 obj->spi->C1 &= ~(0x7 << 2);
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 // write new value
<> 144:ef7eb2e8f9f7 70 obj->spi->C1 |= c1_data;
<> 144:ef7eb2e8f9f7 71 }
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 void spi_frequency(spi_t *obj, int hz) {
<> 144:ef7eb2e8f9f7 74 uint32_t error = 0;
<> 144:ef7eb2e8f9f7 75 uint32_t p_error = 0xffffffff;
<> 144:ef7eb2e8f9f7 76 uint32_t ref = 0;
<> 144:ef7eb2e8f9f7 77 uint8_t spr = 0;
<> 144:ef7eb2e8f9f7 78 uint8_t ref_spr = 0;
<> 144:ef7eb2e8f9f7 79 uint8_t ref_prescaler = 0;
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 // bus clk
<> 144:ef7eb2e8f9f7 82 uint32_t PCLK = bus_frequency();
<> 144:ef7eb2e8f9f7 83 uint8_t prescaler = 1;
<> 144:ef7eb2e8f9f7 84 uint8_t divisor = 2;
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 for (prescaler = 1; prescaler <= 8; prescaler++) {
<> 144:ef7eb2e8f9f7 87 divisor = 2;
<> 144:ef7eb2e8f9f7 88 for (spr = 0; spr <= 8; spr++, divisor *= 2) {
<> 144:ef7eb2e8f9f7 89 ref = PCLK / (prescaler*divisor);
<> 144:ef7eb2e8f9f7 90 if (ref > (uint32_t)hz)
<> 144:ef7eb2e8f9f7 91 continue;
<> 144:ef7eb2e8f9f7 92 error = hz - ref;
<> 144:ef7eb2e8f9f7 93 if (error < p_error) {
<> 144:ef7eb2e8f9f7 94 ref_spr = spr;
<> 144:ef7eb2e8f9f7 95 ref_prescaler = prescaler - 1;
<> 144:ef7eb2e8f9f7 96 p_error = error;
<> 144:ef7eb2e8f9f7 97 }
<> 144:ef7eb2e8f9f7 98 }
<> 144:ef7eb2e8f9f7 99 }
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 // set SPPR and SPR
<> 144:ef7eb2e8f9f7 102 obj->spi->BR = ((ref_prescaler & 0x7) << 4) | (ref_spr & 0xf);
<> 144:ef7eb2e8f9f7 103 }
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 static inline int spi_writeable(spi_t * obj) {
<> 144:ef7eb2e8f9f7 106 return (obj->spi->S & SPI_S_SPTEF_MASK) ? 1 : 0;
<> 144:ef7eb2e8f9f7 107 }
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 static inline int spi_readable(spi_t * obj) {
<> 144:ef7eb2e8f9f7 110 return (obj->spi->S & SPI_S_SPRF_MASK) ? 1 : 0;
<> 144:ef7eb2e8f9f7 111 }
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 int spi_master_write(spi_t *obj, int value) {
<> 144:ef7eb2e8f9f7 114 // wait tx buffer empty
<> 144:ef7eb2e8f9f7 115 while(!spi_writeable(obj));
<> 144:ef7eb2e8f9f7 116 obj->spi->D = (value & 0xff);
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 // wait rx buffer full
<> 144:ef7eb2e8f9f7 119 while (!spi_readable(obj));
<> 144:ef7eb2e8f9f7 120 return obj->spi->D & 0xff;
<> 144:ef7eb2e8f9f7 121 }
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 int spi_slave_receive(spi_t *obj) {
<> 144:ef7eb2e8f9f7 124 return spi_readable(obj);
<> 144:ef7eb2e8f9f7 125 }
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 int spi_slave_read(spi_t *obj) {
<> 144:ef7eb2e8f9f7 128 return obj->spi->D;
<> 144:ef7eb2e8f9f7 129 }
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 void spi_slave_write(spi_t *obj, int value) {
<> 144:ef7eb2e8f9f7 132 while (!spi_writeable(obj));
<> 144:ef7eb2e8f9f7 133 obj->spi->D = value;
<> 144:ef7eb2e8f9f7 134 }