added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /****************************************************************************
<> 144:ef7eb2e8f9f7 2 * $Id:: power_api.h 6249 2011-01-25 19:23:47Z usb01267 $
<> 144:ef7eb2e8f9f7 3 * Project: NXP LPC11Uxx software example
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Description:
<> 144:ef7eb2e8f9f7 6 * Power API Header File for NXP LPC11Uxx Device Series
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 ****************************************************************************
<> 144:ef7eb2e8f9f7 9 * Software that is described herein is for illustrative purposes only
<> 144:ef7eb2e8f9f7 10 * which provides customers with programming information regarding the
<> 144:ef7eb2e8f9f7 11 * products. This software is supplied "AS IS" without any warranties.
<> 144:ef7eb2e8f9f7 12 * NXP Semiconductors assumes no responsibility or liability for the
<> 144:ef7eb2e8f9f7 13 * use of the software, conveys no license or title under any patent,
<> 144:ef7eb2e8f9f7 14 * copyright, or mask work right to the product. NXP Semiconductors
<> 144:ef7eb2e8f9f7 15 * reserves the right to make changes in the software without
<> 144:ef7eb2e8f9f7 16 * notification. NXP Semiconductors also make no representation or
<> 144:ef7eb2e8f9f7 17 * warranty that such application will be suitable for the specified
<> 144:ef7eb2e8f9f7 18 * use without further testing or modification.
<> 144:ef7eb2e8f9f7 19 ****************************************************************************/
<> 144:ef7eb2e8f9f7 20 #ifndef __LPC11UXX_POWER_API_H__
<> 144:ef7eb2e8f9f7 21 #define __LPC11UXX_POWER_API_H__
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 24 extern "C" {
<> 144:ef7eb2e8f9f7 25 #endif
<> 144:ef7eb2e8f9f7 26
<> 144:ef7eb2e8f9f7 27 #define PWRROMD_PRESENT
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 typedef struct _PWRD {
<> 144:ef7eb2e8f9f7 30 void (*set_pll)(unsigned int cmd[], unsigned int resp[]);
<> 144:ef7eb2e8f9f7 31 void (*set_power)(unsigned int cmd[], unsigned int resp[]);
<> 144:ef7eb2e8f9f7 32 } PWRD;
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 typedef struct _ROM {
<> 144:ef7eb2e8f9f7 35 #ifdef USBROMD_PRESENT
<> 144:ef7eb2e8f9f7 36 const USB * pUSBD;
<> 144:ef7eb2e8f9f7 37 #else
<> 144:ef7eb2e8f9f7 38 const unsigned p_usbd;
<> 144:ef7eb2e8f9f7 39 #endif /* USBROMD_PRESENT */
<> 144:ef7eb2e8f9f7 40 const unsigned p_clib;
<> 144:ef7eb2e8f9f7 41 const unsigned p_cand;
<> 144:ef7eb2e8f9f7 42 #ifdef PWRROMD_PRESENT
<> 144:ef7eb2e8f9f7 43 const PWRD * pPWRD;
<> 144:ef7eb2e8f9f7 44 #else
<> 144:ef7eb2e8f9f7 45 const unsigned p_pwrd;
<> 144:ef7eb2e8f9f7 46 #endif /* PWRROMD_PRESENT */
<> 144:ef7eb2e8f9f7 47 const unsigned p_dev1;
<> 144:ef7eb2e8f9f7 48 const unsigned p_dev2;
<> 144:ef7eb2e8f9f7 49 const unsigned p_dev3;
<> 144:ef7eb2e8f9f7 50 const unsigned p_dev4;
<> 144:ef7eb2e8f9f7 51 } ROM;
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 //PLL setup related definitions
<> 144:ef7eb2e8f9f7 54 #define CPU_FREQ_EQU 0 //main PLL freq must be equal to the specified
<> 144:ef7eb2e8f9f7 55 #define CPU_FREQ_LTE 1 //main PLL freq must be less than or equal the specified
<> 144:ef7eb2e8f9f7 56 #define CPU_FREQ_GTE 2 //main PLL freq must be greater than or equal the specified
<> 144:ef7eb2e8f9f7 57 #define CPU_FREQ_APPROX 3 //main PLL freq must be as close as possible the specified
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 #define PLL_CMD_SUCCESS 0 //PLL setup successfully found
<> 144:ef7eb2e8f9f7 60 #define PLL_INVALID_FREQ 1 //specified freq out of range (either input or output)
<> 144:ef7eb2e8f9f7 61 #define PLL_INVALID_MODE 2 //invalid mode (see above for valid) specified
<> 144:ef7eb2e8f9f7 62 #define PLL_FREQ_NOT_FOUND 3 //specified freq not found under specified conditions
<> 144:ef7eb2e8f9f7 63 #define PLL_NOT_LOCKED 4 //PLL not locked => no changes to the PLL setup
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 //power setup elated definitions
<> 144:ef7eb2e8f9f7 66 #define PARAM_DEFAULT 0 //default power settings (voltage regulator, flash interface)
<> 144:ef7eb2e8f9f7 67 #define PARAM_CPU_PERFORMANCE 1 //setup for maximum CPU performance (higher current, more computation)
<> 144:ef7eb2e8f9f7 68 #define PARAM_EFFICIENCY 2 //balanced setting (power vs CPU performance)
<> 144:ef7eb2e8f9f7 69 #define PARAM_LOW_CURRENT 3 //lowest active current, lowest CPU performance
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 #define PARAM_CMD_SUCCESS 0 //power setting successfully found
<> 144:ef7eb2e8f9f7 72 #define PARAM_INVALID_FREQ 1 //specified freq out of range (=0 or > 50 MHz)
<> 144:ef7eb2e8f9f7 73 #define PARAM_INVALID_MODE 2 //specified mode not valid (see above for valid)
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 #define MAX_CLOCK_KHZ_PARAM 50000
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 78 }
<> 144:ef7eb2e8f9f7 79 #endif
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 #endif /* __LPC11UXX_POWER_API_H__ */
<> 144:ef7eb2e8f9f7 82