Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/system_MK64F12.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 ** ###################################################################
<> 144:ef7eb2e8f9f7 3 ** Processors: MK64FN1M0VDC12
<> 144:ef7eb2e8f9f7 4 ** MK64FN1M0VLL12
<> 144:ef7eb2e8f9f7 5 ** MK64FN1M0VLQ12
<> 144:ef7eb2e8f9f7 6 ** MK64FN1M0VMD12
<> 144:ef7eb2e8f9f7 7 ** MK64FX512VDC12
<> 144:ef7eb2e8f9f7 8 ** MK64FX512VLL12
<> 144:ef7eb2e8f9f7 9 ** MK64FX512VLQ12
<> 144:ef7eb2e8f9f7 10 ** MK64FX512VMD12
<> 144:ef7eb2e8f9f7 11 **
<> 144:ef7eb2e8f9f7 12 ** Compilers: Keil ARM C/C++ Compiler
<> 144:ef7eb2e8f9f7 13 ** Freescale C/C++ for Embedded ARM
<> 144:ef7eb2e8f9f7 14 ** GNU C Compiler
<> 144:ef7eb2e8f9f7 15 ** IAR ANSI C/C++ Compiler for ARM
<> 144:ef7eb2e8f9f7 16 **
<> 144:ef7eb2e8f9f7 17 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
<> 144:ef7eb2e8f9f7 18 ** Version: rev. 2.8, 2015-02-19
<> 144:ef7eb2e8f9f7 19 ** Build: b151216
<> 144:ef7eb2e8f9f7 20 **
<> 144:ef7eb2e8f9f7 21 ** Abstract:
<> 144:ef7eb2e8f9f7 22 ** Provides a system configuration function and a global variable that
<> 144:ef7eb2e8f9f7 23 ** contains the system frequency. It configures the device and initializes
<> 144:ef7eb2e8f9f7 24 ** the oscillator (PLL) that is part of the microcontroller device.
<> 144:ef7eb2e8f9f7 25 **
<> 144:ef7eb2e8f9f7 26 ** Copyright (c) 2015 Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 27 ** All rights reserved.
<> 144:ef7eb2e8f9f7 28 **
<> 144:ef7eb2e8f9f7 29 ** Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 30 ** are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 31 **
<> 144:ef7eb2e8f9f7 32 ** o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 33 ** of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 34 **
<> 144:ef7eb2e8f9f7 35 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 36 ** list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 37 ** other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 38 **
<> 144:ef7eb2e8f9f7 39 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 40 ** contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 41 ** software without specific prior written permission.
<> 144:ef7eb2e8f9f7 42 **
<> 144:ef7eb2e8f9f7 43 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 44 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 45 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 46 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 47 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 48 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 49 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 50 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 51 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 52 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 53 **
<> 144:ef7eb2e8f9f7 54 ** http: www.freescale.com
<> 144:ef7eb2e8f9f7 55 ** mail: support@freescale.com
<> 144:ef7eb2e8f9f7 56 **
<> 144:ef7eb2e8f9f7 57 ** Revisions:
<> 144:ef7eb2e8f9f7 58 ** - rev. 1.0 (2013-08-12)
<> 144:ef7eb2e8f9f7 59 ** Initial version.
<> 144:ef7eb2e8f9f7 60 ** - rev. 2.0 (2013-10-29)
<> 144:ef7eb2e8f9f7 61 ** Register accessor macros added to the memory map.
<> 144:ef7eb2e8f9f7 62 ** Symbols for Processor Expert memory map compatibility added to the memory map.
<> 144:ef7eb2e8f9f7 63 ** Startup file for gcc has been updated according to CMSIS 3.2.
<> 144:ef7eb2e8f9f7 64 ** System initialization updated.
<> 144:ef7eb2e8f9f7 65 ** MCG - registers updated.
<> 144:ef7eb2e8f9f7 66 ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
<> 144:ef7eb2e8f9f7 67 ** - rev. 2.1 (2013-10-30)
<> 144:ef7eb2e8f9f7 68 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
<> 144:ef7eb2e8f9f7 69 ** - rev. 2.2 (2013-12-09)
<> 144:ef7eb2e8f9f7 70 ** DMA - EARS register removed.
<> 144:ef7eb2e8f9f7 71 ** AIPS0, AIPS1 - MPRA register updated.
<> 144:ef7eb2e8f9f7 72 ** - rev. 2.3 (2014-01-24)
<> 144:ef7eb2e8f9f7 73 ** Update according to reference manual rev. 2
<> 144:ef7eb2e8f9f7 74 ** ENET, MCG, MCM, SIM, USB - registers updated
<> 144:ef7eb2e8f9f7 75 ** - rev. 2.4 (2014-02-10)
<> 144:ef7eb2e8f9f7 76 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
<> 144:ef7eb2e8f9f7 77 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
<> 144:ef7eb2e8f9f7 78 ** - rev. 2.5 (2014-02-10)
<> 144:ef7eb2e8f9f7 79 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
<> 144:ef7eb2e8f9f7 80 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
<> 144:ef7eb2e8f9f7 81 ** Module access macro module_BASES replaced by module_BASE_PTRS.
<> 144:ef7eb2e8f9f7 82 ** - rev. 2.6 (2014-08-28)
<> 144:ef7eb2e8f9f7 83 ** Update of system files - default clock configuration changed.
<> 144:ef7eb2e8f9f7 84 ** Update of startup files - possibility to override DefaultISR added.
<> 144:ef7eb2e8f9f7 85 ** - rev. 2.7 (2014-10-14)
<> 144:ef7eb2e8f9f7 86 ** Interrupt INT_LPTimer renamed to INT_LPTMR0, interrupt INT_Watchdog renamed to INT_WDOG_EWM.
<> 144:ef7eb2e8f9f7 87 ** - rev. 2.8 (2015-02-19)
<> 144:ef7eb2e8f9f7 88 ** Renamed interrupt vector LLW to LLWU.
<> 144:ef7eb2e8f9f7 89 **
<> 144:ef7eb2e8f9f7 90 ** ###################################################################
<> 144:ef7eb2e8f9f7 91 */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /*!
<> 144:ef7eb2e8f9f7 94 * @file MK64F12
<> 144:ef7eb2e8f9f7 95 * @version 2.8
<> 144:ef7eb2e8f9f7 96 * @date 2015-02-19
<> 144:ef7eb2e8f9f7 97 * @brief Device specific configuration file for MK64F12 (header file)
<> 144:ef7eb2e8f9f7 98 *
<> 144:ef7eb2e8f9f7 99 * Provides a system configuration function and a global variable that contains
<> 144:ef7eb2e8f9f7 100 * the system frequency. It configures the device and initializes the oscillator
<> 144:ef7eb2e8f9f7 101 * (PLL) that is part of the microcontroller device.
<> 144:ef7eb2e8f9f7 102 */
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 #ifndef _SYSTEM_MK64F12_H_
<> 144:ef7eb2e8f9f7 105 #define _SYSTEM_MK64F12_H_ /**< Symbol preventing repeated inclusion */
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 108 extern "C" {
<> 144:ef7eb2e8f9f7 109 #endif
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 #include <stdint.h>
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 #ifndef DISABLE_WDOG
<> 144:ef7eb2e8f9f7 115 #define DISABLE_WDOG 1
<> 144:ef7eb2e8f9f7 116 #endif
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 #define CPU_XTAL_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz */
<> 144:ef7eb2e8f9f7 119 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
<> 144:ef7eb2e8f9f7 120 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
<> 144:ef7eb2e8f9f7 121 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
<> 144:ef7eb2e8f9f7 122 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 /* RTC oscillator setting */
<> 144:ef7eb2e8f9f7 125 /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */
<> 144:ef7eb2e8f9f7 126 #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /* Low power mode enable */
<> 144:ef7eb2e8f9f7 129 /* SMC_PMPROT: AVLP=1,ALLS=1,AVLLS=1 */
<> 144:ef7eb2e8f9f7 130 #define SYSTEM_SMC_PMPROT_VALUE 0x2AU /* SMC_PMPROT */
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 #define DEFAULT_SYSTEM_CLOCK 20971520u /* Default System clock value */
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 /**
<> 144:ef7eb2e8f9f7 136 * @brief System clock frequency (core clock)
<> 144:ef7eb2e8f9f7 137 *
<> 144:ef7eb2e8f9f7 138 * The system clock frequency supplied to the SysTick timer and the processor
<> 144:ef7eb2e8f9f7 139 * core clock. This variable can be used by the user application to setup the
<> 144:ef7eb2e8f9f7 140 * SysTick timer or configure other parameters. It may also be used by debugger to
<> 144:ef7eb2e8f9f7 141 * query the frequency of the debug timer or configure the trace clock speed
<> 144:ef7eb2e8f9f7 142 * SystemCoreClock is initialized with a correct predefined value.
<> 144:ef7eb2e8f9f7 143 */
<> 144:ef7eb2e8f9f7 144 extern uint32_t SystemCoreClock;
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /**
<> 144:ef7eb2e8f9f7 147 * @brief Setup the microcontroller system.
<> 144:ef7eb2e8f9f7 148 *
<> 144:ef7eb2e8f9f7 149 * Typically this function configures the oscillator (PLL) that is part of the
<> 144:ef7eb2e8f9f7 150 * microcontroller device. For systems with variable clock speed it also updates
<> 144:ef7eb2e8f9f7 151 * the variable SystemCoreClock. SystemInit is called from startup_device file.
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153 void SystemInit (void);
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /**
<> 144:ef7eb2e8f9f7 156 * @brief Updates the SystemCoreClock variable.
<> 144:ef7eb2e8f9f7 157 *
<> 144:ef7eb2e8f9f7 158 * It must be called whenever the core clock is changed during program
<> 144:ef7eb2e8f9f7 159 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
<> 144:ef7eb2e8f9f7 160 * the current core clock.
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162 void SystemCoreClockUpdate (void);
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 165 }
<> 144:ef7eb2e8f9f7 166 #endif
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 #endif /* _SYSTEM_MK64F12_H_ */