added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16
<> 144:ef7eb2e8f9f7 17 #ifndef _EFLASH_DRV_H
<> 144:ef7eb2e8f9f7 18 #define _EFLASH_DRV_H
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 #include "fcache_api.h"
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 extern "C" {
<> 144:ef7eb2e8f9f7 25 #else
<> 144:ef7eb2e8f9f7 26 #include <stdio.h>
<> 144:ef7eb2e8f9f7 27 #endif
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 /* eFLASH Address Map */
<> 144:ef7eb2e8f9f7 30 #define SYS_EFLASH_BASE 0x40009000
<> 144:ef7eb2e8f9f7 31 #define SYS_EFLASH_IRQ_SET_STATUS (SYS_EFLASH_BASE + 0x008)
<> 144:ef7eb2e8f9f7 32 #define SYS_EFLASH_IRQ_CLR_STATUS (SYS_EFLASH_BASE + 0x008)
<> 144:ef7eb2e8f9f7 33 #define SYS_EFLASH_CTRL (SYS_EFLASH_BASE + 0x014)
<> 144:ef7eb2e8f9f7 34 #define SYS_EFLASH_STATUS (SYS_EFLASH_BASE + 0x018)
<> 144:ef7eb2e8f9f7 35 #define SYS_EFLASH_CONFIG0 (SYS_EFLASH_BASE + 0x01C)
<> 144:ef7eb2e8f9f7 36 #define SYS_EFLASH_WADDR (SYS_EFLASH_BASE + 0x028)
<> 144:ef7eb2e8f9f7 37 #define SYS_EFLASH_WDATA (SYS_EFLASH_BASE + 0x02C)
<> 144:ef7eb2e8f9f7 38 #define SYS_EFLASH_HWPARAMS0 (SYS_EFLASH_BASE + 0x034)
<> 144:ef7eb2e8f9f7 39 #define SYS_EFLASH_PIDR0 (SYS_EFLASH_BASE + 0xFE0)
<> 144:ef7eb2e8f9f7 40 #define SYS_EFLASH_PIDR1 (SYS_EFLASH_BASE + 0xFE4)
<> 144:ef7eb2e8f9f7 41 #define SYS_EFLASH_PIDR2 (SYS_EFLASH_BASE + 0xFE8)
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /* SYS_EFLASH_CTRL (RW): Flash Control Register */
<> 144:ef7eb2e8f9f7 44 #define EFLASH_WRITE 1 /* Write one word on eFlash */
<> 144:ef7eb2e8f9f7 45 #define EFLASH_ROW_WRITE (1 << 1) /* Write a row of eFlash */
<> 144:ef7eb2e8f9f7 46 #define EFLASH_ERASE (1 << 2) /* Erase one page of eFlash */
<> 144:ef7eb2e8f9f7 47 #define EFLASH_MASS_ERASE (1 << 3) /* Erases all pages of the eFlash*/
<> 144:ef7eb2e8f9f7 48 #define EFLASH_STOP (1 << 4) /* Stop any write erase operation */
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /* SYS_EFLASH_STATUS (RO): Status Register */
<> 144:ef7eb2e8f9f7 51 #define EFLASH_BUSY_MASK 1 /* EFlash Busy Mask */
<> 144:ef7eb2e8f9f7 52 #define EFLASH_BUSY 1 /* EFlash Busy */
<> 144:ef7eb2e8f9f7 53 #define EFLASH_LOCK_MASK (1 << 1) /* EFlash Lock Mask */
<> 144:ef7eb2e8f9f7 54 #define EFLASH_LOCK (1 << 1) /* EFlash Lock */
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /* SYS_EFLASH_HWPARAMS0 (RO): HW parameters */
<> 144:ef7eb2e8f9f7 57 #define EFLASH_FLASHSIZE 0x1F /* Flash Size */
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /* SYS_EFLASH_PIDR2 (RO): Flash Memory Information */
<> 144:ef7eb2e8f9f7 60 #define EFLASH_DES_1 0x7 /* JEP106 Id Mask */
<> 144:ef7eb2e8f9f7 61 #define EFLASH_JEDEC 0x8 /* JEDEC assigned val Mask */
<> 144:ef7eb2e8f9f7 62 #define EFLASH_REVISION 0xF0 /* Revision number */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /* Macros */
<> 144:ef7eb2e8f9f7 65 #define EFlash_Readl(reg) *(volatile unsigned int *)reg
<> 144:ef7eb2e8f9f7 66 #define EFlash_Writel(reg, val) *(volatile unsigned int *)reg = val;
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /* peripheral and component ID values */
<> 144:ef7eb2e8f9f7 69 #define FLS_PID4 0x14
<> 144:ef7eb2e8f9f7 70 #define FLS_PID5 0x00
<> 144:ef7eb2e8f9f7 71 #define FLS_PID6 0x00
<> 144:ef7eb2e8f9f7 72 #define FLS_PID7 0x00
<> 144:ef7eb2e8f9f7 73 #define FLS_PID0 0x30
<> 144:ef7eb2e8f9f7 74 #define FLS_PID1 0xB8
<> 144:ef7eb2e8f9f7 75 #define FLS_PID2 0x0B
<> 144:ef7eb2e8f9f7 76 #define FLS_PID3 0x00
<> 144:ef7eb2e8f9f7 77 #define FLS_CID0 0x0D
<> 144:ef7eb2e8f9f7 78 #define FLS_CID1 0xF0
<> 144:ef7eb2e8f9f7 79 #define FLS_CID2 0x05
<> 144:ef7eb2e8f9f7 80 #define FLS_CID3 0xB1
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /* Functions */
<> 144:ef7eb2e8f9f7 83 /* EFlash_DriverInitialize: eFlash Driver Initialize function */
<> 144:ef7eb2e8f9f7 84 void EFlash_DriverInitialize(void);
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 /* EFlash_ClockConfig: eFlash Clock Configuration */
<> 144:ef7eb2e8f9f7 87 void EFlash_ClockConfig(void);
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 /*
<> 144:ef7eb2e8f9f7 90 * EFlash_Erase: Erases flash banks
<> 144:ef7eb2e8f9f7 91 * Mode:
<> 144:ef7eb2e8f9f7 92 * 0 - erases bank 0
<> 144:ef7eb2e8f9f7 93 * 1 - erases bank 1
<> 144:ef7eb2e8f9f7 94 * 2 - erases bank 0 + info pages
<> 144:ef7eb2e8f9f7 95 * 3 - erases bank 1 + info pages
<> 144:ef7eb2e8f9f7 96 * 4 - erases bank 0 + 1
<> 144:ef7eb2e8f9f7 97 * 5 - erases bank 0 + 1 with info pages
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99 void EFlash_Erase(int mode);
<> 144:ef7eb2e8f9f7 100 /* EFlash_ErasePage: Erase a Page */
<> 144:ef7eb2e8f9f7 101 void EFlash_ErasePage(unsigned int waddr);
<> 144:ef7eb2e8f9f7 102 /*
<> 144:ef7eb2e8f9f7 103 * EFlash_Write: Write function
<> 144:ef7eb2e8f9f7 104 * Parameters:
<> 144:ef7eb2e8f9f7 105 * waddr - address in flash
<> 144:ef7eb2e8f9f7 106 * data - data to be written
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108 void EFlash_Write(unsigned int waddr, unsigned int data);
<> 144:ef7eb2e8f9f7 109 /*
<> 144:ef7eb2e8f9f7 110 * EFlash_WritePage: Write Page function
<> 144:ef7eb2e8f9f7 111 * Parameters:
<> 144:ef7eb2e8f9f7 112 * waddr - address in flash
<> 144:ef7eb2e8f9f7 113 * page_size - data to be written
<> 144:ef7eb2e8f9f7 114 * buf - buffer containing the data
<> 144:ef7eb2e8f9f7 115 */
<> 144:ef7eb2e8f9f7 116 int EFlash_WritePage(unsigned int waddr,
<> 144:ef7eb2e8f9f7 117 unsigned int page_size, unsigned char *buf);
<> 144:ef7eb2e8f9f7 118 /*
<> 144:ef7eb2e8f9f7 119 * EFlash_Read: Read function
<> 144:ef7eb2e8f9f7 120 * Parameters:
<> 144:ef7eb2e8f9f7 121 * waddr - address in flash
<> 144:ef7eb2e8f9f7 122 * Returns:
<> 144:ef7eb2e8f9f7 123 * the vaule read at address waddr
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125 unsigned int EFlash_Read(unsigned int waddr);
<> 144:ef7eb2e8f9f7 126 /*
<> 144:ef7eb2e8f9f7 127 * EFlash_Verify: Verifies if the eFlash has been written correctly.
<> 144:ef7eb2e8f9f7 128 * Parameters:
<> 144:ef7eb2e8f9f7 129 * waddr - address in flash
<> 144:ef7eb2e8f9f7 130 * page_size - data to be written
<> 144:ef7eb2e8f9f7 131 * buf - buffer containing the data
<> 144:ef7eb2e8f9f7 132 * Returns:
<> 144:ef7eb2e8f9f7 133 * (waddr+page_size) - OK or Failed Address
<> 144:ef7eb2e8f9f7 134 */
<> 144:ef7eb2e8f9f7 135 unsigned int EFlash_Verify(unsigned int waddr,
<> 144:ef7eb2e8f9f7 136 unsigned int page_size, unsigned char *buf);
<> 144:ef7eb2e8f9f7 137 /*
<> 144:ef7eb2e8f9f7 138 * EFlash_BlankCheck: Verifies if there is any Blank Block in eFlash
<> 144:ef7eb2e8f9f7 139 * Parameters:
<> 144:ef7eb2e8f9f7 140 * waddr - address in flash
<> 144:ef7eb2e8f9f7 141 * page_size - data to be written
<> 144:ef7eb2e8f9f7 142 * pat - pattern of a blank block
<> 144:ef7eb2e8f9f7 143 * Returns:
<> 144:ef7eb2e8f9f7 144 * 0 - OK or 1- Failed
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146 int EFlash_BlankCheck(unsigned int waddr,
<> 144:ef7eb2e8f9f7 147 unsigned int page_size, unsigned char pat);
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 /* EFlash_Delay function */
<> 144:ef7eb2e8f9f7 150 void EFlash_Delay(unsigned int period);
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 /* EFlash_ReturnBank1BaseAddress: Returns start address of bank 1 */
<> 144:ef7eb2e8f9f7 153 int EFlash_ReturnBank1BaseAddress(void);
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 156 }
<> 144:ef7eb2e8f9f7 157 #endif
<> 144:ef7eb2e8f9f7 158 #endif /* _FCACHE_DRV_H */