Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/TOOLCHAIN_ARM_STD/startup_BEETLE.s@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;/*
<> 144:ef7eb2e8f9f7 2 ; * BEETLE CMSIS Library
<> 144:ef7eb2e8f9f7 3 ; */
<> 144:ef7eb2e8f9f7 4 ;/*
<> 144:ef7eb2e8f9f7 5 ; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
<> 144:ef7eb2e8f9f7 6 ; *
<> 144:ef7eb2e8f9f7 7 ; * SPDX-License-Identifier: Apache-2.0
<> 144:ef7eb2e8f9f7 8 ; *
<> 144:ef7eb2e8f9f7 9 ; * Licensed under the Apache License, Version 2.0 (the License); you may
<> 144:ef7eb2e8f9f7 10 ; * not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 11 ; * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 12 ; *
<> 144:ef7eb2e8f9f7 13 ; * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 14 ; *
<> 144:ef7eb2e8f9f7 15 ; * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 16 ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
<> 144:ef7eb2e8f9f7 17 ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 18 ; * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 19 ; * limitations under the License.
<> 144:ef7eb2e8f9f7 20 ; */
<> 144:ef7eb2e8f9f7 21 ;
<> 144:ef7eb2e8f9f7 22 ; This file is derivative of CMSIS V5.00 startup_ARMCM3.s
<> 144:ef7eb2e8f9f7 23 ;
<> 144:ef7eb2e8f9f7 24 ;/*
<> 144:ef7eb2e8f9f7 25 ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
<> 144:ef7eb2e8f9f7 26 ;*/
<> 144:ef7eb2e8f9f7 27
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 __initial_sp EQU 0x20020000 ; Top of RAM
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 PRESERVE8
<> 144:ef7eb2e8f9f7 32 THUMB
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 ; Vector Table Mapped to Address 0 at Reset
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 AREA RESET, DATA, READONLY
<> 144:ef7eb2e8f9f7 38 EXPORT __Vectors
<> 144:ef7eb2e8f9f7 39 EXPORT __Vectors_End
<> 144:ef7eb2e8f9f7 40 EXPORT __Vectors_Size
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 __Vectors DCD __initial_sp ; Top of Stack
<> 144:ef7eb2e8f9f7 43 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 44 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 45 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 46 DCD MemManage_Handler ; MPU Fault Handler
<> 144:ef7eb2e8f9f7 47 DCD BusFault_Handler ; Bus Fault Handler
<> 144:ef7eb2e8f9f7 48 DCD UsageFault_Handler ; Usage Fault Handler
<> 144:ef7eb2e8f9f7 49 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 50 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 51 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 52 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 53 DCD SVC_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 54 DCD DebugMon_Handler ; Debug Monitor Handler
<> 144:ef7eb2e8f9f7 55 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 56 DCD PendSV_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 57 DCD SysTick_Handler ; SysTick Handler
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 ; External Interrupts
<> 144:ef7eb2e8f9f7 60 DCD UART0_Handler ; UART 0 RX and TX Handler
<> 144:ef7eb2e8f9f7 61 DCD Spare_IRQ_Handler ; Undefined
<> 144:ef7eb2e8f9f7 62 DCD UART1_Handler ; UART 1 RX and TX Handler
<> 144:ef7eb2e8f9f7 63 DCD I2C0_Handler ; I2C 0 Handler
<> 144:ef7eb2e8f9f7 64 DCD I2C1_Handler ; I2C 1 Handler
<> 144:ef7eb2e8f9f7 65 DCD RTC_Handler ; RTC Handler
<> 144:ef7eb2e8f9f7 66 DCD PORT0_COMB_Handler ; GPIO Port 0 Combined Handler
<> 144:ef7eb2e8f9f7 67 DCD PORT1_COMB_Handler ; GPIO Port 1 Combined Handler
<> 144:ef7eb2e8f9f7 68 DCD TIMER0_Handler ; TIMER 0 handler
<> 144:ef7eb2e8f9f7 69 DCD TIMER1_Handler ; TIMER 1 handler
<> 144:ef7eb2e8f9f7 70 DCD DUALTIMER_HANDLER ; Dual timer handler
<> 144:ef7eb2e8f9f7 71 DCD SPI0_Handler ; SPI 0 Handler
<> 144:ef7eb2e8f9f7 72 DCD UARTOVF_Handler ; UART 0,1 Overflow Handler
<> 144:ef7eb2e8f9f7 73 DCD SPI1_Handler ; SPI 1 Handler
<> 144:ef7eb2e8f9f7 74 DCD QSPI_Handler ; QSPI Handler
<> 144:ef7eb2e8f9f7 75 DCD DMA_Handler ; DMA handler
<> 144:ef7eb2e8f9f7 76 DCD PORT0_0_Handler ; GPIO Port 0 pin 0 Handler
<> 144:ef7eb2e8f9f7 77 DCD PORT0_1_Handler ; GPIO Port 0 pin 1 Handler
<> 144:ef7eb2e8f9f7 78 DCD PORT0_2_Handler ; GPIO Port 0 pin 2 Handler
<> 144:ef7eb2e8f9f7 79 DCD PORT0_3_Handler ; GPIO Port 0 pin 3 Handler
<> 144:ef7eb2e8f9f7 80 DCD PORT0_4_Handler ; GPIO Port 0 pin 4 Handler
<> 144:ef7eb2e8f9f7 81 DCD PORT0_5_Handler ; GPIO Port 0 pin 5 Handler
<> 144:ef7eb2e8f9f7 82 DCD PORT0_6_Handler ; GPIO Port 0 pin 6 Handler
<> 144:ef7eb2e8f9f7 83 DCD PORT0_7_Handler ; GPIO Port 0 pin 7 Handler
<> 144:ef7eb2e8f9f7 84 DCD PORT0_8_Handler ; GPIO Port 0 pin 8 Handler
<> 144:ef7eb2e8f9f7 85 DCD PORT0_9_Handler ; GPIO Port 0 pin 9 Handler
<> 144:ef7eb2e8f9f7 86 DCD PORT0_10_Handler ; GPIO Port 0 pin 10 Handler
<> 144:ef7eb2e8f9f7 87 DCD PORT0_11_Handler ; GPIO Port 0 pin 11 Handler
<> 144:ef7eb2e8f9f7 88 DCD PORT0_12_Handler ; GPIO Port 0 pin 12 Handler
<> 144:ef7eb2e8f9f7 89 DCD PORT0_13_Handler ; GPIO Port 0 pin 13 Handler
<> 144:ef7eb2e8f9f7 90 DCD PORT0_14_Handler ; GPIO Port 0 pin 14 Handler
<> 144:ef7eb2e8f9f7 91 DCD PORT0_15_Handler ; GPIO Port 0 pin 15 Handler
<> 144:ef7eb2e8f9f7 92 DCD SysError_Handler ; System Error (Flash Cache)
<> 144:ef7eb2e8f9f7 93 DCD EFLASH_Handler ; Embedded Flash
<> 144:ef7eb2e8f9f7 94 DCD LLCC_TXCMD_EMPTY_Handler ; LLCC_TXCMDIRQ
<> 144:ef7eb2e8f9f7 95 DCD LLCC_TXEVT_EMPTY_Handler ; LLCC_TXEVTIRQ
<> 144:ef7eb2e8f9f7 96 DCD LLCC_TXDMAH_DONE_Handler ; LLCC_TXDMA0IRQ
<> 144:ef7eb2e8f9f7 97 DCD LLCC_TXDMAL_DONE_Handler ; LLCC_TXDMA1IRQ
<> 144:ef7eb2e8f9f7 98 DCD LLCC_RXCMD_VALID_Handler ; LLCC_RXCMDIRQ
<> 144:ef7eb2e8f9f7 99 DCD LLCC_RXEVT_VALID_Handler ; LLCC_RXEVTIRQ
<> 144:ef7eb2e8f9f7 100 DCD LLCC_RXDMAH_DONE_Handler ; LLCC_RXDMA0IRQ
<> 144:ef7eb2e8f9f7 101 DCD LLCC_RXDMAL_DONE_Handler ; LLCC_RXDMA1IRQ
<> 144:ef7eb2e8f9f7 102 DCD PORT2_COMB_Handler ; GPIO 2
<> 144:ef7eb2e8f9f7 103 DCD PORT3_COMB_Handler ; GPIO 3
<> 144:ef7eb2e8f9f7 104 DCD TRNG_Handler ; TRNG
<> 144:ef7eb2e8f9f7 105 __Vectors_End
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 __Vectors_Size EQU __Vectors_End - __Vectors
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 AREA |.text|, CODE, READONLY
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 ; Reset Handler
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 Reset_Handler PROC
<> 144:ef7eb2e8f9f7 115 EXPORT Reset_Handler [WEAK]
<> 144:ef7eb2e8f9f7 116 IMPORT SystemInit
<> 144:ef7eb2e8f9f7 117 IMPORT __main
<> 144:ef7eb2e8f9f7 118 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 119 BLX R0
<> 144:ef7eb2e8f9f7 120 LDR R0, =__main
<> 144:ef7eb2e8f9f7 121 BX R0
<> 144:ef7eb2e8f9f7 122 ENDP
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 ; Dummy Exception Handlers (infinite loops which can be modified)
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 NMI_Handler PROC
<> 144:ef7eb2e8f9f7 128 EXPORT NMI_Handler [WEAK]
<> 144:ef7eb2e8f9f7 129 B .
<> 144:ef7eb2e8f9f7 130 ENDP
<> 144:ef7eb2e8f9f7 131 HardFault_Handler\
<> 144:ef7eb2e8f9f7 132 PROC
<> 144:ef7eb2e8f9f7 133 EXPORT HardFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 134 B .
<> 144:ef7eb2e8f9f7 135 ENDP
<> 144:ef7eb2e8f9f7 136 MemManage_Handler\
<> 144:ef7eb2e8f9f7 137 PROC
<> 144:ef7eb2e8f9f7 138 EXPORT MemManage_Handler [WEAK]
<> 144:ef7eb2e8f9f7 139 B .
<> 144:ef7eb2e8f9f7 140 ENDP
<> 144:ef7eb2e8f9f7 141 BusFault_Handler\
<> 144:ef7eb2e8f9f7 142 PROC
<> 144:ef7eb2e8f9f7 143 EXPORT BusFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 144 B .
<> 144:ef7eb2e8f9f7 145 ENDP
<> 144:ef7eb2e8f9f7 146 UsageFault_Handler\
<> 144:ef7eb2e8f9f7 147 PROC
<> 144:ef7eb2e8f9f7 148 EXPORT UsageFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 149 B .
<> 144:ef7eb2e8f9f7 150 ENDP
<> 144:ef7eb2e8f9f7 151 SVC_Handler PROC
<> 144:ef7eb2e8f9f7 152 EXPORT SVC_Handler [WEAK]
<> 144:ef7eb2e8f9f7 153 B .
<> 144:ef7eb2e8f9f7 154 ENDP
<> 144:ef7eb2e8f9f7 155 DebugMon_Handler\
<> 144:ef7eb2e8f9f7 156 PROC
<> 144:ef7eb2e8f9f7 157 EXPORT DebugMon_Handler [WEAK]
<> 144:ef7eb2e8f9f7 158 B .
<> 144:ef7eb2e8f9f7 159 ENDP
<> 144:ef7eb2e8f9f7 160 PendSV_Handler PROC
<> 144:ef7eb2e8f9f7 161 EXPORT PendSV_Handler [WEAK]
<> 144:ef7eb2e8f9f7 162 B .
<> 144:ef7eb2e8f9f7 163 ENDP
<> 144:ef7eb2e8f9f7 164 SysTick_Handler PROC
<> 144:ef7eb2e8f9f7 165 EXPORT SysTick_Handler [WEAK]
<> 144:ef7eb2e8f9f7 166 B .
<> 144:ef7eb2e8f9f7 167 ENDP
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 Default_Handler PROC
<> 144:ef7eb2e8f9f7 170 EXPORT UART0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 171 EXPORT Spare_IRQ_Handler [WEAK]
<> 144:ef7eb2e8f9f7 172 EXPORT UART1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 173 EXPORT I2C0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 174 EXPORT I2C1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 175 EXPORT RTC_Handler [WEAK]
<> 144:ef7eb2e8f9f7 176 EXPORT PORT0_COMB_Handler [WEAK]
<> 144:ef7eb2e8f9f7 177 EXPORT PORT1_COMB_Handler [WEAK]
<> 144:ef7eb2e8f9f7 178 EXPORT TIMER0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 179 EXPORT TIMER1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 180 EXPORT DUALTIMER_HANDLER [WEAK]
<> 144:ef7eb2e8f9f7 181 EXPORT SPI0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 182 EXPORT UARTOVF_Handler [WEAK]
<> 144:ef7eb2e8f9f7 183 EXPORT SPI1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 184 EXPORT QSPI_Handler [WEAK]
<> 144:ef7eb2e8f9f7 185 EXPORT DMA_Handler [WEAK]
<> 144:ef7eb2e8f9f7 186 EXPORT PORT0_0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 187 EXPORT PORT0_1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 188 EXPORT PORT0_2_Handler [WEAK]
<> 144:ef7eb2e8f9f7 189 EXPORT PORT0_3_Handler [WEAK]
<> 144:ef7eb2e8f9f7 190 EXPORT PORT0_4_Handler [WEAK]
<> 144:ef7eb2e8f9f7 191 EXPORT PORT0_5_Handler [WEAK]
<> 144:ef7eb2e8f9f7 192 EXPORT PORT0_6_Handler [WEAK]
<> 144:ef7eb2e8f9f7 193 EXPORT PORT0_7_Handler [WEAK]
<> 144:ef7eb2e8f9f7 194 EXPORT PORT0_8_Handler [WEAK]
<> 144:ef7eb2e8f9f7 195 EXPORT PORT0_9_Handler [WEAK]
<> 144:ef7eb2e8f9f7 196 EXPORT PORT0_10_Handler [WEAK]
<> 144:ef7eb2e8f9f7 197 EXPORT PORT0_11_Handler [WEAK]
<> 144:ef7eb2e8f9f7 198 EXPORT PORT0_12_Handler [WEAK]
<> 144:ef7eb2e8f9f7 199 EXPORT PORT0_13_Handler [WEAK]
<> 144:ef7eb2e8f9f7 200 EXPORT PORT0_14_Handler [WEAK]
<> 144:ef7eb2e8f9f7 201 EXPORT PORT0_15_Handler [WEAK]
<> 144:ef7eb2e8f9f7 202 EXPORT SysError_Handler [WEAK]
<> 144:ef7eb2e8f9f7 203 EXPORT EFLASH_Handler [WEAK]
<> 144:ef7eb2e8f9f7 204 EXPORT LLCC_TXEVT_EMPTY_Handler [WEAK]
<> 144:ef7eb2e8f9f7 205 EXPORT LLCC_TXCMD_EMPTY_Handler [WEAK]
<> 144:ef7eb2e8f9f7 206 EXPORT LLCC_RXEVT_VALID_Handler [WEAK]
<> 144:ef7eb2e8f9f7 207 EXPORT LLCC_RXCMD_VALID_Handler [WEAK]
<> 144:ef7eb2e8f9f7 208 EXPORT LLCC_TXDMAL_DONE_Handler [WEAK]
<> 144:ef7eb2e8f9f7 209 EXPORT LLCC_RXDMAL_DONE_Handler [WEAK]
<> 144:ef7eb2e8f9f7 210 EXPORT LLCC_TXDMAH_DONE_Handler [WEAK]
<> 144:ef7eb2e8f9f7 211 EXPORT LLCC_RXDMAH_DONE_Handler [WEAK]
<> 144:ef7eb2e8f9f7 212 EXPORT PORT2_COMB_Handler [WEAK]
<> 144:ef7eb2e8f9f7 213 EXPORT PORT3_COMB_Handler [WEAK]
<> 144:ef7eb2e8f9f7 214 EXPORT TRNG_Handler [WEAK]
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 UART0_Handler
<> 144:ef7eb2e8f9f7 217 Spare_IRQ_Handler
<> 144:ef7eb2e8f9f7 218 UART1_Handler
<> 144:ef7eb2e8f9f7 219 I2C0_Handler
<> 144:ef7eb2e8f9f7 220 I2C1_Handler
<> 144:ef7eb2e8f9f7 221 RTC_Handler
<> 144:ef7eb2e8f9f7 222 PORT0_COMB_Handler
<> 144:ef7eb2e8f9f7 223 PORT1_COMB_Handler
<> 144:ef7eb2e8f9f7 224 TIMER0_Handler
<> 144:ef7eb2e8f9f7 225 TIMER1_Handler
<> 144:ef7eb2e8f9f7 226 DUALTIMER_HANDLER
<> 144:ef7eb2e8f9f7 227 SPI0_Handler
<> 144:ef7eb2e8f9f7 228 UARTOVF_Handler
<> 144:ef7eb2e8f9f7 229 SPI1_Handler
<> 144:ef7eb2e8f9f7 230 QSPI_Handler
<> 144:ef7eb2e8f9f7 231 DMA_Handler
<> 144:ef7eb2e8f9f7 232 PORT0_0_Handler
<> 144:ef7eb2e8f9f7 233 PORT0_1_Handler
<> 144:ef7eb2e8f9f7 234 PORT0_2_Handler
<> 144:ef7eb2e8f9f7 235 PORT0_3_Handler
<> 144:ef7eb2e8f9f7 236 PORT0_4_Handler
<> 144:ef7eb2e8f9f7 237 PORT0_5_Handler
<> 144:ef7eb2e8f9f7 238 PORT0_6_Handler
<> 144:ef7eb2e8f9f7 239 PORT0_7_Handler
<> 144:ef7eb2e8f9f7 240 PORT0_8_Handler
<> 144:ef7eb2e8f9f7 241 PORT0_9_Handler
<> 144:ef7eb2e8f9f7 242 PORT0_10_Handler
<> 144:ef7eb2e8f9f7 243 PORT0_11_Handler
<> 144:ef7eb2e8f9f7 244 PORT0_12_Handler
<> 144:ef7eb2e8f9f7 245 PORT0_13_Handler
<> 144:ef7eb2e8f9f7 246 PORT0_14_Handler
<> 144:ef7eb2e8f9f7 247 PORT0_15_Handler
<> 144:ef7eb2e8f9f7 248 SysError_Handler
<> 144:ef7eb2e8f9f7 249 EFLASH_Handler
<> 144:ef7eb2e8f9f7 250 LLCC_TXEVT_EMPTY_Handler
<> 144:ef7eb2e8f9f7 251 LLCC_TXCMD_EMPTY_Handler
<> 144:ef7eb2e8f9f7 252 LLCC_RXEVT_VALID_Handler
<> 144:ef7eb2e8f9f7 253 LLCC_RXCMD_VALID_Handler
<> 144:ef7eb2e8f9f7 254 LLCC_TXDMAL_DONE_Handler
<> 144:ef7eb2e8f9f7 255 LLCC_RXDMAL_DONE_Handler
<> 144:ef7eb2e8f9f7 256 LLCC_TXDMAH_DONE_Handler
<> 144:ef7eb2e8f9f7 257 LLCC_RXDMAH_DONE_Handler
<> 144:ef7eb2e8f9f7 258 PORT2_COMB_Handler
<> 144:ef7eb2e8f9f7 259 PORT3_COMB_Handler
<> 144:ef7eb2e8f9f7 260 TRNG_Handler
<> 144:ef7eb2e8f9f7 261 B .
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 ENDP
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 ALIGN
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 END