Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/spi_api.c@71:a5b1c83f05dc, 2016-02-25 (annotated)

Committer:
mbed_official
Date:
Thu Feb 25 09:45:11 2016 +0000
Revision:
71:a5b1c83f05dc
Parent:
0:9b334a45a8ff
Child:
119:3921aeca8633
Synchronized with git revision 8577dc9680abc50885f129a77852579c5a5bc527



Full URL: https://github.com/mbedmicro/mbed/commit/8577dc9680abc50885f129a77852579c5a5bc527/



l476rg rtc

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include <math.h>
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "spi_api.h"
bogdanm 0:9b334a45a8ff 20 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 21 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 22 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 23 #include "RZ_A1_Init.h"
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 static const PinMap PinMap_SPI_SCLK[] = {
bogdanm 0:9b334a45a8ff 26 {P10_12, SPI_0, 4},
bogdanm 0:9b334a45a8ff 27 {P4_4 , SPI_1, 2},
bogdanm 0:9b334a45a8ff 28 {P11_12, SPI_1, 2},
bogdanm 0:9b334a45a8ff 29 {P8_3 , SPI_2, 3},
mbed_official 71:a5b1c83f05dc 30 {P5_0 , SPI_3, 8},
bogdanm 0:9b334a45a8ff 31 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 32 };
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 static const PinMap PinMap_SPI_SSEL[] = {
bogdanm 0:9b334a45a8ff 35 {P10_13, SPI_0, 4},
bogdanm 0:9b334a45a8ff 36 {P4_5 , SPI_1, 2},
bogdanm 0:9b334a45a8ff 37 {P11_13, SPI_1, 2},
bogdanm 0:9b334a45a8ff 38 {P8_4 , SPI_2, 3},
mbed_official 71:a5b1c83f05dc 39 {P5_1 , SPI_3, 8},
bogdanm 0:9b334a45a8ff 40 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 41 };
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 static const PinMap PinMap_SPI_MOSI[] = {
bogdanm 0:9b334a45a8ff 44 {P10_14, SPI_0, 4},
bogdanm 0:9b334a45a8ff 45 {P4_6 , SPI_1, 2},
bogdanm 0:9b334a45a8ff 46 {P11_14, SPI_1, 2},
bogdanm 0:9b334a45a8ff 47 {P8_5 , SPI_2, 3},
mbed_official 71:a5b1c83f05dc 48 {P5_2 , SPI_3, 8},
bogdanm 0:9b334a45a8ff 49 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 50 };
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 static const PinMap PinMap_SPI_MISO[] = {
bogdanm 0:9b334a45a8ff 53 {P10_15, SPI_0, 4},
bogdanm 0:9b334a45a8ff 54 {P4_7 , SPI_1, 2},
bogdanm 0:9b334a45a8ff 55 {P11_15, SPI_1, 2},
bogdanm 0:9b334a45a8ff 56 {P8_6 , SPI_2, 3},
mbed_official 71:a5b1c83f05dc 57 {P5_3 , SPI_3, 8},
bogdanm 0:9b334a45a8ff 58 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 59 };
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 static const struct st_rspi *RSPI[] = RSPI_ADDRESS_LIST;
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 static inline void spi_disable(spi_t *obj);
bogdanm 0:9b334a45a8ff 64 static inline void spi_enable(spi_t *obj);
bogdanm 0:9b334a45a8ff 65 static inline int spi_readable(spi_t *obj);
bogdanm 0:9b334a45a8ff 66 static inline void spi_write(spi_t *obj, int value);
bogdanm 0:9b334a45a8ff 67 static inline int spi_read(spi_t *obj);
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
bogdanm 0:9b334a45a8ff 70 // determine the SPI to use
bogdanm 0:9b334a45a8ff 71 volatile uint8_t dummy;
bogdanm 0:9b334a45a8ff 72 uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 73 uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 74 uint32_t spi_sclk = pinmap_peripheral(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 75 uint32_t spi_ssel = pinmap_peripheral(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 76 uint32_t spi_data = pinmap_merge(spi_mosi, spi_miso);
bogdanm 0:9b334a45a8ff 77 uint32_t spi_cntl = pinmap_merge(spi_sclk, spi_ssel);
bogdanm 0:9b334a45a8ff 78 uint32_t spi = pinmap_merge(spi_data, spi_cntl);
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 MBED_ASSERT((int)spi != NC);
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 obj->spi = (struct st_rspi *)RSPI[spi];
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 // enable power and clocking
bogdanm 0:9b334a45a8ff 85 switch (spi) {
bogdanm 0:9b334a45a8ff 86 case SPI_0: CPGSTBCR10 &= ~(0x80); break;
bogdanm 0:9b334a45a8ff 87 case SPI_1: CPGSTBCR10 &= ~(0x40); break;
bogdanm 0:9b334a45a8ff 88 case SPI_2: CPGSTBCR10 &= ~(0x20); break;
mbed_official 71:a5b1c83f05dc 89 case SPI_3: CPGSTBCR10 &= ~(0x10); break;
bogdanm 0:9b334a45a8ff 90 }
bogdanm 0:9b334a45a8ff 91 dummy = CPGSTBCR10;
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 obj->spi->SPCR = 0x00; // CTRL to 0
bogdanm 0:9b334a45a8ff 94 obj->spi->SPSCR = 0x00; // no sequential operation
bogdanm 0:9b334a45a8ff 95 obj->spi->SSLP = 0x00; // SSL 'L' active
bogdanm 0:9b334a45a8ff 96 obj->spi->SPDCR = 0x20; // byte access
bogdanm 0:9b334a45a8ff 97 obj->spi->SPCKD = 0x00; // SSL -> enable CLK delay : 1RSPCK
bogdanm 0:9b334a45a8ff 98 obj->spi->SSLND = 0x00; // CLK end -> SSL neg delay : 1RSPCK
bogdanm 0:9b334a45a8ff 99 obj->spi->SPND = 0x00; // delay between CMD : 1RSPCK + 2P1CLK
bogdanm 0:9b334a45a8ff 100 obj->spi->SPPCR = 0x20; // MOSI Idle fixed value equals 0
bogdanm 0:9b334a45a8ff 101 obj->spi->SPBFCR = 0xf0; // and set trigger count: read 1, write 1
bogdanm 0:9b334a45a8ff 102 obj->spi->SPBFCR = 0x30; // and reset buffer
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 // pin out the spi pins
bogdanm 0:9b334a45a8ff 105 pinmap_pinout(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 106 pinmap_pinout(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 107 pinmap_pinout(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 108 if ((int)ssel != NC) {
bogdanm 0:9b334a45a8ff 109 pinmap_pinout(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 110 }
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 void spi_free(spi_t *obj) {}
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 void spi_format(spi_t *obj, int bits, int mode, int slave) {
bogdanm 0:9b334a45a8ff 116 int DSS; // DSS (data select size)
bogdanm 0:9b334a45a8ff 117 int polarity = (mode & 0x2) ? 1 : 0;
bogdanm 0:9b334a45a8ff 118 int phase = (mode & 0x1) ? 1 : 0;
bogdanm 0:9b334a45a8ff 119 uint16_t tmp = 0;
bogdanm 0:9b334a45a8ff 120 uint16_t mask = 0xf03;
bogdanm 0:9b334a45a8ff 121 uint16_t wk_spcmd0;
bogdanm 0:9b334a45a8ff 122 uint8_t splw;
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 switch (mode) {
bogdanm 0:9b334a45a8ff 125 case 0:
bogdanm 0:9b334a45a8ff 126 case 1:
bogdanm 0:9b334a45a8ff 127 case 2:
bogdanm 0:9b334a45a8ff 128 case 3:
bogdanm 0:9b334a45a8ff 129 // Do Nothing
bogdanm 0:9b334a45a8ff 130 break;
bogdanm 0:9b334a45a8ff 131 default:
bogdanm 0:9b334a45a8ff 132 error("SPI format error");
bogdanm 0:9b334a45a8ff 133 return;
bogdanm 0:9b334a45a8ff 134 }
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 switch (bits) {
bogdanm 0:9b334a45a8ff 137 case 8:
bogdanm 0:9b334a45a8ff 138 DSS = 0x7;
bogdanm 0:9b334a45a8ff 139 splw = 0x20;
bogdanm 0:9b334a45a8ff 140 break;
bogdanm 0:9b334a45a8ff 141 case 16:
bogdanm 0:9b334a45a8ff 142 DSS = 0xf;
bogdanm 0:9b334a45a8ff 143 splw = 0x40;
bogdanm 0:9b334a45a8ff 144 break;
bogdanm 0:9b334a45a8ff 145 case 32:
bogdanm 0:9b334a45a8ff 146 DSS = 0x2;
bogdanm 0:9b334a45a8ff 147 splw = 0x60;
bogdanm 0:9b334a45a8ff 148 break;
bogdanm 0:9b334a45a8ff 149 default:
bogdanm 0:9b334a45a8ff 150 error("SPI module don't support other than 8/16/32bits");
bogdanm 0:9b334a45a8ff 151 return;
bogdanm 0:9b334a45a8ff 152 }
bogdanm 0:9b334a45a8ff 153 tmp |= phase;
bogdanm 0:9b334a45a8ff 154 tmp |= (polarity << 1);
bogdanm 0:9b334a45a8ff 155 tmp |= (DSS << 8);
bogdanm 0:9b334a45a8ff 156 obj->bits = bits;
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 spi_disable(obj);
bogdanm 0:9b334a45a8ff 159 wk_spcmd0 = obj->spi->SPCMD0;
bogdanm 0:9b334a45a8ff 160 wk_spcmd0 &= ~mask;
bogdanm 0:9b334a45a8ff 161 wk_spcmd0 |= (mask & tmp);
bogdanm 0:9b334a45a8ff 162 obj->spi->SPCMD0 = wk_spcmd0;
bogdanm 0:9b334a45a8ff 163 obj->spi->SPDCR = splw;
bogdanm 0:9b334a45a8ff 164 if (slave) {
bogdanm 0:9b334a45a8ff 165 obj->spi->SPCR &=~(1 << 3); // MSTR to 0
bogdanm 0:9b334a45a8ff 166 } else {
bogdanm 0:9b334a45a8ff 167 obj->spi->SPCR |= (1 << 3); // MSTR to 1
bogdanm 0:9b334a45a8ff 168 }
bogdanm 0:9b334a45a8ff 169 spi_enable(obj);
bogdanm 0:9b334a45a8ff 170 }
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 void spi_frequency(spi_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 173 uint32_t pclk_base;
bogdanm 0:9b334a45a8ff 174 uint32_t div;
bogdanm 0:9b334a45a8ff 175 uint32_t brdv = 0;
bogdanm 0:9b334a45a8ff 176 uint32_t hz_max;
bogdanm 0:9b334a45a8ff 177 uint32_t hz_min;
bogdanm 0:9b334a45a8ff 178 uint16_t mask = 0x000c;
bogdanm 0:9b334a45a8ff 179 uint16_t wk_spcmd0;
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /* set PCLK */
bogdanm 0:9b334a45a8ff 182 if (RZ_A1_IsClockMode0() == false) {
bogdanm 0:9b334a45a8ff 183 pclk_base = CM1_RENESAS_RZ_A1_P1_CLK;
bogdanm 0:9b334a45a8ff 184 } else {
bogdanm 0:9b334a45a8ff 185 pclk_base = CM0_RENESAS_RZ_A1_P1_CLK;
bogdanm 0:9b334a45a8ff 186 }
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 hz_min = pclk_base / 2 / 256 / 8;
bogdanm 0:9b334a45a8ff 189 hz_max = pclk_base / 2;
bogdanm 0:9b334a45a8ff 190 if ((hz < hz_min) || (hz > hz_max)) {
bogdanm 0:9b334a45a8ff 191 error("Couldn't setup requested SPI frequency");
bogdanm 0:9b334a45a8ff 192 return;
bogdanm 0:9b334a45a8ff 193 }
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 div = (pclk_base / hz / 2);
bogdanm 0:9b334a45a8ff 196 while (div > 256) {
bogdanm 0:9b334a45a8ff 197 div >>= 1;
bogdanm 0:9b334a45a8ff 198 brdv++;
bogdanm 0:9b334a45a8ff 199 }
bogdanm 0:9b334a45a8ff 200 div -= 1;
bogdanm 0:9b334a45a8ff 201 brdv = (brdv << 2);
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 spi_disable(obj);
bogdanm 0:9b334a45a8ff 204 obj->spi->SPBR = div;
bogdanm 0:9b334a45a8ff 205 wk_spcmd0 = obj->spi->SPCMD0;
bogdanm 0:9b334a45a8ff 206 wk_spcmd0 &= ~mask;
bogdanm 0:9b334a45a8ff 207 wk_spcmd0 |= (mask & brdv);
bogdanm 0:9b334a45a8ff 208 obj->spi->SPCMD0 = wk_spcmd0;
bogdanm 0:9b334a45a8ff 209 spi_enable(obj);
bogdanm 0:9b334a45a8ff 210 }
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 static inline void spi_disable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 213 obj->spi->SPCR &= ~(1 << 6); // SPE to 0
bogdanm 0:9b334a45a8ff 214 }
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 static inline void spi_enable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 217 obj->spi->SPCR |= (1 << 6); // SPE to 1
bogdanm 0:9b334a45a8ff 218 }
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 static inline int spi_readable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 221 return obj->spi->SPSR & (1 << 7); // SPRF
bogdanm 0:9b334a45a8ff 222 }
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 static inline int spi_tend(spi_t *obj) {
bogdanm 0:9b334a45a8ff 225 return obj->spi->SPSR & (1 << 6); // TEND
bogdanm 0:9b334a45a8ff 226 }
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 static inline void spi_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 229 if (obj->bits == 8) {
bogdanm 0:9b334a45a8ff 230 obj->spi->SPDR.UINT8[0] = (uint8_t)value;
bogdanm 0:9b334a45a8ff 231 } else if (obj->bits == 16) {
bogdanm 0:9b334a45a8ff 232 obj->spi->SPDR.UINT16[0] = (uint16_t)value;
bogdanm 0:9b334a45a8ff 233 } else {
bogdanm 0:9b334a45a8ff 234 obj->spi->SPDR.UINT32 = (uint32_t)value;
bogdanm 0:9b334a45a8ff 235 }
bogdanm 0:9b334a45a8ff 236 }
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 static inline int spi_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 239 int read_data;
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 if (obj->bits == 8) {
bogdanm 0:9b334a45a8ff 242 read_data = obj->spi->SPDR.UINT8[0];
bogdanm 0:9b334a45a8ff 243 } else if (obj->bits == 16) {
bogdanm 0:9b334a45a8ff 244 read_data = obj->spi->SPDR.UINT16[0];
bogdanm 0:9b334a45a8ff 245 } else {
bogdanm 0:9b334a45a8ff 246 read_data = obj->spi->SPDR.UINT32;
bogdanm 0:9b334a45a8ff 247 }
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 return read_data;
bogdanm 0:9b334a45a8ff 250 }
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 int spi_master_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 253 spi_write(obj, value);
bogdanm 0:9b334a45a8ff 254 while(!spi_tend(obj));
bogdanm 0:9b334a45a8ff 255 return spi_read(obj);
bogdanm 0:9b334a45a8ff 256 }
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 int spi_slave_receive(spi_t *obj) {
bogdanm 0:9b334a45a8ff 259 return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
bogdanm 0:9b334a45a8ff 260 }
bogdanm 0:9b334a45a8ff 261
bogdanm 0:9b334a45a8ff 262 int spi_slave_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 263 return spi_read(obj);
bogdanm 0:9b334a45a8ff 264 }
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 void spi_slave_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 267 spi_write(obj, value);
bogdanm 0:9b334a45a8ff 268 }
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 int spi_busy(spi_t *obj) {
bogdanm 0:9b334a45a8ff 271 return 0;
bogdanm 0:9b334a45a8ff 272 }