Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/PeripheralNames.h@71:a5b1c83f05dc, 2016-02-25 (annotated)

Committer:
mbed_official
Date:
Thu Feb 25 09:45:11 2016 +0000
Revision:
71:a5b1c83f05dc
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 8577dc9680abc50885f129a77852579c5a5bc527



Full URL: https://github.com/mbedmicro/mbed/commit/8577dc9680abc50885f129a77852579c5a5bc527/



l476rg rtc

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 0:9b334a45a8ff 17 #define MBED_PERIPHERALNAMES_H
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 20 #include "PinNames.h"
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 23 extern "C" {
bogdanm 0:9b334a45a8ff 24 #endif
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 typedef enum {
bogdanm 0:9b334a45a8ff 27 UART0,
bogdanm 0:9b334a45a8ff 28 UART1,
bogdanm 0:9b334a45a8ff 29 UART2,
bogdanm 0:9b334a45a8ff 30 UART3,
bogdanm 0:9b334a45a8ff 31 UART4,
bogdanm 0:9b334a45a8ff 32 UART5,
bogdanm 0:9b334a45a8ff 33 UART6,
bogdanm 0:9b334a45a8ff 34 UART7,
bogdanm 0:9b334a45a8ff 35 } UARTName;
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 // PWMType & 1 == 1 then have to use PWDTR[12] == 1
bogdanm 0:9b334a45a8ff 38 typedef enum {
bogdanm 0:9b334a45a8ff 39 PWM1A = 0,
bogdanm 0:9b334a45a8ff 40 PWM1B,
bogdanm 0:9b334a45a8ff 41 PWM1C,
bogdanm 0:9b334a45a8ff 42 PWM1D,
bogdanm 0:9b334a45a8ff 43 PWM1E,
bogdanm 0:9b334a45a8ff 44 PWM1F,
bogdanm 0:9b334a45a8ff 45 PWM1G,
bogdanm 0:9b334a45a8ff 46 PWM1H,
bogdanm 0:9b334a45a8ff 47 PWM2A = 0x10,
bogdanm 0:9b334a45a8ff 48 PWM2B,
bogdanm 0:9b334a45a8ff 49 PWM2C,
bogdanm 0:9b334a45a8ff 50 PWM2D,
bogdanm 0:9b334a45a8ff 51 PWM2E,
bogdanm 0:9b334a45a8ff 52 PWM2F,
bogdanm 0:9b334a45a8ff 53 PWM2G,
bogdanm 0:9b334a45a8ff 54 PWM2H,
bogdanm 0:9b334a45a8ff 55 } PWMType;
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 typedef enum {
bogdanm 0:9b334a45a8ff 58 TIOC0A = 0,
bogdanm 0:9b334a45a8ff 59 TIOC0B,
bogdanm 0:9b334a45a8ff 60 TIOC0C,
bogdanm 0:9b334a45a8ff 61 TIOC0D,
bogdanm 0:9b334a45a8ff 62 TIOC1A = 0x10,
bogdanm 0:9b334a45a8ff 63 TIOC1B,
bogdanm 0:9b334a45a8ff 64 TIOC2A = 0x20,
bogdanm 0:9b334a45a8ff 65 TIOC2B,
bogdanm 0:9b334a45a8ff 66 TIOC3A = 0x30,
bogdanm 0:9b334a45a8ff 67 TIOC3B,
bogdanm 0:9b334a45a8ff 68 TIOC3C,
bogdanm 0:9b334a45a8ff 69 TIOC3D,
bogdanm 0:9b334a45a8ff 70 TIOC4A = 0x40,
bogdanm 0:9b334a45a8ff 71 TIOC4B,
bogdanm 0:9b334a45a8ff 72 TIOC4C,
bogdanm 0:9b334a45a8ff 73 TIOC4D,
bogdanm 0:9b334a45a8ff 74 } MTU2_PWMType;
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 typedef enum {
bogdanm 0:9b334a45a8ff 77 PWM0_PIN = 0,
bogdanm 0:9b334a45a8ff 78 PWM1_PIN,
bogdanm 0:9b334a45a8ff 79 PWM2_PIN,
bogdanm 0:9b334a45a8ff 80 PWM3_PIN,
bogdanm 0:9b334a45a8ff 81 PWM4_PIN,
bogdanm 0:9b334a45a8ff 82 PWM5_PIN,
bogdanm 0:9b334a45a8ff 83 PWM6_PIN,
bogdanm 0:9b334a45a8ff 84 PWM7_PIN,
bogdanm 0:9b334a45a8ff 85 PWM8_PIN,
bogdanm 0:9b334a45a8ff 86 PWM9_PIN,
bogdanm 0:9b334a45a8ff 87 PWM10_PIN,
bogdanm 0:9b334a45a8ff 88 PWM11_PIN,
bogdanm 0:9b334a45a8ff 89 PWM12_PIN,
bogdanm 0:9b334a45a8ff 90 PWM13_PIN,
bogdanm 0:9b334a45a8ff 91 MTU2_PWM0_PIN = 0x20,
bogdanm 0:9b334a45a8ff 92 MTU2_PWM1_PIN,
bogdanm 0:9b334a45a8ff 93 MTU2_PWM2_PIN,
bogdanm 0:9b334a45a8ff 94 MTU2_PWM3_PIN,
bogdanm 0:9b334a45a8ff 95 MTU2_PWM4_PIN,
bogdanm 0:9b334a45a8ff 96 MTU2_PWM5_PIN,
bogdanm 0:9b334a45a8ff 97 MTU2_PWM6_PIN,
bogdanm 0:9b334a45a8ff 98 MTU2_PWM7_PIN,
bogdanm 0:9b334a45a8ff 99 MTU2_PWM8_PIN,
bogdanm 0:9b334a45a8ff 100 MTU2_PWM9_PIN,
bogdanm 0:9b334a45a8ff 101 MTU2_PWM10_PIN,
bogdanm 0:9b334a45a8ff 102 MTU2_PWM11_PIN,
bogdanm 0:9b334a45a8ff 103 MTU2_PWM12_PIN,
bogdanm 0:9b334a45a8ff 104 MTU2_PWM13_PIN,
bogdanm 0:9b334a45a8ff 105 MTU2_PWM14_PIN,
bogdanm 0:9b334a45a8ff 106 MTU2_PWM15_PIN,
bogdanm 0:9b334a45a8ff 107 MTU2_PWM16_PIN,
bogdanm 0:9b334a45a8ff 108 MTU2_PWM17_PIN,
bogdanm 0:9b334a45a8ff 109 MTU2_PWM18_PIN,
bogdanm 0:9b334a45a8ff 110 MTU2_PWM19_PIN,
bogdanm 0:9b334a45a8ff 111 MTU2_PWM20_PIN,
bogdanm 0:9b334a45a8ff 112 MTU2_PWM21_PIN,
bogdanm 0:9b334a45a8ff 113 } PWMName;
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 typedef enum {
bogdanm 0:9b334a45a8ff 116 AN0= 0,
bogdanm 0:9b334a45a8ff 117 AN1= 1,
bogdanm 0:9b334a45a8ff 118 AN2= 2,
bogdanm 0:9b334a45a8ff 119 AN3= 3,
bogdanm 0:9b334a45a8ff 120 AN4= 4,
bogdanm 0:9b334a45a8ff 121 AN5= 5,
bogdanm 0:9b334a45a8ff 122 AN6= 6,
bogdanm 0:9b334a45a8ff 123 AN7= 7,
bogdanm 0:9b334a45a8ff 124 } ADCName;
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 typedef enum {
bogdanm 0:9b334a45a8ff 127 SPI_0 = 0,
bogdanm 0:9b334a45a8ff 128 SPI_1,
bogdanm 0:9b334a45a8ff 129 SPI_2,
mbed_official 71:a5b1c83f05dc 130 SPI_3,
bogdanm 0:9b334a45a8ff 131 } SPIName;
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 typedef enum {
bogdanm 0:9b334a45a8ff 134 I2C_0 = 0,
bogdanm 0:9b334a45a8ff 135 I2C_1,
bogdanm 0:9b334a45a8ff 136 I2C_2,
bogdanm 0:9b334a45a8ff 137 I2C_3
bogdanm 0:9b334a45a8ff 138 } I2CName;
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 typedef enum {
bogdanm 0:9b334a45a8ff 141 CAN_0 = 0,
bogdanm 0:9b334a45a8ff 142 CAN_1,
bogdanm 0:9b334a45a8ff 143 CAN_2,
bogdanm 0:9b334a45a8ff 144 CAN_3,
bogdanm 0:9b334a45a8ff 145 CAN_4
bogdanm 0:9b334a45a8ff 146 } CANName;
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 #define STDIO_UART_TX USBTX
bogdanm 0:9b334a45a8ff 150 #define STDIO_UART_RX USBRX
bogdanm 0:9b334a45a8ff 151 #define STDIO_UART UART2
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 156 }
bogdanm 0:9b334a45a8ff 157 #endif
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 #endif