Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_adc.c@50:a417edff4437, 2016-01-15 (annotated)

Committer:
mbed_official
Date:
Fri Jan 15 07:45:16 2016 +0000
Revision:
50:a417edff4437
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 6010f32619bfcbb01cc73747d4ff9040863482d9



Full URL: https://github.com/mbedmicro/mbed/commit/6010f32619bfcbb01cc73747d4ff9040863482d9/



Remove doubling of buffer size in realiseEndpoint()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file em_adc.c
bogdanm 0:9b334a45a8ff 3 * @brief Analog to Digital Converter (ADC) Peripheral API
mbed_official 50:a417edff4437 4 * @version 4.2.1
bogdanm 0:9b334a45a8ff 5 *******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
mbed_official 50:a417edff4437 7 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 *******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
bogdanm 0:9b334a45a8ff 21 * obligation to support this Software. Silicon Labs is providing the
bogdanm 0:9b334a45a8ff 22 * Software "AS IS", with no express or implied warranties of any kind,
bogdanm 0:9b334a45a8ff 23 * including, but not limited to, any implied warranties of merchantability
bogdanm 0:9b334a45a8ff 24 * or fitness for any particular purpose or warranties against infringement
bogdanm 0:9b334a45a8ff 25 * of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Labs will not be liable for any consequential, incidental, or
bogdanm 0:9b334a45a8ff 28 * special damages, or any other relief, or for any claim by any third party,
bogdanm 0:9b334a45a8ff 29 * arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 ******************************************************************************/
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 #include "em_adc.h"
mbed_official 50:a417edff4437 34 #if defined( ADC_COUNT ) && ( ADC_COUNT > 0 )
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 #include "em_cmu.h"
bogdanm 0:9b334a45a8ff 37 #include "em_assert.h"
mbed_official 50:a417edff4437 38 #include <stddef.h>
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 41 * @addtogroup EM_Library
bogdanm 0:9b334a45a8ff 42 * @{
bogdanm 0:9b334a45a8ff 43 ******************************************************************************/
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 46 * @addtogroup ADC
bogdanm 0:9b334a45a8ff 47 * @brief Analog to Digital Converter (ADC) Peripheral API
bogdanm 0:9b334a45a8ff 48 * @{
bogdanm 0:9b334a45a8ff 49 ******************************************************************************/
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /*******************************************************************************
bogdanm 0:9b334a45a8ff 52 ******************************* DEFINES ***********************************
bogdanm 0:9b334a45a8ff 53 ******************************************************************************/
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /** Validation of ADC register block pointer reference for assert statements. */
bogdanm 0:9b334a45a8ff 58 #define ADC_REF_VALID(ref) ((ref) == ADC0)
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 /** Max ADC clock */
mbed_official 50:a417edff4437 61 #if defined( _SILICON_LABS_32B_PLATFORM_1 )
bogdanm 0:9b334a45a8ff 62 #define ADC_MAX_CLOCK 13000000
mbed_official 50:a417edff4437 63 #else
mbed_official 50:a417edff4437 64 #define ADC_MAX_CLOCK 16000000
mbed_official 50:a417edff4437 65 #endif
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 /** Min ADC clock */
bogdanm 0:9b334a45a8ff 68 #define ADC_MIN_CLOCK 32000
bogdanm 0:9b334a45a8ff 69
mbed_official 50:a417edff4437 70 /** Helper defines for selecting ADC calibration and DEVINFO register fields. */
mbed_official 50:a417edff4437 71 #if defined( _DEVINFO_ADC0CAL0_1V25_GAIN_MASK )
mbed_official 50:a417edff4437 72 #define DEVINFO_ADC0_GAIN1V25_MASK _DEVINFO_ADC0CAL0_1V25_GAIN_MASK
mbed_official 50:a417edff4437 73 #elif defined( _DEVINFO_ADC0CAL0_GAIN1V25_MASK )
mbed_official 50:a417edff4437 74 #define DEVINFO_ADC0_GAIN1V25_MASK _DEVINFO_ADC0CAL0_GAIN1V25_MASK
mbed_official 50:a417edff4437 75 #endif
mbed_official 50:a417edff4437 76
mbed_official 50:a417edff4437 77 #if defined( _DEVINFO_ADC0CAL0_1V25_GAIN_SHIFT )
mbed_official 50:a417edff4437 78 #define DEVINFO_ADC0_GAIN1V25_SHIFT _DEVINFO_ADC0CAL0_1V25_GAIN_SHIFT
mbed_official 50:a417edff4437 79 #elif defined( _DEVINFO_ADC0CAL0_GAIN1V25_SHIFT )
mbed_official 50:a417edff4437 80 #define DEVINFO_ADC0_GAIN1V25_SHIFT _DEVINFO_ADC0CAL0_GAIN1V25_SHIFT
mbed_official 50:a417edff4437 81 #endif
mbed_official 50:a417edff4437 82
mbed_official 50:a417edff4437 83 #if defined( _DEVINFO_ADC0CAL0_1V25_OFFSET_MASK )
mbed_official 50:a417edff4437 84 #define DEVINFO_ADC0_OFFSET1V25_MASK _DEVINFO_ADC0CAL0_1V25_OFFSET_MASK
mbed_official 50:a417edff4437 85 #elif defined( _DEVINFO_ADC0CAL0_OFFSET1V25_MASK )
mbed_official 50:a417edff4437 86 #define DEVINFO_ADC0_OFFSET1V25_MASK _DEVINFO_ADC0CAL0_OFFSET1V25_MASK
mbed_official 50:a417edff4437 87 #endif
mbed_official 50:a417edff4437 88
mbed_official 50:a417edff4437 89 #if defined( _DEVINFO_ADC0CAL0_1V25_OFFSET_SHIFT )
mbed_official 50:a417edff4437 90 #define DEVINFO_ADC0_OFFSET1V25_SHIFT _DEVINFO_ADC0CAL0_1V25_OFFSET_SHIFT
mbed_official 50:a417edff4437 91 #elif defined( _DEVINFO_ADC0CAL0_OFFSET1V25_SHIFT )
mbed_official 50:a417edff4437 92 #define DEVINFO_ADC0_OFFSET1V25_SHIFT _DEVINFO_ADC0CAL0_OFFSET1V25_SHIFT
mbed_official 50:a417edff4437 93 #endif
mbed_official 50:a417edff4437 94
mbed_official 50:a417edff4437 95 #if defined( _DEVINFO_ADC0CAL0_2V5_GAIN_MASK )
mbed_official 50:a417edff4437 96 #define DEVINFO_ADC0_GAIN2V5_MASK _DEVINFO_ADC0CAL0_2V5_GAIN_MASK
mbed_official 50:a417edff4437 97 #elif defined( _DEVINFO_ADC0CAL0_GAIN2V5_MASK )
mbed_official 50:a417edff4437 98 #define DEVINFO_ADC0_GAIN2V5_MASK _DEVINFO_ADC0CAL0_GAIN2V5_MASK
mbed_official 50:a417edff4437 99 #endif
mbed_official 50:a417edff4437 100
mbed_official 50:a417edff4437 101 #if defined( _DEVINFO_ADC0CAL0_2V5_GAIN_SHIFT )
mbed_official 50:a417edff4437 102 #define DEVINFO_ADC0_GAIN2V5_SHIFT _DEVINFO_ADC0CAL0_2V5_GAIN_SHIFT
mbed_official 50:a417edff4437 103 #elif defined( _DEVINFO_ADC0CAL0_GAIN2V5_SHIFT )
mbed_official 50:a417edff4437 104 #define DEVINFO_ADC0_GAIN2V5_SHIFT _DEVINFO_ADC0CAL0_GAIN2V5_SHIFT
mbed_official 50:a417edff4437 105 #endif
mbed_official 50:a417edff4437 106
mbed_official 50:a417edff4437 107 #if defined( _DEVINFO_ADC0CAL0_2V5_OFFSET_MASK )
mbed_official 50:a417edff4437 108 #define DEVINFO_ADC0_OFFSET2V5_MASK _DEVINFO_ADC0CAL0_2V5_OFFSET_MASK
mbed_official 50:a417edff4437 109 #elif defined( _DEVINFO_ADC0CAL0_OFFSET2V5_MASK )
mbed_official 50:a417edff4437 110 #define DEVINFO_ADC0_OFFSET2V5_MASK _DEVINFO_ADC0CAL0_OFFSET2V5_MASK
mbed_official 50:a417edff4437 111 #endif
mbed_official 50:a417edff4437 112
mbed_official 50:a417edff4437 113 #if defined( _DEVINFO_ADC0CAL0_2V5_OFFSET_SHIFT )
mbed_official 50:a417edff4437 114 #define DEVINFO_ADC0_OFFSET2V5_SHIFT _DEVINFO_ADC0CAL0_2V5_OFFSET_SHIFT
mbed_official 50:a417edff4437 115 #elif defined( _DEVINFO_ADC0CAL0_OFFSET2V5_SHIFT )
mbed_official 50:a417edff4437 116 #define DEVINFO_ADC0_OFFSET2V5_SHIFT _DEVINFO_ADC0CAL0_OFFSET2V5_SHIFT
mbed_official 50:a417edff4437 117 #endif
mbed_official 50:a417edff4437 118
mbed_official 50:a417edff4437 119 #if defined( _DEVINFO_ADC0CAL1_VDD_GAIN_MASK )
mbed_official 50:a417edff4437 120 #define DEVINFO_ADC0_GAINVDD_MASK _DEVINFO_ADC0CAL1_VDD_GAIN_MASK
mbed_official 50:a417edff4437 121 #elif defined( _DEVINFO_ADC0CAL1_GAINVDD_MASK )
mbed_official 50:a417edff4437 122 #define DEVINFO_ADC0_GAINVDD_MASK _DEVINFO_ADC0CAL1_GAINVDD_MASK
mbed_official 50:a417edff4437 123 #endif
mbed_official 50:a417edff4437 124
mbed_official 50:a417edff4437 125 #if defined( _DEVINFO_ADC0CAL1_VDD_GAIN_SHIFT )
mbed_official 50:a417edff4437 126 #define DEVINFO_ADC0_GAINVDD_SHIFT _DEVINFO_ADC0CAL1_VDD_GAIN_SHIFT
mbed_official 50:a417edff4437 127 #elif defined( _DEVINFO_ADC0CAL1_GAINVDD_SHIFT )
mbed_official 50:a417edff4437 128 #define DEVINFO_ADC0_GAINVDD_SHIFT _DEVINFO_ADC0CAL1_GAINVDD_SHIFT
mbed_official 50:a417edff4437 129 #endif
mbed_official 50:a417edff4437 130
mbed_official 50:a417edff4437 131 #if defined( _DEVINFO_ADC0CAL1_VDD_OFFSET_MASK )
mbed_official 50:a417edff4437 132 #define DEVINFO_ADC0_OFFSETVDD_MASK _DEVINFO_ADC0CAL1_VDD_OFFSET_MASK
mbed_official 50:a417edff4437 133 #elif defined( _DEVINFO_ADC0CAL1_OFFSETVDD_MASK )
mbed_official 50:a417edff4437 134 #define DEVINFO_ADC0_OFFSETVDD_MASK _DEVINFO_ADC0CAL1_OFFSETVDD_MASK
mbed_official 50:a417edff4437 135 #endif
mbed_official 50:a417edff4437 136
mbed_official 50:a417edff4437 137 #if defined( _DEVINFO_ADC0CAL1_VDD_OFFSET_SHIFT )
mbed_official 50:a417edff4437 138 #define DEVINFO_ADC0_OFFSETVDD_SHIFT _DEVINFO_ADC0CAL1_VDD_OFFSET_SHIFT
mbed_official 50:a417edff4437 139 #elif defined( _DEVINFO_ADC0CAL1_OFFSETVDD_SHIFT )
mbed_official 50:a417edff4437 140 #define DEVINFO_ADC0_OFFSETVDD_SHIFT _DEVINFO_ADC0CAL1_OFFSETVDD_SHIFT
mbed_official 50:a417edff4437 141 #endif
mbed_official 50:a417edff4437 142
mbed_official 50:a417edff4437 143 #if defined( _DEVINFO_ADC0CAL1_5VDIFF_GAIN_MASK )
mbed_official 50:a417edff4437 144 #define DEVINFO_ADC0_GAIN5VDIFF_MASK _DEVINFO_ADC0CAL1_5VDIFF_GAIN_MASK
mbed_official 50:a417edff4437 145 #elif defined( _DEVINFO_ADC0CAL1_GAIN5VDIFF_MASK )
mbed_official 50:a417edff4437 146 #define DEVINFO_ADC0_GAIN5VDIFF_MASK _DEVINFO_ADC0CAL1_GAIN5VDIFF_MASK
mbed_official 50:a417edff4437 147 #endif
mbed_official 50:a417edff4437 148
mbed_official 50:a417edff4437 149 #if defined( _DEVINFO_ADC0CAL1_5VDIFF_GAIN_SHIFT )
mbed_official 50:a417edff4437 150 #define DEVINFO_ADC0_GAIN5VDIFF_SHIFT _DEVINFO_ADC0CAL1_5VDIFF_GAIN_SHIFT
mbed_official 50:a417edff4437 151 #elif defined( _DEVINFO_ADC0CAL1_GAIN5VDIFF_SHIFT )
mbed_official 50:a417edff4437 152 #define DEVINFO_ADC0_GAIN5VDIFF_SHIFT _DEVINFO_ADC0CAL1_GAIN5VDIFF_SHIFT
mbed_official 50:a417edff4437 153 #endif
mbed_official 50:a417edff4437 154
mbed_official 50:a417edff4437 155 #if defined( _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_MASK )
mbed_official 50:a417edff4437 156 #define DEVINFO_ADC0_OFFSET5VDIFF_MASK _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_MASK
mbed_official 50:a417edff4437 157 #elif defined( _DEVINFO_ADC0CAL1_OFFSET5VDIFF_MASK )
mbed_official 50:a417edff4437 158 #define DEVINFO_ADC0_OFFSET5VDIFF_MASK _DEVINFO_ADC0CAL1_OFFSET5VDIFF_MASK
mbed_official 50:a417edff4437 159 #endif
mbed_official 50:a417edff4437 160
mbed_official 50:a417edff4437 161 #if defined( _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_SHIFT )
mbed_official 50:a417edff4437 162 #define DEVINFO_ADC0_OFFSET5VDIFF_SHIFT _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_SHIFT
mbed_official 50:a417edff4437 163 #elif defined( _DEVINFO_ADC0CAL1_OFFSET5VDIFF_SHIFT )
mbed_official 50:a417edff4437 164 #define DEVINFO_ADC0_OFFSET5VDIFF_SHIFT _DEVINFO_ADC0CAL1_OFFSET5VDIFF_SHIFT
mbed_official 50:a417edff4437 165 #endif
mbed_official 50:a417edff4437 166
mbed_official 50:a417edff4437 167 #if defined( _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_MASK )
mbed_official 50:a417edff4437 168 #define DEVINFO_ADC0_OFFSET2XVDD_MASK _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_MASK
mbed_official 50:a417edff4437 169 #elif defined( _DEVINFO_ADC0CAL2_OFFSET2XVDD_MASK )
mbed_official 50:a417edff4437 170 #define DEVINFO_ADC0_OFFSET2XVDD_MASK _DEVINFO_ADC0CAL2_OFFSET2XVDD_MASK
mbed_official 50:a417edff4437 171 #endif
mbed_official 50:a417edff4437 172
mbed_official 50:a417edff4437 173 #if defined( _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_SHIFT )
mbed_official 50:a417edff4437 174 #define DEVINFO_ADC0_OFFSET2XVDD_SHIFT _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_SHIFT
mbed_official 50:a417edff4437 175 #elif defined( _DEVINFO_ADC0CAL2_OFFSET2XVDD_SHIFT )
mbed_official 50:a417edff4437 176 #define DEVINFO_ADC0_OFFSET2XVDD_SHIFT _DEVINFO_ADC0CAL2_OFFSET2XVDD_SHIFT
mbed_official 50:a417edff4437 177 #endif
mbed_official 50:a417edff4437 178
bogdanm 0:9b334a45a8ff 179 /** @endcond */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /*******************************************************************************
bogdanm 0:9b334a45a8ff 183 *************************** LOCAL FUNCTIONS *******************************
bogdanm 0:9b334a45a8ff 184 ******************************************************************************/
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 189 * @brief
mbed_official 50:a417edff4437 190 * Load ADC calibration register for a selected reference and conversion mode.
bogdanm 0:9b334a45a8ff 191 *
bogdanm 0:9b334a45a8ff 192 * @details
mbed_official 50:a417edff4437 193 * During production, calibration values are stored in the device
mbed_official 50:a417edff4437 194 * information page for internal references. Notice that for external references,
bogdanm 0:9b334a45a8ff 195 * calibration values must be determined explicitly, and this function
mbed_official 50:a417edff4437 196 * will not modify the calibration register for external references.
bogdanm 0:9b334a45a8ff 197 *
bogdanm 0:9b334a45a8ff 198 * @param[in] adc
bogdanm 0:9b334a45a8ff 199 * Pointer to ADC peripheral register block.
bogdanm 0:9b334a45a8ff 200 *
bogdanm 0:9b334a45a8ff 201 * @param[in] ref
bogdanm 0:9b334a45a8ff 202 * Reference to load calibrated values for. No values are loaded for
bogdanm 0:9b334a45a8ff 203 * external references.
mbed_official 50:a417edff4437 204 *
mbed_official 50:a417edff4437 205 * @param[in] setScanCal
mbed_official 50:a417edff4437 206 * Select scan mode (true) or single mode (false) calibration load.
bogdanm 0:9b334a45a8ff 207 ******************************************************************************/
mbed_official 50:a417edff4437 208 static void ADC_LoadDevinfoCal(ADC_TypeDef *adc,
mbed_official 50:a417edff4437 209 ADC_Ref_TypeDef ref,
mbed_official 50:a417edff4437 210 bool setScanCal)
bogdanm 0:9b334a45a8ff 211 {
mbed_official 50:a417edff4437 212 uint32_t calReg;
mbed_official 50:a417edff4437 213 uint32_t newCal;
mbed_official 50:a417edff4437 214 uint32_t mask;
mbed_official 50:a417edff4437 215 uint32_t shift;
bogdanm 0:9b334a45a8ff 216
mbed_official 50:a417edff4437 217 if (setScanCal)
mbed_official 50:a417edff4437 218 {
mbed_official 50:a417edff4437 219 shift = _ADC_CAL_SCANOFFSET_SHIFT;
mbed_official 50:a417edff4437 220 mask = ~(_ADC_CAL_SCANOFFSET_MASK
mbed_official 50:a417edff4437 221 #if defined( _ADC_CAL_SCANOFFSETINV_MASK )
mbed_official 50:a417edff4437 222 | _ADC_CAL_SCANOFFSETINV_MASK
mbed_official 50:a417edff4437 223 #endif
mbed_official 50:a417edff4437 224 | _ADC_CAL_SCANGAIN_MASK);
mbed_official 50:a417edff4437 225 }
mbed_official 50:a417edff4437 226 else
mbed_official 50:a417edff4437 227 {
mbed_official 50:a417edff4437 228 shift = _ADC_CAL_SINGLEOFFSET_SHIFT;
mbed_official 50:a417edff4437 229 mask = ~(_ADC_CAL_SINGLEOFFSET_MASK
mbed_official 50:a417edff4437 230 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
mbed_official 50:a417edff4437 231 | _ADC_CAL_SINGLEOFFSETINV_MASK
mbed_official 50:a417edff4437 232 #endif
mbed_official 50:a417edff4437 233 | _ADC_CAL_SINGLEGAIN_MASK);
mbed_official 50:a417edff4437 234 }
mbed_official 50:a417edff4437 235
mbed_official 50:a417edff4437 236 calReg = adc->CAL & mask;
mbed_official 50:a417edff4437 237 newCal = 0;
mbed_official 50:a417edff4437 238
bogdanm 0:9b334a45a8ff 239 switch (ref)
bogdanm 0:9b334a45a8ff 240 {
mbed_official 50:a417edff4437 241 case adcRef1V25:
mbed_official 50:a417edff4437 242 newCal |= ((DEVINFO->ADC0CAL0 & DEVINFO_ADC0_GAIN1V25_MASK)
mbed_official 50:a417edff4437 243 >> DEVINFO_ADC0_GAIN1V25_SHIFT)
mbed_official 50:a417edff4437 244 << _ADC_CAL_SINGLEGAIN_SHIFT;
mbed_official 50:a417edff4437 245 newCal |= ((DEVINFO->ADC0CAL0 & DEVINFO_ADC0_OFFSET1V25_MASK)
mbed_official 50:a417edff4437 246 >> DEVINFO_ADC0_OFFSET1V25_SHIFT)
mbed_official 50:a417edff4437 247 << _ADC_CAL_SINGLEOFFSET_SHIFT;
mbed_official 50:a417edff4437 248 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
mbed_official 50:a417edff4437 249 newCal |= ((DEVINFO->ADC0CAL0 & _DEVINFO_ADC0CAL0_NEGSEOFFSET1V25_MASK)
mbed_official 50:a417edff4437 250 >> _DEVINFO_ADC0CAL0_NEGSEOFFSET1V25_SHIFT)
mbed_official 50:a417edff4437 251 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
mbed_official 50:a417edff4437 252 #endif
mbed_official 50:a417edff4437 253 break;
bogdanm 0:9b334a45a8ff 254
mbed_official 50:a417edff4437 255 case adcRef2V5:
mbed_official 50:a417edff4437 256 newCal |= ((DEVINFO->ADC0CAL0 & DEVINFO_ADC0_GAIN2V5_MASK)
mbed_official 50:a417edff4437 257 >> DEVINFO_ADC0_GAIN2V5_SHIFT)
mbed_official 50:a417edff4437 258 << _ADC_CAL_SINGLEGAIN_SHIFT;
mbed_official 50:a417edff4437 259 newCal |= ((DEVINFO->ADC0CAL0 & DEVINFO_ADC0_OFFSET2V5_MASK)
mbed_official 50:a417edff4437 260 >> DEVINFO_ADC0_OFFSET2V5_SHIFT)
mbed_official 50:a417edff4437 261 << _ADC_CAL_SINGLEOFFSET_SHIFT;
mbed_official 50:a417edff4437 262 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
mbed_official 50:a417edff4437 263 newCal |= ((DEVINFO->ADC0CAL0 & _DEVINFO_ADC0CAL0_NEGSEOFFSET2V5_MASK)
mbed_official 50:a417edff4437 264 >> _DEVINFO_ADC0CAL0_NEGSEOFFSET2V5_SHIFT)
mbed_official 50:a417edff4437 265 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
mbed_official 50:a417edff4437 266 #endif
mbed_official 50:a417edff4437 267 break;
bogdanm 0:9b334a45a8ff 268
mbed_official 50:a417edff4437 269 case adcRefVDD:
mbed_official 50:a417edff4437 270 newCal |= ((DEVINFO->ADC0CAL1 & DEVINFO_ADC0_GAINVDD_MASK)
mbed_official 50:a417edff4437 271 >> DEVINFO_ADC0_GAINVDD_SHIFT)
mbed_official 50:a417edff4437 272 << _ADC_CAL_SINGLEGAIN_SHIFT;
mbed_official 50:a417edff4437 273 newCal |= ((DEVINFO->ADC0CAL1 & DEVINFO_ADC0_OFFSETVDD_MASK)
mbed_official 50:a417edff4437 274 >> DEVINFO_ADC0_OFFSETVDD_SHIFT)
mbed_official 50:a417edff4437 275 << _ADC_CAL_SINGLEOFFSET_SHIFT;
mbed_official 50:a417edff4437 276 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
mbed_official 50:a417edff4437 277 newCal |= ((DEVINFO->ADC0CAL1 & _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_MASK)
mbed_official 50:a417edff4437 278 >> _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_SHIFT)
mbed_official 50:a417edff4437 279 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
mbed_official 50:a417edff4437 280 #endif
mbed_official 50:a417edff4437 281 break;
bogdanm 0:9b334a45a8ff 282
mbed_official 50:a417edff4437 283 case adcRef5VDIFF:
mbed_official 50:a417edff4437 284 newCal |= ((DEVINFO->ADC0CAL1 & DEVINFO_ADC0_GAIN5VDIFF_MASK)
mbed_official 50:a417edff4437 285 >> DEVINFO_ADC0_GAIN5VDIFF_SHIFT)
mbed_official 50:a417edff4437 286 << _ADC_CAL_SINGLEGAIN_SHIFT;
mbed_official 50:a417edff4437 287 newCal |= ((DEVINFO->ADC0CAL1 & DEVINFO_ADC0_OFFSET5VDIFF_MASK)
mbed_official 50:a417edff4437 288 >> DEVINFO_ADC0_OFFSET5VDIFF_SHIFT)
mbed_official 50:a417edff4437 289 << _ADC_CAL_SINGLEOFFSET_SHIFT;
mbed_official 50:a417edff4437 290 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
mbed_official 50:a417edff4437 291 newCal |= ((DEVINFO->ADC0CAL1 & _DEVINFO_ADC0CAL1_NEGSEOFFSET5VDIFF_MASK)
mbed_official 50:a417edff4437 292 >> _DEVINFO_ADC0CAL1_NEGSEOFFSET5VDIFF_SHIFT)
mbed_official 50:a417edff4437 293 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
mbed_official 50:a417edff4437 294 #endif
mbed_official 50:a417edff4437 295 break;
bogdanm 0:9b334a45a8ff 296
mbed_official 50:a417edff4437 297 case adcRef2xVDD:
mbed_official 50:a417edff4437 298 /* There is no gain calibration for this reference */
mbed_official 50:a417edff4437 299 newCal |= ((DEVINFO->ADC0CAL2 & DEVINFO_ADC0_OFFSET2XVDD_MASK)
mbed_official 50:a417edff4437 300 >> DEVINFO_ADC0_OFFSET2XVDD_SHIFT)
mbed_official 50:a417edff4437 301 << _ADC_CAL_SINGLEOFFSET_SHIFT;
mbed_official 50:a417edff4437 302 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
mbed_official 50:a417edff4437 303 newCal |= ((DEVINFO->ADC0CAL2 & _DEVINFO_ADC0CAL2_NEGSEOFFSET2XVDD_MASK)
mbed_official 50:a417edff4437 304 >> _DEVINFO_ADC0CAL2_NEGSEOFFSET2XVDD_SHIFT)
mbed_official 50:a417edff4437 305 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
mbed_official 50:a417edff4437 306 #endif
mbed_official 50:a417edff4437 307 break;
bogdanm 0:9b334a45a8ff 308
mbed_official 50:a417edff4437 309 #if defined( _ADC_SINGLECTRLX_VREFSEL_VDDXWATT )
mbed_official 50:a417edff4437 310 case adcRefVddxAtt:
mbed_official 50:a417edff4437 311 newCal |= ((DEVINFO->ADC0CAL1 & DEVINFO_ADC0_GAINVDD_MASK)
mbed_official 50:a417edff4437 312 >> DEVINFO_ADC0_GAINVDD_SHIFT)
mbed_official 50:a417edff4437 313 << _ADC_CAL_SINGLEGAIN_SHIFT;
mbed_official 50:a417edff4437 314 newCal |= ((DEVINFO->ADC0CAL1 & DEVINFO_ADC0_OFFSETVDD_MASK)
mbed_official 50:a417edff4437 315 >> DEVINFO_ADC0_OFFSETVDD_SHIFT)
mbed_official 50:a417edff4437 316 << _ADC_CAL_SINGLEOFFSET_SHIFT;
mbed_official 50:a417edff4437 317 newCal |= ((DEVINFO->ADC0CAL1 & _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_MASK)
mbed_official 50:a417edff4437 318 >> _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_SHIFT)
mbed_official 50:a417edff4437 319 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
mbed_official 50:a417edff4437 320 break;
mbed_official 50:a417edff4437 321 #endif
bogdanm 0:9b334a45a8ff 322
mbed_official 50:a417edff4437 323 /* For external references, the calibration must be determined for the
mbed_official 50:a417edff4437 324 specific application and set by the user. Calibration data is also not
mbed_official 50:a417edff4437 325 available for the internal references adcRefVBGR, adcRefVEntropy and
mbed_official 50:a417edff4437 326 adcRefVBGRlow. */
mbed_official 50:a417edff4437 327 default:
mbed_official 50:a417edff4437 328 newCal = 0;
mbed_official 50:a417edff4437 329 break;
mbed_official 50:a417edff4437 330 }
bogdanm 0:9b334a45a8ff 331
mbed_official 50:a417edff4437 332 adc->CAL = calReg | (newCal << shift);
bogdanm 0:9b334a45a8ff 333 }
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 /** @endcond */
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 /*******************************************************************************
bogdanm 0:9b334a45a8ff 338 ************************** GLOBAL FUNCTIONS *******************************
bogdanm 0:9b334a45a8ff 339 ******************************************************************************/
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 342 * @brief
bogdanm 0:9b334a45a8ff 343 * Initialize ADC.
bogdanm 0:9b334a45a8ff 344 *
bogdanm 0:9b334a45a8ff 345 * @details
bogdanm 0:9b334a45a8ff 346 * Initializes common parts for both single conversion and scan sequence.
bogdanm 0:9b334a45a8ff 347 * In addition, single and/or scan control configuration must be done, please
bogdanm 0:9b334a45a8ff 348 * refer to ADC_InitSingle() and ADC_InitScan() respectively.
bogdanm 0:9b334a45a8ff 349 *
mbed_official 50:a417edff4437 350 * On ADC architectures with the ADCn->SCANCHCONF register,
mbed_official 50:a417edff4437 351 * ADC_ScanSingleEndedInit() and ADC_ScanDifferentialInit() can be used to
mbed_official 50:a417edff4437 352 * assist scan conversion input setup.
mbed_official 50:a417edff4437 353 *
bogdanm 0:9b334a45a8ff 354 * @note
bogdanm 0:9b334a45a8ff 355 * This function will stop any ongoing conversion.
bogdanm 0:9b334a45a8ff 356 *
bogdanm 0:9b334a45a8ff 357 * @param[in] adc
bogdanm 0:9b334a45a8ff 358 * Pointer to ADC peripheral register block.
bogdanm 0:9b334a45a8ff 359 *
bogdanm 0:9b334a45a8ff 360 * @param[in] init
bogdanm 0:9b334a45a8ff 361 * Pointer to ADC initialization structure.
bogdanm 0:9b334a45a8ff 362 ******************************************************************************/
bogdanm 0:9b334a45a8ff 363 void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init)
bogdanm 0:9b334a45a8ff 364 {
bogdanm 0:9b334a45a8ff 365 uint32_t tmp;
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367 EFM_ASSERT(ADC_REF_VALID(adc));
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 /* Make sure conversion is not in progress */
bogdanm 0:9b334a45a8ff 370 adc->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP;
bogdanm 0:9b334a45a8ff 371
mbed_official 50:a417edff4437 372 tmp = ((uint32_t)(init->ovsRateSel) << _ADC_CTRL_OVSRSEL_SHIFT)
mbed_official 50:a417edff4437 373 | (((uint32_t)(init->timebase) << _ADC_CTRL_TIMEBASE_SHIFT)
mbed_official 50:a417edff4437 374 & _ADC_CTRL_TIMEBASE_MASK)
mbed_official 50:a417edff4437 375 | (((uint32_t)(init->prescale) << _ADC_CTRL_PRESC_SHIFT)
mbed_official 50:a417edff4437 376 & _ADC_CTRL_PRESC_MASK)
mbed_official 50:a417edff4437 377 #if defined ( _ADC_CTRL_LPFMODE_MASK )
mbed_official 50:a417edff4437 378 | ((uint32_t)(init->lpfMode) << _ADC_CTRL_LPFMODE_SHIFT)
mbed_official 50:a417edff4437 379 #endif
mbed_official 50:a417edff4437 380 | ((uint32_t)(init->warmUpMode) << _ADC_CTRL_WARMUPMODE_SHIFT);
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 if (init->tailgate)
bogdanm 0:9b334a45a8ff 383 {
bogdanm 0:9b334a45a8ff 384 tmp |= ADC_CTRL_TAILGATE;
bogdanm 0:9b334a45a8ff 385 }
mbed_official 50:a417edff4437 386 adc->CTRL = tmp;
bogdanm 0:9b334a45a8ff 387
mbed_official 50:a417edff4437 388 /* Set ADC EM2 clock configuration */
mbed_official 50:a417edff4437 389 #if defined( _ADC_CTRL_ADCCLKMODE_MASK )
mbed_official 50:a417edff4437 390 BUS_RegMaskedWrite(&ADC0->CTRL,
mbed_official 50:a417edff4437 391 _ADC_CTRL_ADCCLKMODE_MASK | _ADC_CTRL_ASYNCCLKEN_MASK,
mbed_official 50:a417edff4437 392 init->em2ClockConfig << _ADC_CTRL_ASYNCCLKEN_SHIFT);
mbed_official 50:a417edff4437 393 #endif
mbed_official 50:a417edff4437 394
mbed_official 50:a417edff4437 395 #if defined( _SILICON_LABS_32B_PLATFORM_2 )
mbed_official 50:a417edff4437 396 /* Fix for errata ADC_EXXX */
mbed_official 50:a417edff4437 397 ADC_IntClear(adc, ADC_IFC_SCANUF);
mbed_official 50:a417edff4437 398 #endif
mbed_official 50:a417edff4437 399 }
mbed_official 50:a417edff4437 400
mbed_official 50:a417edff4437 401
mbed_official 50:a417edff4437 402 #if defined( _ADC_SCANINPUTSEL_MASK )
mbed_official 50:a417edff4437 403 /***************************************************************************//**
mbed_official 50:a417edff4437 404 * @brief
mbed_official 50:a417edff4437 405 * Clear ADC scan input configuration.
mbed_official 50:a417edff4437 406 *
mbed_official 50:a417edff4437 407 * @param[in] scanInit
mbed_official 50:a417edff4437 408 * Struct to hold the scan configuration, input configuration.
mbed_official 50:a417edff4437 409 ******************************************************************************/
mbed_official 50:a417edff4437 410 void ADC_ScanInputClear(ADC_InitScan_TypeDef *scanInit)
mbed_official 50:a417edff4437 411 {
mbed_official 50:a417edff4437 412 /* Clear input configuration */
mbed_official 50:a417edff4437 413
mbed_official 50:a417edff4437 414 /* Select none */
mbed_official 50:a417edff4437 415 scanInit->scanInputConfig.scanInputSel = 0xFFFFFFFF;
mbed_official 50:a417edff4437 416 scanInit->scanInputConfig.scanInputEn = 0;
mbed_official 50:a417edff4437 417
mbed_official 50:a417edff4437 418 /* Default alternative negative inputs */
mbed_official 50:a417edff4437 419 scanInit->scanInputConfig.scanNegSel = _ADC_SCANNEGSEL_RESETVALUE;
mbed_official 50:a417edff4437 420 }
mbed_official 50:a417edff4437 421
mbed_official 50:a417edff4437 422
mbed_official 50:a417edff4437 423 /***************************************************************************//**
mbed_official 50:a417edff4437 424 * @brief
mbed_official 50:a417edff4437 425 * Initialize ADC scan single-ended input configuration.
mbed_official 50:a417edff4437 426 *
mbed_official 50:a417edff4437 427 * @details
mbed_official 50:a417edff4437 428 * Set configuration for ADC scan conversion with single-ended inputs. The
mbed_official 50:a417edff4437 429 * ADC_InitScan_TypeDef struct updated from this function should be passed to
mbed_official 50:a417edff4437 430 * ADC_InitScan().
mbed_official 50:a417edff4437 431 *
mbed_official 50:a417edff4437 432 * @param[in] inputGroup
mbed_official 50:a417edff4437 433 * ADC scan input group. See section 25.3.4 in the reference manual for
mbed_official 50:a417edff4437 434 * more information.
mbed_official 50:a417edff4437 435 *
mbed_official 50:a417edff4437 436 * @param[in] singleEndedSel
mbed_official 50:a417edff4437 437 * APORT select.
mbed_official 50:a417edff4437 438 *
mbed_official 50:a417edff4437 439 * @return
mbed_official 50:a417edff4437 440 * Scan ID of selected ADC input. ee section 25.3.4 in the reference manual for
mbed_official 50:a417edff4437 441 * more information. Note that the returned integer represents the bit position
mbed_official 50:a417edff4437 442 * in ADCn_SCANMASK set by this function. The accumulated mask is stored in
mbed_official 50:a417edff4437 443 * scanInit->scanInputConfig->scanInputEn.
mbed_official 50:a417edff4437 444 ******************************************************************************/
mbed_official 50:a417edff4437 445 uint32_t ADC_ScanSingleEndedInputAdd(ADC_InitScan_TypeDef *scanInit,
mbed_official 50:a417edff4437 446 ADC_ScanInputGroup_TypeDef inputGroup,
mbed_official 50:a417edff4437 447 ADC_PosSel_TypeDef singleEndedSel)
mbed_official 50:a417edff4437 448 {
mbed_official 50:a417edff4437 449 uint32_t currentSel;
mbed_official 50:a417edff4437 450 uint32_t newSel;
mbed_official 50:a417edff4437 451 uint32_t scanId;
mbed_official 50:a417edff4437 452
mbed_official 50:a417edff4437 453 scanInit->diff = false;
mbed_official 50:a417edff4437 454
mbed_official 50:a417edff4437 455 /* Check for unsupported APORTs */
mbed_official 50:a417edff4437 456 EFM_ASSERT((singleEndedSel <= adcPosSelAPORT0YCH0) || (singleEndedSel >= adcPosSelAPORT0YCH15));
mbed_official 50:a417edff4437 457
mbed_official 50:a417edff4437 458 /* Decode the input group select by shifting right by 3 */
mbed_official 50:a417edff4437 459 newSel = singleEndedSel >> 3;
mbed_official 50:a417edff4437 460
mbed_official 50:a417edff4437 461 currentSel = (scanInit->scanInputConfig.scanInputSel >> (inputGroup * 8)) & 0xFF;
mbed_official 50:a417edff4437 462
mbed_official 50:a417edff4437 463 /* If none selected */
mbed_official 50:a417edff4437 464 if (currentSel == 0xFF)
mbed_official 50:a417edff4437 465 {
mbed_official 50:a417edff4437 466 scanInit->scanInputConfig.scanInputSel &= ~(0xFF << (inputGroup * 8));
mbed_official 50:a417edff4437 467 scanInit->scanInputConfig.scanInputSel |= (newSel << (inputGroup * 8));
mbed_official 50:a417edff4437 468 }
mbed_official 50:a417edff4437 469 else if (currentSel == newSel)
mbed_official 50:a417edff4437 470 {
mbed_official 50:a417edff4437 471 /* Ok, but do nothing. */
mbed_official 50:a417edff4437 472 }
mbed_official 50:a417edff4437 473 else
mbed_official 50:a417edff4437 474 {
mbed_official 50:a417edff4437 475 /* Invalid channel range. A range is already selected for this group. */
mbed_official 50:a417edff4437 476 EFM_ASSERT(false);
mbed_official 50:a417edff4437 477 }
mbed_official 50:a417edff4437 478
mbed_official 50:a417edff4437 479 /* Update and return scan input enable mask (SCANMASK) */
mbed_official 50:a417edff4437 480 scanId = (inputGroup * 8) + (singleEndedSel & 0x7);
mbed_official 50:a417edff4437 481 EFM_ASSERT(scanId < 32);
mbed_official 50:a417edff4437 482 scanInit->scanInputConfig.scanInputEn |= 0x1 << scanId;
mbed_official 50:a417edff4437 483 return scanId;
bogdanm 0:9b334a45a8ff 484 }
bogdanm 0:9b334a45a8ff 485
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 488 * @brief
mbed_official 50:a417edff4437 489 * Initialize ADC scan differential input configuration.
mbed_official 50:a417edff4437 490 *
mbed_official 50:a417edff4437 491 * @details
mbed_official 50:a417edff4437 492 * Set configuration for ADC scan conversion with differential inputs. The
mbed_official 50:a417edff4437 493 * ADC_InitScan_TypeDef struct updated by this function should be passed to
mbed_official 50:a417edff4437 494 * ADC_InitScan().
mbed_official 50:a417edff4437 495 *
mbed_official 50:a417edff4437 496 * @param[in] scanInit
mbed_official 50:a417edff4437 497 * Struct to hold the scan and input configuration.
mbed_official 50:a417edff4437 498 *
mbed_official 50:a417edff4437 499 * @param[in] inputGroup
mbed_official 50:a417edff4437 500 * ADC scan input group. See section 25.3.4 in the reference manual for
mbed_official 50:a417edff4437 501 * more information.
mbed_official 50:a417edff4437 502 *
mbed_official 50:a417edff4437 503 * @param[in] posSel
mbed_official 50:a417edff4437 504 * APORT bus pair select. The negative terminal is implicitly selected by
mbed_official 50:a417edff4437 505 * the positive terminal.
mbed_official 50:a417edff4437 506 *
mbed_official 50:a417edff4437 507 * @param[in] negInput
mbed_official 50:a417edff4437 508 * ADC scan alternative negative input. Set to adcScanNegInputDefault to select
mbed_official 50:a417edff4437 509 * default negative input (implicit from posSel).
mbed_official 50:a417edff4437 510 *
mbed_official 50:a417edff4437 511 * @return
mbed_official 50:a417edff4437 512 * Scan ID of selected ADC input. ee section 25.3.4 in the reference manual for
mbed_official 50:a417edff4437 513 * more information. Note that the returned integer represents the bit position
mbed_official 50:a417edff4437 514 * in ADCn_SCANMASK set by this function. The accumulated mask is stored in
mbed_official 50:a417edff4437 515 * scanInit->scanInputConfig->scanInputEn.
mbed_official 50:a417edff4437 516 ******************************************************************************/
mbed_official 50:a417edff4437 517 uint32_t ADC_ScanDifferentialInputAdd(ADC_InitScan_TypeDef *scanInit,
mbed_official 50:a417edff4437 518 ADC_ScanInputGroup_TypeDef inputGroup,
mbed_official 50:a417edff4437 519 ADC_PosSel_TypeDef posSel,
mbed_official 50:a417edff4437 520 ADC_ScanNegInput_TypeDef negInput)
mbed_official 50:a417edff4437 521 {
mbed_official 50:a417edff4437 522 uint32_t negInputRegMask = 0;
mbed_official 50:a417edff4437 523 uint32_t negInputRegShift = 0;
mbed_official 50:a417edff4437 524 uint32_t negInputRegVal = 0;
mbed_official 50:a417edff4437 525 uint32_t scanId = 0;
mbed_official 50:a417edff4437 526
mbed_official 50:a417edff4437 527 /* Do a single ended init, then update for differential scan. */
mbed_official 50:a417edff4437 528 scanId = ADC_ScanSingleEndedInputAdd(scanInit, inputGroup, posSel);
mbed_official 50:a417edff4437 529
mbed_official 50:a417edff4437 530 /* Reset to differential mode */
mbed_official 50:a417edff4437 531 scanInit->diff = true;
mbed_official 50:a417edff4437 532
mbed_official 50:a417edff4437 533 /* Set negative ADC input, unless the default is selected. */
mbed_official 50:a417edff4437 534 if (negInput != adcScanNegInputDefault)
mbed_official 50:a417edff4437 535 {
mbed_official 50:a417edff4437 536 if (scanId == 0)
mbed_official 50:a417edff4437 537 {
mbed_official 50:a417edff4437 538 negInputRegMask = _ADC_SCANNEGSEL_INPUT0NEGSEL_MASK;
mbed_official 50:a417edff4437 539 negInputRegShift = _ADC_SCANNEGSEL_INPUT0NEGSEL_SHIFT;
mbed_official 50:a417edff4437 540 EFM_ASSERT(inputGroup == 0);
mbed_official 50:a417edff4437 541 }
mbed_official 50:a417edff4437 542 else if (scanId == 2)
mbed_official 50:a417edff4437 543 {
mbed_official 50:a417edff4437 544 negInputRegMask = _ADC_SCANNEGSEL_INPUT2NEGSEL_MASK;
mbed_official 50:a417edff4437 545 negInputRegShift = _ADC_SCANNEGSEL_INPUT2NEGSEL_SHIFT;
mbed_official 50:a417edff4437 546 EFM_ASSERT(inputGroup == 0);
mbed_official 50:a417edff4437 547 }
mbed_official 50:a417edff4437 548 else if (scanId == 4)
mbed_official 50:a417edff4437 549 {
mbed_official 50:a417edff4437 550 negInputRegMask = _ADC_SCANNEGSEL_INPUT4NEGSEL_MASK;
mbed_official 50:a417edff4437 551 negInputRegShift = _ADC_SCANNEGSEL_INPUT4NEGSEL_SHIFT;
mbed_official 50:a417edff4437 552 EFM_ASSERT(inputGroup == 0);
mbed_official 50:a417edff4437 553 }
mbed_official 50:a417edff4437 554 else if (scanId == 6)
mbed_official 50:a417edff4437 555 {
mbed_official 50:a417edff4437 556 negInputRegMask = _ADC_SCANNEGSEL_INPUT6NEGSEL_MASK;
mbed_official 50:a417edff4437 557 negInputRegShift = _ADC_SCANNEGSEL_INPUT6NEGSEL_SHIFT;
mbed_official 50:a417edff4437 558 EFM_ASSERT(inputGroup == 0);
mbed_official 50:a417edff4437 559 }
mbed_official 50:a417edff4437 560 else if (scanId == 9)
mbed_official 50:a417edff4437 561 {
mbed_official 50:a417edff4437 562 negInputRegMask = _ADC_SCANNEGSEL_INPUT9NEGSEL_MASK;
mbed_official 50:a417edff4437 563 negInputRegShift = _ADC_SCANNEGSEL_INPUT9NEGSEL_SHIFT;
mbed_official 50:a417edff4437 564 EFM_ASSERT(inputGroup == 1);
mbed_official 50:a417edff4437 565 }
mbed_official 50:a417edff4437 566 else if (scanId == 11)
mbed_official 50:a417edff4437 567 {
mbed_official 50:a417edff4437 568 negInputRegMask = _ADC_SCANNEGSEL_INPUT11NEGSEL_MASK;
mbed_official 50:a417edff4437 569 negInputRegShift = _ADC_SCANNEGSEL_INPUT11NEGSEL_SHIFT;
mbed_official 50:a417edff4437 570 EFM_ASSERT(inputGroup == 1);
mbed_official 50:a417edff4437 571 }
mbed_official 50:a417edff4437 572 else if (scanId == 13)
mbed_official 50:a417edff4437 573 {
mbed_official 50:a417edff4437 574 negInputRegMask = _ADC_SCANNEGSEL_INPUT13NEGSEL_MASK;
mbed_official 50:a417edff4437 575 negInputRegShift = _ADC_SCANNEGSEL_INPUT13NEGSEL_SHIFT;
mbed_official 50:a417edff4437 576 EFM_ASSERT(inputGroup == 1);
mbed_official 50:a417edff4437 577 }
mbed_official 50:a417edff4437 578 else if (scanId == 15)
mbed_official 50:a417edff4437 579 {
mbed_official 50:a417edff4437 580 negInputRegMask = _ADC_SCANNEGSEL_INPUT15NEGSEL_MASK;
mbed_official 50:a417edff4437 581 negInputRegShift = _ADC_SCANNEGSEL_INPUT15NEGSEL_SHIFT;
mbed_official 50:a417edff4437 582 EFM_ASSERT(inputGroup == 1);
mbed_official 50:a417edff4437 583 }
mbed_official 50:a417edff4437 584 else
mbed_official 50:a417edff4437 585 {
mbed_official 50:a417edff4437 586 /* There is not negative input option for this positive input (negInput is posInput + 1). */
mbed_official 50:a417edff4437 587 EFM_ASSERT(false);
mbed_official 50:a417edff4437 588 }
mbed_official 50:a417edff4437 589
mbed_official 50:a417edff4437 590 /* Find ADC_SCANNEGSEL_CHxNSEL value for positive input 0, 2, 4 and 6 */
mbed_official 50:a417edff4437 591 if (inputGroup == 0)
mbed_official 50:a417edff4437 592 {
mbed_official 50:a417edff4437 593 switch (negInput)
mbed_official 50:a417edff4437 594 {
mbed_official 50:a417edff4437 595 case adcScanNegInput1:
mbed_official 50:a417edff4437 596 negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT1;
mbed_official 50:a417edff4437 597 break;
mbed_official 50:a417edff4437 598
mbed_official 50:a417edff4437 599 case adcScanNegInput3:
mbed_official 50:a417edff4437 600 negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT3;
mbed_official 50:a417edff4437 601 break;
mbed_official 50:a417edff4437 602
mbed_official 50:a417edff4437 603 case adcScanNegInput5:
mbed_official 50:a417edff4437 604 negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT5;
mbed_official 50:a417edff4437 605 break;
mbed_official 50:a417edff4437 606
mbed_official 50:a417edff4437 607 case adcScanNegInput7:
mbed_official 50:a417edff4437 608 negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT7;
mbed_official 50:a417edff4437 609 break;
mbed_official 50:a417edff4437 610
mbed_official 50:a417edff4437 611 default:
mbed_official 50:a417edff4437 612 /* Invalid selection. Options are input 1, 3, 5 and 7. */
mbed_official 50:a417edff4437 613 EFM_ASSERT(false);
mbed_official 50:a417edff4437 614 break;
mbed_official 50:a417edff4437 615 }
mbed_official 50:a417edff4437 616 }
mbed_official 50:a417edff4437 617 else if (inputGroup == 1)
mbed_official 50:a417edff4437 618 {
mbed_official 50:a417edff4437 619 /* Find ADC_SCANNEGSEL_CHxNSEL value for positive input 9, 11, 13 and 15 */
mbed_official 50:a417edff4437 620 switch (negInput)
mbed_official 50:a417edff4437 621 {
mbed_official 50:a417edff4437 622 case adcScanNegInput8:
mbed_official 50:a417edff4437 623 negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT8;
mbed_official 50:a417edff4437 624 break;
mbed_official 50:a417edff4437 625
mbed_official 50:a417edff4437 626 case adcScanNegInput10:
mbed_official 50:a417edff4437 627 negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT10;
mbed_official 50:a417edff4437 628 break;
mbed_official 50:a417edff4437 629
mbed_official 50:a417edff4437 630 case adcScanNegInput12:
mbed_official 50:a417edff4437 631 negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT12;
mbed_official 50:a417edff4437 632 break;
mbed_official 50:a417edff4437 633
mbed_official 50:a417edff4437 634 case adcScanNegInput14:
mbed_official 50:a417edff4437 635 negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT14;
mbed_official 50:a417edff4437 636 break;
mbed_official 50:a417edff4437 637
mbed_official 50:a417edff4437 638 default:
mbed_official 50:a417edff4437 639 /* Invalid selection. Options are input 8, 10, 12 and 14. */
mbed_official 50:a417edff4437 640 EFM_ASSERT(false);
mbed_official 50:a417edff4437 641 break;
mbed_official 50:a417edff4437 642 }
mbed_official 50:a417edff4437 643 }
mbed_official 50:a417edff4437 644 else
mbed_official 50:a417edff4437 645 {
mbed_official 50:a417edff4437 646 /* No alternative negative input for input group > 1 */
mbed_official 50:a417edff4437 647 EFM_ASSERT(false);
mbed_official 50:a417edff4437 648 }
mbed_official 50:a417edff4437 649
mbed_official 50:a417edff4437 650 /* Update config */
mbed_official 50:a417edff4437 651 scanInit->scanInputConfig.scanNegSel &= ~negInputRegMask;
mbed_official 50:a417edff4437 652 scanInit->scanInputConfig.scanNegSel |= negInputRegVal << negInputRegShift;
mbed_official 50:a417edff4437 653 }
mbed_official 50:a417edff4437 654 return scanId;
mbed_official 50:a417edff4437 655 }
mbed_official 50:a417edff4437 656 #endif
mbed_official 50:a417edff4437 657
mbed_official 50:a417edff4437 658
mbed_official 50:a417edff4437 659 /***************************************************************************//**
mbed_official 50:a417edff4437 660 * @brief
bogdanm 0:9b334a45a8ff 661 * Initialize ADC scan sequence.
bogdanm 0:9b334a45a8ff 662 *
bogdanm 0:9b334a45a8ff 663 * @details
bogdanm 0:9b334a45a8ff 664 * Please refer to ADC_Start() for starting scan sequence.
bogdanm 0:9b334a45a8ff 665 *
bogdanm 0:9b334a45a8ff 666 * When selecting an external reference, the gain and offset calibration
bogdanm 0:9b334a45a8ff 667 * must be set explicitly (CAL register). For other references, the
bogdanm 0:9b334a45a8ff 668 * calibration is updated with values defined during manufacturing.
bogdanm 0:9b334a45a8ff 669 *
bogdanm 0:9b334a45a8ff 670 * @note
bogdanm 0:9b334a45a8ff 671 * This function will stop any ongoing scan sequence.
bogdanm 0:9b334a45a8ff 672 *
bogdanm 0:9b334a45a8ff 673 * @param[in] adc
bogdanm 0:9b334a45a8ff 674 * Pointer to ADC peripheral register block.
bogdanm 0:9b334a45a8ff 675 *
bogdanm 0:9b334a45a8ff 676 * @param[in] init
bogdanm 0:9b334a45a8ff 677 * Pointer to ADC initialization structure.
bogdanm 0:9b334a45a8ff 678 ******************************************************************************/
bogdanm 0:9b334a45a8ff 679 void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init)
bogdanm 0:9b334a45a8ff 680 {
bogdanm 0:9b334a45a8ff 681 uint32_t tmp;
bogdanm 0:9b334a45a8ff 682
bogdanm 0:9b334a45a8ff 683 EFM_ASSERT(ADC_REF_VALID(adc));
bogdanm 0:9b334a45a8ff 684
bogdanm 0:9b334a45a8ff 685 /* Make sure scan sequence is not in progress */
bogdanm 0:9b334a45a8ff 686 adc->CMD = ADC_CMD_SCANSTOP;
bogdanm 0:9b334a45a8ff 687
mbed_official 50:a417edff4437 688 /* Load calibration data for selected reference */
mbed_official 50:a417edff4437 689 ADC_LoadDevinfoCal(adc, init->reference, true);
bogdanm 0:9b334a45a8ff 690
mbed_official 50:a417edff4437 691 tmp = 0
mbed_official 50:a417edff4437 692 #if defined ( _ADC_SCANCTRL_PRSSEL_MASK )
mbed_official 50:a417edff4437 693 | (init->prsSel << _ADC_SCANCTRL_PRSSEL_SHIFT)
mbed_official 50:a417edff4437 694 #endif
mbed_official 50:a417edff4437 695 | (init->acqTime << _ADC_SCANCTRL_AT_SHIFT)
mbed_official 50:a417edff4437 696 #if defined ( _ADC_SCANCTRL_INPUTMASK_MASK )
mbed_official 50:a417edff4437 697 | init->input
mbed_official 50:a417edff4437 698 #endif
mbed_official 50:a417edff4437 699 | (init->resolution << _ADC_SCANCTRL_RES_SHIFT);
bogdanm 0:9b334a45a8ff 700
bogdanm 0:9b334a45a8ff 701 if (init->prsEnable)
bogdanm 0:9b334a45a8ff 702 {
bogdanm 0:9b334a45a8ff 703 tmp |= ADC_SCANCTRL_PRSEN;
bogdanm 0:9b334a45a8ff 704 }
bogdanm 0:9b334a45a8ff 705
bogdanm 0:9b334a45a8ff 706 if (init->leftAdjust)
bogdanm 0:9b334a45a8ff 707 {
bogdanm 0:9b334a45a8ff 708 tmp |= ADC_SCANCTRL_ADJ_LEFT;
bogdanm 0:9b334a45a8ff 709 }
bogdanm 0:9b334a45a8ff 710
mbed_official 50:a417edff4437 711 #if defined( _ADC_SCANCTRL_INPUTMASK_MASK )
bogdanm 0:9b334a45a8ff 712 if (init->diff)
mbed_official 50:a417edff4437 713 #elif defined( _ADC_SCANINPUTSEL_MASK )
mbed_official 50:a417edff4437 714 if (init->diff)
mbed_official 50:a417edff4437 715 #endif
bogdanm 0:9b334a45a8ff 716 {
bogdanm 0:9b334a45a8ff 717 tmp |= ADC_SCANCTRL_DIFF;
bogdanm 0:9b334a45a8ff 718 }
bogdanm 0:9b334a45a8ff 719
bogdanm 0:9b334a45a8ff 720 if (init->rep)
bogdanm 0:9b334a45a8ff 721 {
mbed_official 50:a417edff4437 722 #if defined( _SILICON_LABS_32B_PLATFORM_2 )
mbed_official 50:a417edff4437 723 /* Scan repeat mode does not work on platform 2 as described in errata ADC_EXXX. */
mbed_official 50:a417edff4437 724 EFM_ASSERT(false);
mbed_official 50:a417edff4437 725 #endif
bogdanm 0:9b334a45a8ff 726 tmp |= ADC_SCANCTRL_REP;
bogdanm 0:9b334a45a8ff 727 }
bogdanm 0:9b334a45a8ff 728
mbed_official 50:a417edff4437 729 /* Set scan reference. Check if reference configuraion is extended to SCANCTRLX. */
mbed_official 50:a417edff4437 730 #if defined ( _ADC_SCANCTRLX_VREFSEL_MASK )
mbed_official 50:a417edff4437 731 if (init->reference & ADC_CTRLX_VREFSEL_REG)
mbed_official 50:a417edff4437 732 {
mbed_official 50:a417edff4437 733 /* Select extension register */
mbed_official 50:a417edff4437 734 tmp |= ADC_SCANCTRL_REF_CONF;
mbed_official 50:a417edff4437 735 }
mbed_official 50:a417edff4437 736 else
mbed_official 50:a417edff4437 737 {
mbed_official 50:a417edff4437 738 tmp |= init->reference << _ADC_SCANCTRL_REF_SHIFT;
mbed_official 50:a417edff4437 739 }
mbed_official 50:a417edff4437 740 #else
mbed_official 50:a417edff4437 741 tmp |= init->reference << _ADC_SCANCTRL_REF_SHIFT;
mbed_official 50:a417edff4437 742 #endif
mbed_official 50:a417edff4437 743
mbed_official 50:a417edff4437 744 #if defined( _ADC_SCANCTRL_INPUTMASK_MASK )
mbed_official 50:a417edff4437 745 tmp |= init->input;
mbed_official 50:a417edff4437 746 #endif
mbed_official 50:a417edff4437 747
bogdanm 0:9b334a45a8ff 748 adc->SCANCTRL = tmp;
mbed_official 50:a417edff4437 749
mbed_official 50:a417edff4437 750 /* Update SINGLECTRLX for reference select and PRS select */
mbed_official 50:a417edff4437 751 #if defined ( _ADC_SCANCTRLX_MASK )
mbed_official 50:a417edff4437 752 tmp = adc->SCANCTRLX & ~(_ADC_SCANCTRLX_VREFSEL_MASK
mbed_official 50:a417edff4437 753 | _ADC_SCANCTRLX_PRSSEL_MASK
mbed_official 50:a417edff4437 754 | _ADC_SCANCTRLX_FIFOOFACT_MASK);
mbed_official 50:a417edff4437 755 if (init->reference & ADC_CTRLX_VREFSEL_REG)
mbed_official 50:a417edff4437 756 {
mbed_official 50:a417edff4437 757 tmp |= (init->reference & ~ADC_CTRLX_VREFSEL_REG) << _ADC_SCANCTRLX_VREFSEL_SHIFT;
mbed_official 50:a417edff4437 758 }
mbed_official 50:a417edff4437 759
mbed_official 50:a417edff4437 760 tmp |= init->prsSel << _ADC_SCANCTRLX_PRSSEL_SHIFT;
mbed_official 50:a417edff4437 761
mbed_official 50:a417edff4437 762 if (init->fifoOverwrite)
mbed_official 50:a417edff4437 763 {
mbed_official 50:a417edff4437 764 tmp |= ADC_SCANCTRLX_FIFOOFACT_OVERWRITE;
mbed_official 50:a417edff4437 765 }
mbed_official 50:a417edff4437 766
mbed_official 50:a417edff4437 767 adc->SCANCTRLX = tmp;
mbed_official 50:a417edff4437 768 #endif
mbed_official 50:a417edff4437 769
mbed_official 50:a417edff4437 770 #if defined( _ADC_CTRL_SCANDMAWU_MASK )
mbed_official 50:a417edff4437 771 BUS_RegBitWrite(&adc->CTRL, _ADC_CTRL_SCANDMAWU_SHIFT, init->scanDmaEm2Wu);
mbed_official 50:a417edff4437 772 #endif
mbed_official 50:a417edff4437 773
mbed_official 50:a417edff4437 774 /* Write scan input configuration */
mbed_official 50:a417edff4437 775 #if defined( _ADC_SCANINPUTSEL_MASK )
mbed_official 50:a417edff4437 776 adc->SCANINPUTSEL = init->scanInputConfig.scanInputSel;
mbed_official 50:a417edff4437 777 adc->SCANMASK = init->scanInputConfig.scanInputEn;
mbed_official 50:a417edff4437 778 adc->SCANNEGSEL = init->scanInputConfig.scanNegSel;
mbed_official 50:a417edff4437 779 #endif
mbed_official 50:a417edff4437 780
mbed_official 50:a417edff4437 781 /* Assert for any APORT bus conflicts programming errors */
mbed_official 50:a417edff4437 782 #if defined( _ADC_BUSCONFLICT_MASK )
mbed_official 50:a417edff4437 783 tmp = adc->BUSREQ;
mbed_official 50:a417edff4437 784 EFM_ASSERT(!(tmp & adc->BUSCONFLICT));
mbed_official 50:a417edff4437 785 EFM_ASSERT(!(adc->STATUS & _ADC_STATUS_PROGERR_MASK));
mbed_official 50:a417edff4437 786 #endif
bogdanm 0:9b334a45a8ff 787 }
bogdanm 0:9b334a45a8ff 788
bogdanm 0:9b334a45a8ff 789
bogdanm 0:9b334a45a8ff 790 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 791 * @brief
bogdanm 0:9b334a45a8ff 792 * Initialize single ADC sample conversion.
bogdanm 0:9b334a45a8ff 793 *
bogdanm 0:9b334a45a8ff 794 * @details
bogdanm 0:9b334a45a8ff 795 * Please refer to ADC_Start() for starting single conversion.
bogdanm 0:9b334a45a8ff 796 *
bogdanm 0:9b334a45a8ff 797 * When selecting an external reference, the gain and offset calibration
bogdanm 0:9b334a45a8ff 798 * must be set explicitly (CAL register). For other references, the
bogdanm 0:9b334a45a8ff 799 * calibration is updated with values defined during manufacturing.
bogdanm 0:9b334a45a8ff 800 *
bogdanm 0:9b334a45a8ff 801 * @note
bogdanm 0:9b334a45a8ff 802 * This function will stop any ongoing single conversion.
bogdanm 0:9b334a45a8ff 803 *
bogdanm 0:9b334a45a8ff 804 * @param[in] adc
bogdanm 0:9b334a45a8ff 805 * Pointer to ADC peripheral register block.
bogdanm 0:9b334a45a8ff 806 *
bogdanm 0:9b334a45a8ff 807 * @param[in] init
bogdanm 0:9b334a45a8ff 808 * Pointer to ADC initialization structure.
bogdanm 0:9b334a45a8ff 809 ******************************************************************************/
bogdanm 0:9b334a45a8ff 810 void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init)
bogdanm 0:9b334a45a8ff 811 {
bogdanm 0:9b334a45a8ff 812 uint32_t tmp;
bogdanm 0:9b334a45a8ff 813
bogdanm 0:9b334a45a8ff 814 EFM_ASSERT(ADC_REF_VALID(adc));
bogdanm 0:9b334a45a8ff 815
bogdanm 0:9b334a45a8ff 816 /* Make sure single conversion is not in progress */
bogdanm 0:9b334a45a8ff 817 adc->CMD = ADC_CMD_SINGLESTOP;
bogdanm 0:9b334a45a8ff 818
mbed_official 50:a417edff4437 819 /* Load calibration data for selected reference */
mbed_official 50:a417edff4437 820 ADC_LoadDevinfoCal(adc, init->reference, false);
bogdanm 0:9b334a45a8ff 821
mbed_official 50:a417edff4437 822 tmp = 0
mbed_official 50:a417edff4437 823 #if defined( _ADC_SINGLECTRL_PRSSEL_MASK )
mbed_official 50:a417edff4437 824 | (init->prsSel << _ADC_SINGLECTRL_PRSSEL_SHIFT)
mbed_official 50:a417edff4437 825 #endif
mbed_official 50:a417edff4437 826 | (init->acqTime << _ADC_SINGLECTRL_AT_SHIFT)
mbed_official 50:a417edff4437 827 #if defined( _ADC_SINGLECTRL_INPUTSEL_MASK )
mbed_official 50:a417edff4437 828 | (init->input << _ADC_SINGLECTRL_INPUTSEL_SHIFT)
mbed_official 50:a417edff4437 829 #endif
mbed_official 50:a417edff4437 830 #if defined( _ADC_SINGLECTRL_POSSEL_MASK )
mbed_official 50:a417edff4437 831 | (init->posSel << _ADC_SINGLECTRL_POSSEL_SHIFT)
mbed_official 50:a417edff4437 832 #endif
mbed_official 50:a417edff4437 833 #if defined( _ADC_SINGLECTRL_NEGSEL_MASK )
mbed_official 50:a417edff4437 834 | (init->negSel << _ADC_SINGLECTRL_NEGSEL_SHIFT)
mbed_official 50:a417edff4437 835 #endif
mbed_official 50:a417edff4437 836 | ((uint32_t)(init->resolution) << _ADC_SINGLECTRL_RES_SHIFT);
bogdanm 0:9b334a45a8ff 837
bogdanm 0:9b334a45a8ff 838 if (init->prsEnable)
bogdanm 0:9b334a45a8ff 839 {
bogdanm 0:9b334a45a8ff 840 tmp |= ADC_SINGLECTRL_PRSEN;
bogdanm 0:9b334a45a8ff 841 }
bogdanm 0:9b334a45a8ff 842
bogdanm 0:9b334a45a8ff 843 if (init->leftAdjust)
bogdanm 0:9b334a45a8ff 844 {
bogdanm 0:9b334a45a8ff 845 tmp |= ADC_SINGLECTRL_ADJ_LEFT;
bogdanm 0:9b334a45a8ff 846 }
bogdanm 0:9b334a45a8ff 847
bogdanm 0:9b334a45a8ff 848 if (init->diff)
bogdanm 0:9b334a45a8ff 849 {
bogdanm 0:9b334a45a8ff 850 tmp |= ADC_SINGLECTRL_DIFF;
bogdanm 0:9b334a45a8ff 851 }
bogdanm 0:9b334a45a8ff 852
bogdanm 0:9b334a45a8ff 853 if (init->rep)
bogdanm 0:9b334a45a8ff 854 {
bogdanm 0:9b334a45a8ff 855 tmp |= ADC_SINGLECTRL_REP;
bogdanm 0:9b334a45a8ff 856 }
bogdanm 0:9b334a45a8ff 857
mbed_official 50:a417edff4437 858 /* Set single reference. Check if reference configuraion is extended to SINGLECTRLX. */
mbed_official 50:a417edff4437 859 #if defined ( _ADC_SINGLECTRLX_MASK )
mbed_official 50:a417edff4437 860 if (init->reference & ADC_CTRLX_VREFSEL_REG)
mbed_official 50:a417edff4437 861 {
mbed_official 50:a417edff4437 862 /* Select extension register */
mbed_official 50:a417edff4437 863 tmp |= ADC_SINGLECTRL_REF_CONF;
mbed_official 50:a417edff4437 864 }
mbed_official 50:a417edff4437 865 else
mbed_official 50:a417edff4437 866 {
mbed_official 50:a417edff4437 867 tmp |= (init->reference << _ADC_SINGLECTRL_REF_SHIFT);
mbed_official 50:a417edff4437 868 }
mbed_official 50:a417edff4437 869 #else
mbed_official 50:a417edff4437 870 tmp |= (init->reference << _ADC_SINGLECTRL_REF_SHIFT);
mbed_official 50:a417edff4437 871 #endif
bogdanm 0:9b334a45a8ff 872 adc->SINGLECTRL = tmp;
mbed_official 50:a417edff4437 873
mbed_official 50:a417edff4437 874 /* Update SINGLECTRLX for reference select and PRS select */
mbed_official 50:a417edff4437 875 #if defined ( _ADC_SINGLECTRLX_VREFSEL_MASK )
mbed_official 50:a417edff4437 876 tmp = adc->SINGLECTRLX & (_ADC_SINGLECTRLX_VREFSEL_MASK
mbed_official 50:a417edff4437 877 | _ADC_SINGLECTRLX_PRSSEL_MASK
mbed_official 50:a417edff4437 878 | _ADC_SINGLECTRLX_FIFOOFACT_MASK);
mbed_official 50:a417edff4437 879 if (init->reference & ADC_CTRLX_VREFSEL_REG)
mbed_official 50:a417edff4437 880 {
mbed_official 50:a417edff4437 881 tmp |= ((init->reference & ~ADC_CTRLX_VREFSEL_REG) << _ADC_SINGLECTRLX_VREFSEL_SHIFT);
mbed_official 50:a417edff4437 882 }
mbed_official 50:a417edff4437 883
mbed_official 50:a417edff4437 884 tmp |= ((init->prsSel << _ADC_SINGLECTRLX_PRSSEL_SHIFT));
mbed_official 50:a417edff4437 885
mbed_official 50:a417edff4437 886 if (init->fifoOverwrite)
mbed_official 50:a417edff4437 887 {
mbed_official 50:a417edff4437 888 tmp |= ADC_SINGLECTRLX_FIFOOFACT_OVERWRITE;
mbed_official 50:a417edff4437 889 }
mbed_official 50:a417edff4437 890
mbed_official 50:a417edff4437 891 adc->SINGLECTRLX = tmp;
mbed_official 50:a417edff4437 892 #endif
mbed_official 50:a417edff4437 893
mbed_official 50:a417edff4437 894 /* Set DMA availability in EM2 */
mbed_official 50:a417edff4437 895 #if defined( _ADC_CTRL_SINGLEDMAWU_MASK )
mbed_official 50:a417edff4437 896 BUS_RegBitWrite(&ADC0->CTRL, _ADC_CTRL_SINGLEDMAWU_SHIFT, init->singleDmaEm2Wu);
mbed_official 50:a417edff4437 897 #endif
mbed_official 50:a417edff4437 898
mbed_official 50:a417edff4437 899 /* Assert for any APORT bus conflicts programming errors */
mbed_official 50:a417edff4437 900 #if defined( _ADC_BUSCONFLICT_MASK )
mbed_official 50:a417edff4437 901 tmp = adc->BUSREQ;
mbed_official 50:a417edff4437 902 EFM_ASSERT(!(tmp & adc->BUSCONFLICT));
mbed_official 50:a417edff4437 903 EFM_ASSERT(!(adc->STATUS & _ADC_STATUS_PROGERR_MASK));
mbed_official 50:a417edff4437 904 #endif
bogdanm 0:9b334a45a8ff 905 }
bogdanm 0:9b334a45a8ff 906
bogdanm 0:9b334a45a8ff 907
mbed_official 50:a417edff4437 908 #if defined( _ADC_SCANDATAX_MASK )
mbed_official 50:a417edff4437 909 /***************************************************************************//**
mbed_official 50:a417edff4437 910 * @brief
mbed_official 50:a417edff4437 911 * Get scan result and scan select ID.
mbed_official 50:a417edff4437 912 *
mbed_official 50:a417edff4437 913 * @note
mbed_official 50:a417edff4437 914 * Only use if scan data valid. This function does not check the DV flag.
mbed_official 50:a417edff4437 915 * The return value is intended to be used as a index for the scan select ID.
mbed_official 50:a417edff4437 916 *
mbed_official 50:a417edff4437 917 * @param[in] adc
mbed_official 50:a417edff4437 918 * Pointer to ADC peripheral register block.
mbed_official 50:a417edff4437 919 *
mbed_official 50:a417edff4437 920 * @param[out] scanId
mbed_official 50:a417edff4437 921 * Scan select ID of first data in scan FIFO.
mbed_official 50:a417edff4437 922 *
mbed_official 50:a417edff4437 923 * @return
mbed_official 50:a417edff4437 924 * First scan data in scan FIFO.
mbed_official 50:a417edff4437 925 ******************************************************************************/
mbed_official 50:a417edff4437 926 uint32_t ADC_DataIdScanGet(ADC_TypeDef *adc, uint32_t *scanId)
mbed_official 50:a417edff4437 927 {
mbed_official 50:a417edff4437 928 uint32_t scanData;
mbed_official 50:a417edff4437 929
mbed_official 50:a417edff4437 930 /* Pop data FIFO with scan ID */
mbed_official 50:a417edff4437 931 scanData = adc->SCANDATAX;
mbed_official 50:a417edff4437 932 *scanId = (scanData & _ADC_SCANDATAX_SCANINPUTID_MASK) >> _ADC_SCANDATAX_SCANINPUTID_SHIFT;
mbed_official 50:a417edff4437 933 return (scanData & _ADC_SCANDATAX_DATA_MASK) >> _ADC_SCANDATAX_DATA_SHIFT;
mbed_official 50:a417edff4437 934 }
mbed_official 50:a417edff4437 935 #endif
mbed_official 50:a417edff4437 936
mbed_official 50:a417edff4437 937
bogdanm 0:9b334a45a8ff 938 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 939 * @brief
bogdanm 0:9b334a45a8ff 940 * Calculate prescaler value used to determine ADC clock.
bogdanm 0:9b334a45a8ff 941 *
bogdanm 0:9b334a45a8ff 942 * @details
bogdanm 0:9b334a45a8ff 943 * The ADC clock is given by: HFPERCLK / (prescale + 1).
bogdanm 0:9b334a45a8ff 944 *
bogdanm 0:9b334a45a8ff 945 * @param[in] adcFreq ADC frequency wanted. The frequency will automatically
bogdanm 0:9b334a45a8ff 946 * be adjusted to be within valid range according to reference manual.
bogdanm 0:9b334a45a8ff 947 *
bogdanm 0:9b334a45a8ff 948 * @param[in] hfperFreq Frequency in Hz of reference HFPER clock. Set to 0 to
bogdanm 0:9b334a45a8ff 949 * use currently defined HFPER clock setting.
bogdanm 0:9b334a45a8ff 950 *
bogdanm 0:9b334a45a8ff 951 * @return
bogdanm 0:9b334a45a8ff 952 * Prescaler value to use for ADC in order to achieve a clock value
bogdanm 0:9b334a45a8ff 953 * <= @p adcFreq.
bogdanm 0:9b334a45a8ff 954 ******************************************************************************/
bogdanm 0:9b334a45a8ff 955 uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq)
bogdanm 0:9b334a45a8ff 956 {
bogdanm 0:9b334a45a8ff 957 uint32_t ret;
bogdanm 0:9b334a45a8ff 958
bogdanm 0:9b334a45a8ff 959 /* Make sure selected ADC clock is within valid range */
bogdanm 0:9b334a45a8ff 960 if (adcFreq > ADC_MAX_CLOCK)
bogdanm 0:9b334a45a8ff 961 {
bogdanm 0:9b334a45a8ff 962 adcFreq = ADC_MAX_CLOCK;
bogdanm 0:9b334a45a8ff 963 }
bogdanm 0:9b334a45a8ff 964 else if (adcFreq < ADC_MIN_CLOCK)
bogdanm 0:9b334a45a8ff 965 {
bogdanm 0:9b334a45a8ff 966 adcFreq = ADC_MIN_CLOCK;
bogdanm 0:9b334a45a8ff 967 }
bogdanm 0:9b334a45a8ff 968
bogdanm 0:9b334a45a8ff 969 /* Use current HFPER frequency? */
bogdanm 0:9b334a45a8ff 970 if (!hfperFreq)
bogdanm 0:9b334a45a8ff 971 {
bogdanm 0:9b334a45a8ff 972 hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER);
bogdanm 0:9b334a45a8ff 973 }
bogdanm 0:9b334a45a8ff 974
bogdanm 0:9b334a45a8ff 975 ret = (hfperFreq + adcFreq - 1) / adcFreq;
bogdanm 0:9b334a45a8ff 976 if (ret)
bogdanm 0:9b334a45a8ff 977 {
bogdanm 0:9b334a45a8ff 978 ret--;
bogdanm 0:9b334a45a8ff 979 }
bogdanm 0:9b334a45a8ff 980
bogdanm 0:9b334a45a8ff 981 return (uint8_t)ret;
bogdanm 0:9b334a45a8ff 982 }
bogdanm 0:9b334a45a8ff 983
bogdanm 0:9b334a45a8ff 984
bogdanm 0:9b334a45a8ff 985 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 986 * @brief
bogdanm 0:9b334a45a8ff 987 * Reset ADC to same state as after a HW reset.
bogdanm 0:9b334a45a8ff 988 *
bogdanm 0:9b334a45a8ff 989 * @note
bogdanm 0:9b334a45a8ff 990 * The ROUTE register is NOT reset by this function, in order to allow for
bogdanm 0:9b334a45a8ff 991 * centralized setup of this feature.
bogdanm 0:9b334a45a8ff 992 *
bogdanm 0:9b334a45a8ff 993 * @param[in] adc
bogdanm 0:9b334a45a8ff 994 * Pointer to ADC peripheral register block.
bogdanm 0:9b334a45a8ff 995 ******************************************************************************/
bogdanm 0:9b334a45a8ff 996 void ADC_Reset(ADC_TypeDef *adc)
bogdanm 0:9b334a45a8ff 997 {
bogdanm 0:9b334a45a8ff 998 /* Stop conversions, before resetting other registers. */
mbed_official 50:a417edff4437 999 adc->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP;
mbed_official 50:a417edff4437 1000 adc->SINGLECTRL = _ADC_SINGLECTRL_RESETVALUE;
mbed_official 50:a417edff4437 1001 #if defined( _ADC_SINGLECTRLX_MASK )
mbed_official 50:a417edff4437 1002 adc->SINGLECTRLX = _ADC_SINGLECTRLX_RESETVALUE;
mbed_official 50:a417edff4437 1003 #endif
mbed_official 50:a417edff4437 1004 adc->SCANCTRL = _ADC_SCANCTRL_RESETVALUE;
mbed_official 50:a417edff4437 1005 #if defined( _ADC_SCANCTRLX_MASK )
mbed_official 50:a417edff4437 1006 adc->SCANCTRLX = _ADC_SCANCTRLX_RESETVALUE;
mbed_official 50:a417edff4437 1007 #endif
mbed_official 50:a417edff4437 1008 adc->CTRL = _ADC_CTRL_RESETVALUE;
mbed_official 50:a417edff4437 1009 adc->IEN = _ADC_IEN_RESETVALUE;
mbed_official 50:a417edff4437 1010 adc->IFC = _ADC_IFC_MASK;
mbed_official 50:a417edff4437 1011 adc->BIASPROG = _ADC_BIASPROG_RESETVALUE;
mbed_official 50:a417edff4437 1012 #if defined( _ADC_SCANMASK_MASK )
mbed_official 50:a417edff4437 1013 adc->SCANMASK = _ADC_SCANMASK_RESETVALUE;
mbed_official 50:a417edff4437 1014 #endif
mbed_official 50:a417edff4437 1015 #if defined( _ADC_SCANINPUTSEL_MASK )
mbed_official 50:a417edff4437 1016 adc->SCANINPUTSEL = _ADC_SCANINPUTSEL_RESETVALUE;
mbed_official 50:a417edff4437 1017 #endif
mbed_official 50:a417edff4437 1018 #if defined( _ADC_SCANNEGSEL_MASK )
mbed_official 50:a417edff4437 1019 adc->SCANNEGSEL = _ADC_SCANNEGSEL_RESETVALUE;
mbed_official 50:a417edff4437 1020 #endif
mbed_official 50:a417edff4437 1021
mbed_official 50:a417edff4437 1022 /* Clear data FIFOs */
mbed_official 50:a417edff4437 1023 #if defined( _ADC_SINGLEFIFOCLEAR_MASK )
mbed_official 50:a417edff4437 1024 adc->SINGLEFIFOCLEAR |= ADC_SINGLEFIFOCLEAR_SINGLEFIFOCLEAR;
mbed_official 50:a417edff4437 1025 adc->SCANFIFOCLEAR |= ADC_SCANFIFOCLEAR_SCANFIFOCLEAR;
mbed_official 50:a417edff4437 1026 #endif
bogdanm 0:9b334a45a8ff 1027
bogdanm 0:9b334a45a8ff 1028 /* Load calibration values for the 1V25 internal reference. */
mbed_official 50:a417edff4437 1029 ADC_LoadDevinfoCal(adc, adcRef1V25, false);
mbed_official 50:a417edff4437 1030 ADC_LoadDevinfoCal(adc, adcRef1V25, true);
bogdanm 0:9b334a45a8ff 1031
mbed_official 50:a417edff4437 1032 #if defined( _ADC_SCANINPUTSEL_MASK )
bogdanm 0:9b334a45a8ff 1033 /* Do not reset route register, setting should be done independently */
mbed_official 50:a417edff4437 1034 #endif
bogdanm 0:9b334a45a8ff 1035 }
bogdanm 0:9b334a45a8ff 1036
bogdanm 0:9b334a45a8ff 1037
bogdanm 0:9b334a45a8ff 1038 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 1039 * @brief
bogdanm 0:9b334a45a8ff 1040 * Calculate timebase value in order to get a timebase providing at least 1us.
bogdanm 0:9b334a45a8ff 1041 *
bogdanm 0:9b334a45a8ff 1042 * @param[in] hfperFreq Frequency in Hz of reference HFPER clock. Set to 0 to
bogdanm 0:9b334a45a8ff 1043 * use currently defined HFPER clock setting.
bogdanm 0:9b334a45a8ff 1044 *
bogdanm 0:9b334a45a8ff 1045 * @return
bogdanm 0:9b334a45a8ff 1046 * Timebase value to use for ADC in order to achieve at least 1 us.
bogdanm 0:9b334a45a8ff 1047 ******************************************************************************/
bogdanm 0:9b334a45a8ff 1048 uint8_t ADC_TimebaseCalc(uint32_t hfperFreq)
bogdanm 0:9b334a45a8ff 1049 {
bogdanm 0:9b334a45a8ff 1050 if (!hfperFreq)
bogdanm 0:9b334a45a8ff 1051 {
bogdanm 0:9b334a45a8ff 1052 hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER);
bogdanm 0:9b334a45a8ff 1053
bogdanm 0:9b334a45a8ff 1054 /* Just in case, make sure we get non-zero freq for below calculation */
bogdanm 0:9b334a45a8ff 1055 if (!hfperFreq)
bogdanm 0:9b334a45a8ff 1056 {
bogdanm 0:9b334a45a8ff 1057 hfperFreq = 1;
bogdanm 0:9b334a45a8ff 1058 }
bogdanm 0:9b334a45a8ff 1059 }
mbed_official 50:a417edff4437 1060 #if defined( _EFM32_GIANT_FAMILY ) || defined( _EFM32_WONDER_FAMILY )
bogdanm 0:9b334a45a8ff 1061 /* Handle errata on Giant Gecko, max TIMEBASE is 5 bits wide or max 0x1F */
bogdanm 0:9b334a45a8ff 1062 /* cycles. This will give a warmp up time of e.g. 0.645us, not the */
bogdanm 0:9b334a45a8ff 1063 /* required 1us when operating at 48MHz. One must also increase acqTime */
bogdanm 0:9b334a45a8ff 1064 /* to compensate for the missing clock cycles, adding up to 1us in total.*/
bogdanm 0:9b334a45a8ff 1065 /* See reference manual for details. */
mbed_official 50:a417edff4437 1066 if ( hfperFreq > 32000000 )
bogdanm 0:9b334a45a8ff 1067 {
bogdanm 0:9b334a45a8ff 1068 hfperFreq = 32000000;
bogdanm 0:9b334a45a8ff 1069 }
bogdanm 0:9b334a45a8ff 1070 #endif
bogdanm 0:9b334a45a8ff 1071 /* Determine number of HFPERCLK cycle >= 1us */
bogdanm 0:9b334a45a8ff 1072 hfperFreq += 999999;
bogdanm 0:9b334a45a8ff 1073 hfperFreq /= 1000000;
bogdanm 0:9b334a45a8ff 1074
bogdanm 0:9b334a45a8ff 1075 /* Return timebase value (N+1 format) */
bogdanm 0:9b334a45a8ff 1076 return (uint8_t)(hfperFreq - 1);
bogdanm 0:9b334a45a8ff 1077 }
bogdanm 0:9b334a45a8ff 1078
bogdanm 0:9b334a45a8ff 1079
bogdanm 0:9b334a45a8ff 1080 /** @} (end addtogroup ADC) */
bogdanm 0:9b334a45a8ff 1081 /** @} (end addtogroup EM_Library) */
bogdanm 0:9b334a45a8ff 1082 #endif /* defined(ADC_COUNT) && (ADC_COUNT > 0) */