mbed-dev - added prescaler for 16 bit pwm in LPC1347 target

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added prescaler for 16 bit pwm in LPC1347 target

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_i2c.c@83:a036322b8637, 2016-03-07 (annotated)

Committer:: mbed_official
Date:: Mon Mar 07 10:00:14 2016 +0000
Revision:: 83:a036322b8637
Parent:: 0:9b334a45a8ff
Child:: 144:ef7eb2e8f9f7

Synchronized with git revision ee20d03969aa5c570152f88e8f3d8a4739eed40b



Full URL: https://github.com/mbedmicro/mbed/commit/ee20d03969aa5c570152f88e8f3d8a4739eed40b/



[STM32F7] Update STM32F7Cube_FW version

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f7xx_hal_i2c.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	83:a036322b8637	5	* @version V1.0.4
mbed_official	83:a036322b8637	6	* @date 09-December-2015
bogdanm	0:9b334a45a8ff	7	* @brief I2C HAL module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
bogdanm	0:9b334a45a8ff	10	* + Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	11	* + IO operation functions
bogdanm	0:9b334a45a8ff	12	* + Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	13	*
bogdanm	0:9b334a45a8ff	14	@verbatim
bogdanm	0:9b334a45a8ff	15	==============================================================================
bogdanm	0:9b334a45a8ff	16	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	17	==============================================================================
bogdanm	0:9b334a45a8ff	18	[..]
bogdanm	0:9b334a45a8ff	19	The I2C HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	20
bogdanm	0:9b334a45a8ff	21	(#) Declare a I2C_HandleTypeDef handle structure, for example:
bogdanm	0:9b334a45a8ff	22	I2C_HandleTypeDef hi2c;
bogdanm	0:9b334a45a8ff	23
bogdanm	0:9b334a45a8ff	24	(#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit ()API:
bogdanm	0:9b334a45a8ff	25	(##) Enable the I2Cx interface clock
bogdanm	0:9b334a45a8ff	26	(##) I2C pins configuration
bogdanm	0:9b334a45a8ff	27	(+++) Enable the clock for the I2C GPIOs
bogdanm	0:9b334a45a8ff	28	(+++) Configure I2C pins as alternate function open-drain
bogdanm	0:9b334a45a8ff	29	(##) NVIC configuration if you need to use interrupt process
bogdanm	0:9b334a45a8ff	30	(+++) Configure the I2Cx interrupt priority
bogdanm	0:9b334a45a8ff	31	(+++) Enable the NVIC I2C IRQ Channel
bogdanm	0:9b334a45a8ff	32	(##) DMA Configuration if you need to use DMA process
bogdanm	0:9b334a45a8ff	33	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
bogdanm	0:9b334a45a8ff	34	(+++) Enable the DMAx interface clock using
bogdanm	0:9b334a45a8ff	35	(+++) Configure the DMA handle parameters
bogdanm	0:9b334a45a8ff	36	(+++) Configure the DMA Tx or Rx Stream
bogdanm	0:9b334a45a8ff	37	(+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
bogdanm	0:9b334a45a8ff	38	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream
bogdanm	0:9b334a45a8ff	39
mbed_official	83:a036322b8637	40	(#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,
bogdanm	0:9b334a45a8ff	41	Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
bogdanm	0:9b334a45a8ff	42
bogdanm	0:9b334a45a8ff	43	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
bogdanm	0:9b334a45a8ff	44	(GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API.
bogdanm	0:9b334a45a8ff	45
bogdanm	0:9b334a45a8ff	46	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
bogdanm	0:9b334a45a8ff	49
bogdanm	0:9b334a45a8ff	50	* Polling mode IO operation *
bogdanm	0:9b334a45a8ff	51	=================================
bogdanm	0:9b334a45a8ff	52	[..]
bogdanm	0:9b334a45a8ff	53	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
bogdanm	0:9b334a45a8ff	54	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
bogdanm	0:9b334a45a8ff	55	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
bogdanm	0:9b334a45a8ff	56	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
bogdanm	0:9b334a45a8ff	57
bogdanm	0:9b334a45a8ff	58	* Polling mode IO MEM operation *
bogdanm	0:9b334a45a8ff	59	=====================================
bogdanm	0:9b334a45a8ff	60	[..]
bogdanm	0:9b334a45a8ff	61	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
bogdanm	0:9b334a45a8ff	62	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
bogdanm	0:9b334a45a8ff	63
bogdanm	0:9b334a45a8ff	64
bogdanm	0:9b334a45a8ff	65	* Interrupt mode IO operation *
bogdanm	0:9b334a45a8ff	66	===================================
bogdanm	0:9b334a45a8ff	67	[..]
bogdanm	0:9b334a45a8ff	68	(+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
mbed_official	83:a036322b8637	69	(+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	70	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
bogdanm	0:9b334a45a8ff	71	(+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
mbed_official	83:a036322b8637	72	(+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	73	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
bogdanm	0:9b334a45a8ff	74	(+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
mbed_official	83:a036322b8637	75	(+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	76	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
bogdanm	0:9b334a45a8ff	77	(+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
mbed_official	83:a036322b8637	78	(+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	79	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
bogdanm	0:9b334a45a8ff	80	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	81	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	82
bogdanm	0:9b334a45a8ff	83	* Interrupt mode IO MEM operation *
bogdanm	0:9b334a45a8ff	84	=======================================
bogdanm	0:9b334a45a8ff	85	[..]
bogdanm	0:9b334a45a8ff	86	(+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
bogdanm	0:9b334a45a8ff	87	HAL_I2C_Mem_Write_IT()
mbed_official	83:a036322b8637	88	(+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	89	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
bogdanm	0:9b334a45a8ff	90	(+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
bogdanm	0:9b334a45a8ff	91	HAL_I2C_Mem_Read_IT()
mbed_official	83:a036322b8637	92	(+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	93	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
bogdanm	0:9b334a45a8ff	94	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	95	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	96
bogdanm	0:9b334a45a8ff	97	* DMA mode IO operation *
bogdanm	0:9b334a45a8ff	98	==============================
bogdanm	0:9b334a45a8ff	99	[..]
bogdanm	0:9b334a45a8ff	100	(+) Transmit in master mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	101	HAL_I2C_Master_Transmit_DMA()
mbed_official	83:a036322b8637	102	(+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	103	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
bogdanm	0:9b334a45a8ff	104	(+) Receive in master mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	105	HAL_I2C_Master_Receive_DMA()
mbed_official	83:a036322b8637	106	(+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	107	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
bogdanm	0:9b334a45a8ff	108	(+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	109	HAL_I2C_Slave_Transmit_DMA()
mbed_official	83:a036322b8637	110	(+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	111	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
bogdanm	0:9b334a45a8ff	112	(+) Receive in slave mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	113	HAL_I2C_Slave_Receive_DMA()
mbed_official	83:a036322b8637	114	(+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	115	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
bogdanm	0:9b334a45a8ff	116	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	117	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	118
bogdanm	0:9b334a45a8ff	119	* DMA mode IO MEM operation *
bogdanm	0:9b334a45a8ff	120	=================================
bogdanm	0:9b334a45a8ff	121	[..]
bogdanm	0:9b334a45a8ff	122	(+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
bogdanm	0:9b334a45a8ff	123	HAL_I2C_Mem_Write_DMA()
mbed_official	83:a036322b8637	124	(+) At Memory end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	125	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
bogdanm	0:9b334a45a8ff	126	(+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
bogdanm	0:9b334a45a8ff	127	HAL_I2C_Mem_Read_DMA()
mbed_official	83:a036322b8637	128	(+) At Memory end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	129	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
bogdanm	0:9b334a45a8ff	130	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	131	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	132
bogdanm	0:9b334a45a8ff	133
bogdanm	0:9b334a45a8ff	134	* I2C HAL driver macros list *
bogdanm	0:9b334a45a8ff	135	==================================
bogdanm	0:9b334a45a8ff	136	[..]
bogdanm	0:9b334a45a8ff	137	Below the list of most used macros in I2C HAL driver.
bogdanm	0:9b334a45a8ff	138
bogdanm	0:9b334a45a8ff	139	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
bogdanm	0:9b334a45a8ff	140	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
mbed_official	83:a036322b8637	141	(+) __HAL_I2C_GET_FLAG : Check whether the specified I2C flag is set or not
bogdanm	0:9b334a45a8ff	142	(+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
bogdanm	0:9b334a45a8ff	143	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
bogdanm	0:9b334a45a8ff	144	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
bogdanm	0:9b334a45a8ff	145
bogdanm	0:9b334a45a8ff	146	[..]
bogdanm	0:9b334a45a8ff	147	(@) You can refer to the I2C HAL driver header file for more useful macros
bogdanm	0:9b334a45a8ff	148
bogdanm	0:9b334a45a8ff	149	@endverbatim
bogdanm	0:9b334a45a8ff	150	******************************************************************************
bogdanm	0:9b334a45a8ff	151	* @attention
bogdanm	0:9b334a45a8ff	152	*
bogdanm	0:9b334a45a8ff	153	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	154	*
bogdanm	0:9b334a45a8ff	155	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	156	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	157	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	158	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	159	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	160	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	161	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	162	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	163	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	164	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	165	*
bogdanm	0:9b334a45a8ff	166	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	167	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	168	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	169	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	170	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	171	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	172	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	173	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	174	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	175	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	176	*
bogdanm	0:9b334a45a8ff	177	******************************************************************************
bogdanm	0:9b334a45a8ff	178	*/
bogdanm	0:9b334a45a8ff	179
bogdanm	0:9b334a45a8ff	180	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	181	#include "stm32f7xx_hal.h"
bogdanm	0:9b334a45a8ff	182
bogdanm	0:9b334a45a8ff	183	/** @addtogroup STM32F7xx_HAL_Driver
bogdanm	0:9b334a45a8ff	184	* @{
bogdanm	0:9b334a45a8ff	185	*/
bogdanm	0:9b334a45a8ff	186
mbed_official	83:a036322b8637	187	/** @defgroup I2C I2C HAL module driver
bogdanm	0:9b334a45a8ff	188	* @brief I2C HAL module driver
bogdanm	0:9b334a45a8ff	189	* @{
bogdanm	0:9b334a45a8ff	190	*/
bogdanm	0:9b334a45a8ff	191
bogdanm	0:9b334a45a8ff	192	#ifdef HAL_I2C_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	193
bogdanm	0:9b334a45a8ff	194	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	195	/* Private constants ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	196	/** @addtogroup I2C_Private_Constants I2C Private Constants
bogdanm	0:9b334a45a8ff	197	* @{
bogdanm	0:9b334a45a8ff	198	*/
bogdanm	0:9b334a45a8ff	199	#define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /<! I2C TIMING clear register Mask /
mbed_official	83:a036322b8637	200	#define I2C_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
mbed_official	83:a036322b8637	201	#define I2C_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
mbed_official	83:a036322b8637	202	#define I2C_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
mbed_official	83:a036322b8637	203	#define I2C_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
mbed_official	83:a036322b8637	204	#define I2C_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
mbed_official	83:a036322b8637	205	#define I2C_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
mbed_official	83:a036322b8637	206	#define I2C_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
mbed_official	83:a036322b8637	207	#define I2C_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
mbed_official	83:a036322b8637	208	#define I2C_TIMEOUT_FLAG ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	209	/**
bogdanm	0:9b334a45a8ff	210	* @}
bogdanm	0:9b334a45a8ff	211	*/
bogdanm	0:9b334a45a8ff	212
bogdanm	0:9b334a45a8ff	213	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	214	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	215	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	216	/** @addtogroup I2C_Private_Functions I2C Private Functions
bogdanm	0:9b334a45a8ff	217	* @{
bogdanm	0:9b334a45a8ff	218	*/
bogdanm	0:9b334a45a8ff	219	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	220	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	221	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	222	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	223	static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	224	static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	225	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	226
bogdanm	0:9b334a45a8ff	227	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	228	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	229	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	230	static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	231	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	232	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	233	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	234
bogdanm	0:9b334a45a8ff	235	static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	236	static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	237
bogdanm	0:9b334a45a8ff	238	static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	239	static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	240
bogdanm	0:9b334a45a8ff	241	static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
bogdanm	0:9b334a45a8ff	242	/**
bogdanm	0:9b334a45a8ff	243	* @}
bogdanm	0:9b334a45a8ff	244	*/
bogdanm	0:9b334a45a8ff	245
bogdanm	0:9b334a45a8ff	246	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	247
bogdanm	0:9b334a45a8ff	248	/** @defgroup I2C_Exported_Functions I2C Exported Functions
bogdanm	0:9b334a45a8ff	249	* @{
bogdanm	0:9b334a45a8ff	250	*/
bogdanm	0:9b334a45a8ff	251
bogdanm	0:9b334a45a8ff	252	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	253	* @brief Initialization and Configuration functions
bogdanm	0:9b334a45a8ff	254	*
bogdanm	0:9b334a45a8ff	255	@verbatim
bogdanm	0:9b334a45a8ff	256	===============================================================================
bogdanm	0:9b334a45a8ff	257	##### Initialization and de-initialization functions #####
bogdanm	0:9b334a45a8ff	258	===============================================================================
bogdanm	0:9b334a45a8ff	259	[..] This subsection provides a set of functions allowing to initialize and
bogdanm	0:9b334a45a8ff	260	de-initialize the I2Cx peripheral:
bogdanm	0:9b334a45a8ff	261
bogdanm	0:9b334a45a8ff	262	(+) User must Implement HAL_I2C_MspInit() function in which he configures
bogdanm	0:9b334a45a8ff	263	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
bogdanm	0:9b334a45a8ff	264
bogdanm	0:9b334a45a8ff	265	(+) Call the function HAL_I2C_Init() to configure the selected device with
bogdanm	0:9b334a45a8ff	266	the selected configuration:
bogdanm	0:9b334a45a8ff	267	(++) Clock Timing
bogdanm	0:9b334a45a8ff	268	(++) Own Address 1
bogdanm	0:9b334a45a8ff	269	(++) Addressing mode (Master, Slave)
bogdanm	0:9b334a45a8ff	270	(++) Dual Addressing mode
bogdanm	0:9b334a45a8ff	271	(++) Own Address 2
bogdanm	0:9b334a45a8ff	272	(++) Own Address 2 Mask
bogdanm	0:9b334a45a8ff	273	(++) General call mode
bogdanm	0:9b334a45a8ff	274	(++) Nostretch mode
bogdanm	0:9b334a45a8ff	275
bogdanm	0:9b334a45a8ff	276	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
bogdanm	0:9b334a45a8ff	277	of the selected I2Cx peripheral.
bogdanm	0:9b334a45a8ff	278
bogdanm	0:9b334a45a8ff	279	@endverbatim
bogdanm	0:9b334a45a8ff	280	* @{
bogdanm	0:9b334a45a8ff	281	*/
bogdanm	0:9b334a45a8ff	282
bogdanm	0:9b334a45a8ff	283	/**
bogdanm	0:9b334a45a8ff	284	* @brief Initializes the I2C according to the specified parameters
bogdanm	0:9b334a45a8ff	285	* in the I2C_InitTypeDef and create the associated handle.
bogdanm	0:9b334a45a8ff	286	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	287	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	288	* @retval HAL status
bogdanm	0:9b334a45a8ff	289	*/
bogdanm	0:9b334a45a8ff	290	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	291	{
bogdanm	0:9b334a45a8ff	292	/* Check the I2C handle allocation */
bogdanm	0:9b334a45a8ff	293	if(hi2c == NULL)
bogdanm	0:9b334a45a8ff	294	{
bogdanm	0:9b334a45a8ff	295	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	296	}
bogdanm	0:9b334a45a8ff	297
bogdanm	0:9b334a45a8ff	298	/* Check the parameters */
bogdanm	0:9b334a45a8ff	299	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm	0:9b334a45a8ff	300	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
bogdanm	0:9b334a45a8ff	301	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
bogdanm	0:9b334a45a8ff	302	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
bogdanm	0:9b334a45a8ff	303	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
bogdanm	0:9b334a45a8ff	304	assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
bogdanm	0:9b334a45a8ff	305	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
bogdanm	0:9b334a45a8ff	306	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
bogdanm	0:9b334a45a8ff	307
bogdanm	0:9b334a45a8ff	308	if(hi2c->State == HAL_I2C_STATE_RESET)
bogdanm	0:9b334a45a8ff	309	{
bogdanm	0:9b334a45a8ff	310	/* Allocate lock resource and initialize it */
bogdanm	0:9b334a45a8ff	311	hi2c->Lock = HAL_UNLOCKED;
bogdanm	0:9b334a45a8ff	312	/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
bogdanm	0:9b334a45a8ff	313	HAL_I2C_MspInit(hi2c);
bogdanm	0:9b334a45a8ff	314	}
bogdanm	0:9b334a45a8ff	315
bogdanm	0:9b334a45a8ff	316	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	317
bogdanm	0:9b334a45a8ff	318	/* Disable the selected I2C peripheral */
bogdanm	0:9b334a45a8ff	319	__HAL_I2C_DISABLE(hi2c);
bogdanm	0:9b334a45a8ff	320
bogdanm	0:9b334a45a8ff	321	/---------------------------- I2Cx TIMINGR Configuration ------------------/
bogdanm	0:9b334a45a8ff	322	/* Configure I2Cx: Frequency range */
bogdanm	0:9b334a45a8ff	323	hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
bogdanm	0:9b334a45a8ff	324
bogdanm	0:9b334a45a8ff	325	/---------------------------- I2Cx OAR1 Configuration ---------------------/
bogdanm	0:9b334a45a8ff	326	/* Configure I2Cx: Own Address1 and ack own address1 mode */
bogdanm	0:9b334a45a8ff	327	hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
bogdanm	0:9b334a45a8ff	328	if(hi2c->Init.OwnAddress1 != 0)
bogdanm	0:9b334a45a8ff	329	{
bogdanm	0:9b334a45a8ff	330	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm	0:9b334a45a8ff	331	{
bogdanm	0:9b334a45a8ff	332	hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN \| hi2c->Init.OwnAddress1);
bogdanm	0:9b334a45a8ff	333	}
bogdanm	0:9b334a45a8ff	334	else /* I2C_ADDRESSINGMODE_10BIT */
bogdanm	0:9b334a45a8ff	335	{
bogdanm	0:9b334a45a8ff	336	hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN \| I2C_OAR1_OA1MODE \| hi2c->Init.OwnAddress1);
bogdanm	0:9b334a45a8ff	337	}
bogdanm	0:9b334a45a8ff	338	}
bogdanm	0:9b334a45a8ff	339
bogdanm	0:9b334a45a8ff	340	/---------------------------- I2Cx CR2 Configuration ----------------------/
bogdanm	0:9b334a45a8ff	341	/* Configure I2Cx: Addressing Master mode */
bogdanm	0:9b334a45a8ff	342	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm	0:9b334a45a8ff	343	{
bogdanm	0:9b334a45a8ff	344	hi2c->Instance->CR2 = (I2C_CR2_ADD10);
bogdanm	0:9b334a45a8ff	345	}
bogdanm	0:9b334a45a8ff	346	/* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
bogdanm	0:9b334a45a8ff	347	hi2c->Instance->CR2 \|= (I2C_CR2_AUTOEND \| I2C_CR2_NACK);
bogdanm	0:9b334a45a8ff	348
bogdanm	0:9b334a45a8ff	349	/---------------------------- I2Cx OAR2 Configuration ---------------------/
bogdanm	0:9b334a45a8ff	350	/* Configure I2Cx: Dual mode and Own Address2 */
bogdanm	0:9b334a45a8ff	351	hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2 \| (hi2c->Init.OwnAddress2Masks << 8));
bogdanm	0:9b334a45a8ff	352
bogdanm	0:9b334a45a8ff	353	/---------------------------- I2Cx CR1 Configuration ----------------------/
bogdanm	0:9b334a45a8ff	354	/* Configure I2Cx: Generalcall and NoStretch mode */
bogdanm	0:9b334a45a8ff	355	hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode);
bogdanm	0:9b334a45a8ff	356
bogdanm	0:9b334a45a8ff	357	/* Enable the selected I2C peripheral */
bogdanm	0:9b334a45a8ff	358	__HAL_I2C_ENABLE(hi2c);
bogdanm	0:9b334a45a8ff	359
bogdanm	0:9b334a45a8ff	360	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	361	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	362
bogdanm	0:9b334a45a8ff	363	return HAL_OK;
bogdanm	0:9b334a45a8ff	364	}
bogdanm	0:9b334a45a8ff	365
bogdanm	0:9b334a45a8ff	366	/**
bogdanm	0:9b334a45a8ff	367	* @brief DeInitializes the I2C peripheral.
bogdanm	0:9b334a45a8ff	368	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	369	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	370	* @retval HAL status
bogdanm	0:9b334a45a8ff	371	*/
bogdanm	0:9b334a45a8ff	372	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	373	{
bogdanm	0:9b334a45a8ff	374	/* Check the I2C handle allocation */
bogdanm	0:9b334a45a8ff	375	if(hi2c == NULL)
bogdanm	0:9b334a45a8ff	376	{
bogdanm	0:9b334a45a8ff	377	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	378	}
bogdanm	0:9b334a45a8ff	379
bogdanm	0:9b334a45a8ff	380	/* Check the parameters */
bogdanm	0:9b334a45a8ff	381	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm	0:9b334a45a8ff	382
bogdanm	0:9b334a45a8ff	383	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	384
bogdanm	0:9b334a45a8ff	385	/* Disable the I2C Peripheral Clock */
bogdanm	0:9b334a45a8ff	386	__HAL_I2C_DISABLE(hi2c);
bogdanm	0:9b334a45a8ff	387
bogdanm	0:9b334a45a8ff	388	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
bogdanm	0:9b334a45a8ff	389	HAL_I2C_MspDeInit(hi2c);
bogdanm	0:9b334a45a8ff	390
bogdanm	0:9b334a45a8ff	391	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	392
bogdanm	0:9b334a45a8ff	393	hi2c->State = HAL_I2C_STATE_RESET;
bogdanm	0:9b334a45a8ff	394
bogdanm	0:9b334a45a8ff	395	/* Release Lock */
bogdanm	0:9b334a45a8ff	396	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	397
bogdanm	0:9b334a45a8ff	398	return HAL_OK;
bogdanm	0:9b334a45a8ff	399	}
bogdanm	0:9b334a45a8ff	400
bogdanm	0:9b334a45a8ff	401	/**
bogdanm	0:9b334a45a8ff	402	* @brief I2C MSP Init.
bogdanm	0:9b334a45a8ff	403	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	404	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	405	* @retval None
bogdanm	0:9b334a45a8ff	406	*/
bogdanm	0:9b334a45a8ff	407	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	408	{
mbed_official	83:a036322b8637	409	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	410	UNUSED(hi2c);
mbed_official	83:a036322b8637	411
bogdanm	0:9b334a45a8ff	412	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	413	the HAL_I2C_MspInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	414	*/
bogdanm	0:9b334a45a8ff	415	}
bogdanm	0:9b334a45a8ff	416
bogdanm	0:9b334a45a8ff	417	/**
bogdanm	0:9b334a45a8ff	418	* @brief I2C MSP DeInit
bogdanm	0:9b334a45a8ff	419	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	420	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	421	* @retval None
bogdanm	0:9b334a45a8ff	422	*/
bogdanm	0:9b334a45a8ff	423	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	424	{
mbed_official	83:a036322b8637	425	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	426	UNUSED(hi2c);
mbed_official	83:a036322b8637	427
bogdanm	0:9b334a45a8ff	428	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	429	the HAL_I2C_MspDeInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	430	*/
bogdanm	0:9b334a45a8ff	431	}
bogdanm	0:9b334a45a8ff	432
bogdanm	0:9b334a45a8ff	433	/**
bogdanm	0:9b334a45a8ff	434	* @}
bogdanm	0:9b334a45a8ff	435	*/
bogdanm	0:9b334a45a8ff	436
bogdanm	0:9b334a45a8ff	437	/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
bogdanm	0:9b334a45a8ff	438	* @brief Data transfers functions
bogdanm	0:9b334a45a8ff	439	*
bogdanm	0:9b334a45a8ff	440	@verbatim
bogdanm	0:9b334a45a8ff	441	===============================================================================
bogdanm	0:9b334a45a8ff	442	##### IO operation functions #####
bogdanm	0:9b334a45a8ff	443	===============================================================================
bogdanm	0:9b334a45a8ff	444	[..]
bogdanm	0:9b334a45a8ff	445	This subsection provides a set of functions allowing to manage the I2C data
bogdanm	0:9b334a45a8ff	446	transfers.
bogdanm	0:9b334a45a8ff	447
bogdanm	0:9b334a45a8ff	448	(#) There are two modes of transfer:
bogdanm	0:9b334a45a8ff	449	(++) Blocking mode : The communication is performed in the polling mode.
bogdanm	0:9b334a45a8ff	450	The status of all data processing is returned by the same function
bogdanm	0:9b334a45a8ff	451	after finishing transfer.
bogdanm	0:9b334a45a8ff	452	(++) No-Blocking mode : The communication is performed using Interrupts
bogdanm	0:9b334a45a8ff	453	or DMA. These functions return the status of the transfer startup.
bogdanm	0:9b334a45a8ff	454	The end of the data processing will be indicated through the
bogdanm	0:9b334a45a8ff	455	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
bogdanm	0:9b334a45a8ff	456	using DMA mode.
bogdanm	0:9b334a45a8ff	457
bogdanm	0:9b334a45a8ff	458	(#) Blocking mode functions are :
bogdanm	0:9b334a45a8ff	459	(++) HAL_I2C_Master_Transmit()
bogdanm	0:9b334a45a8ff	460	(++) HAL_I2C_Master_Receive()
bogdanm	0:9b334a45a8ff	461	(++) HAL_I2C_Slave_Transmit()
bogdanm	0:9b334a45a8ff	462	(++) HAL_I2C_Slave_Receive()
bogdanm	0:9b334a45a8ff	463	(++) HAL_I2C_Mem_Write()
bogdanm	0:9b334a45a8ff	464	(++) HAL_I2C_Mem_Read()
bogdanm	0:9b334a45a8ff	465	(++) HAL_I2C_IsDeviceReady()
bogdanm	0:9b334a45a8ff	466
bogdanm	0:9b334a45a8ff	467	(#) No-Blocking mode functions with Interrupt are :
bogdanm	0:9b334a45a8ff	468	(++) HAL_I2C_Master_Transmit_IT()
bogdanm	0:9b334a45a8ff	469	(++) HAL_I2C_Master_Receive_IT()
bogdanm	0:9b334a45a8ff	470	(++) HAL_I2C_Slave_Transmit_IT()
bogdanm	0:9b334a45a8ff	471	(++) HAL_I2C_Slave_Receive_IT()
bogdanm	0:9b334a45a8ff	472	(++) HAL_I2C_Mem_Write_IT()
bogdanm	0:9b334a45a8ff	473	(++) HAL_I2C_Mem_Read_IT()
bogdanm	0:9b334a45a8ff	474
bogdanm	0:9b334a45a8ff	475	(#) No-Blocking mode functions with DMA are :
bogdanm	0:9b334a45a8ff	476	(++) HAL_I2C_Master_Transmit_DMA()
bogdanm	0:9b334a45a8ff	477	(++) HAL_I2C_Master_Receive_DMA()
bogdanm	0:9b334a45a8ff	478	(++) HAL_I2C_Slave_Transmit_DMA()
bogdanm	0:9b334a45a8ff	479	(++) HAL_I2C_Slave_Receive_DMA()
bogdanm	0:9b334a45a8ff	480	(++) HAL_I2C_Mem_Write_DMA()
bogdanm	0:9b334a45a8ff	481	(++) HAL_I2C_Mem_Read_DMA()
bogdanm	0:9b334a45a8ff	482
bogdanm	0:9b334a45a8ff	483	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
bogdanm	0:9b334a45a8ff	484	(++) HAL_I2C_MemTxCpltCallback()
bogdanm	0:9b334a45a8ff	485	(++) HAL_I2C_MemRxCpltCallback()
bogdanm	0:9b334a45a8ff	486	(++) HAL_I2C_MasterTxCpltCallback()
bogdanm	0:9b334a45a8ff	487	(++) HAL_I2C_MasterRxCpltCallback()
bogdanm	0:9b334a45a8ff	488	(++) HAL_I2C_SlaveTxCpltCallback()
bogdanm	0:9b334a45a8ff	489	(++) HAL_I2C_SlaveRxCpltCallback()
bogdanm	0:9b334a45a8ff	490	(++) HAL_I2C_ErrorCallback()
bogdanm	0:9b334a45a8ff	491
bogdanm	0:9b334a45a8ff	492	@endverbatim
bogdanm	0:9b334a45a8ff	493	* @{
bogdanm	0:9b334a45a8ff	494	*/
bogdanm	0:9b334a45a8ff	495
bogdanm	0:9b334a45a8ff	496	/**
bogdanm	0:9b334a45a8ff	497	* @brief Transmits in master mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	498	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	499	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	500	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	501	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	502	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	503	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	504	* @retval HAL status
bogdanm	0:9b334a45a8ff	505	*/
bogdanm	0:9b334a45a8ff	506	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	507	{
bogdanm	0:9b334a45a8ff	508	uint32_t sizetmp = 0;
mbed_official	83:a036322b8637	509
bogdanm	0:9b334a45a8ff	510	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	511	{
bogdanm	0:9b334a45a8ff	512	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	513	{
bogdanm	0:9b334a45a8ff	514	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	515	}
bogdanm	0:9b334a45a8ff	516
bogdanm	0:9b334a45a8ff	517	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	518	{
bogdanm	0:9b334a45a8ff	519	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	520	}
mbed_official	83:a036322b8637	521
bogdanm	0:9b334a45a8ff	522	/* Process Locked */
bogdanm	0:9b334a45a8ff	523	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	524
bogdanm	0:9b334a45a8ff	525	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm	0:9b334a45a8ff	526	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	527
bogdanm	0:9b334a45a8ff	528	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	529	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	530	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	531	if(Size > 255)
bogdanm	0:9b334a45a8ff	532	{
bogdanm	0:9b334a45a8ff	533	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	534	sizetmp = 255;
bogdanm	0:9b334a45a8ff	535	}
bogdanm	0:9b334a45a8ff	536	else
bogdanm	0:9b334a45a8ff	537	{
bogdanm	0:9b334a45a8ff	538	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	539	sizetmp = Size;
bogdanm	0:9b334a45a8ff	540	}
mbed_official	83:a036322b8637	541
bogdanm	0:9b334a45a8ff	542	do
bogdanm	0:9b334a45a8ff	543	{
bogdanm	0:9b334a45a8ff	544	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	545	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	546	{
bogdanm	0:9b334a45a8ff	547	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	548	{
bogdanm	0:9b334a45a8ff	549	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	550	}
bogdanm	0:9b334a45a8ff	551	else
bogdanm	0:9b334a45a8ff	552	{
bogdanm	0:9b334a45a8ff	553	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	554	}
bogdanm	0:9b334a45a8ff	555	}
bogdanm	0:9b334a45a8ff	556	/* Write data to TXDR */
bogdanm	0:9b334a45a8ff	557	hi2c->Instance->TXDR = (*pData++);
bogdanm	0:9b334a45a8ff	558	sizetmp--;
bogdanm	0:9b334a45a8ff	559	Size--;
mbed_official	83:a036322b8637	560
bogdanm	0:9b334a45a8ff	561	if((sizetmp == 0)&&(Size!=0))
bogdanm	0:9b334a45a8ff	562	{
mbed_official	83:a036322b8637	563	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	564	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	565	{
bogdanm	0:9b334a45a8ff	566	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	567	}
bogdanm	0:9b334a45a8ff	568
bogdanm	0:9b334a45a8ff	569	if(Size > 255)
bogdanm	0:9b334a45a8ff	570	{
bogdanm	0:9b334a45a8ff	571	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	572	sizetmp = 255;
bogdanm	0:9b334a45a8ff	573	}
bogdanm	0:9b334a45a8ff	574	else
bogdanm	0:9b334a45a8ff	575	{
bogdanm	0:9b334a45a8ff	576	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	577	sizetmp = Size;
bogdanm	0:9b334a45a8ff	578	}
bogdanm	0:9b334a45a8ff	579	}
mbed_official	83:a036322b8637	580
bogdanm	0:9b334a45a8ff	581	}while(Size > 0);
bogdanm	0:9b334a45a8ff	582
bogdanm	0:9b334a45a8ff	583	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	584	/* Wait until STOPF flag is set */
bogdanm	0:9b334a45a8ff	585	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	586	{
bogdanm	0:9b334a45a8ff	587	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	588	{
bogdanm	0:9b334a45a8ff	589	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	590	}
bogdanm	0:9b334a45a8ff	591	else
bogdanm	0:9b334a45a8ff	592	{
bogdanm	0:9b334a45a8ff	593	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	594	}
bogdanm	0:9b334a45a8ff	595	}
bogdanm	0:9b334a45a8ff	596
bogdanm	0:9b334a45a8ff	597	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	598	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	599
bogdanm	0:9b334a45a8ff	600	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	601	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	602
bogdanm	0:9b334a45a8ff	603	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	604
bogdanm	0:9b334a45a8ff	605	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	606	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	607
bogdanm	0:9b334a45a8ff	608	return HAL_OK;
bogdanm	0:9b334a45a8ff	609	}
bogdanm	0:9b334a45a8ff	610	else
bogdanm	0:9b334a45a8ff	611	{
bogdanm	0:9b334a45a8ff	612	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	613	}
bogdanm	0:9b334a45a8ff	614	}
bogdanm	0:9b334a45a8ff	615
bogdanm	0:9b334a45a8ff	616	/**
bogdanm	0:9b334a45a8ff	617	* @brief Receives in master mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	618	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	619	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	620	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	621	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	622	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	623	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	624	* @retval HAL status
bogdanm	0:9b334a45a8ff	625	*/
bogdanm	0:9b334a45a8ff	626	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	627	{
bogdanm	0:9b334a45a8ff	628	uint32_t sizetmp = 0;
mbed_official	83:a036322b8637	629
bogdanm	0:9b334a45a8ff	630	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	631	{
bogdanm	0:9b334a45a8ff	632	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	633	{
bogdanm	0:9b334a45a8ff	634	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	635	}
bogdanm	0:9b334a45a8ff	636
bogdanm	0:9b334a45a8ff	637	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	638	{
bogdanm	0:9b334a45a8ff	639	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	640	}
mbed_official	83:a036322b8637	641
bogdanm	0:9b334a45a8ff	642	/* Process Locked */
bogdanm	0:9b334a45a8ff	643	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	644
bogdanm	0:9b334a45a8ff	645	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm	0:9b334a45a8ff	646	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	647
bogdanm	0:9b334a45a8ff	648	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	649	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	650	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	651	if(Size > 255)
bogdanm	0:9b334a45a8ff	652	{
bogdanm	0:9b334a45a8ff	653	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	654	sizetmp = 255;
bogdanm	0:9b334a45a8ff	655	}
bogdanm	0:9b334a45a8ff	656	else
bogdanm	0:9b334a45a8ff	657	{
bogdanm	0:9b334a45a8ff	658	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	659	sizetmp = Size;
bogdanm	0:9b334a45a8ff	660	}
bogdanm	0:9b334a45a8ff	661
bogdanm	0:9b334a45a8ff	662	do
bogdanm	0:9b334a45a8ff	663	{
bogdanm	0:9b334a45a8ff	664	/* Wait until RXNE flag is set */
mbed_official	83:a036322b8637	665	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, I2C_FLAG_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	666	{
mbed_official	83:a036322b8637	667	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official	83:a036322b8637	668	{
mbed_official	83:a036322b8637	669	return HAL_ERROR;
mbed_official	83:a036322b8637	670	}
mbed_official	83:a036322b8637	671	else
mbed_official	83:a036322b8637	672	{
mbed_official	83:a036322b8637	673	return HAL_TIMEOUT;
mbed_official	83:a036322b8637	674	}
mbed_official	83:a036322b8637	675	}
mbed_official	83:a036322b8637	676
bogdanm	0:9b334a45a8ff	677	/* Write data to RXDR */
bogdanm	0:9b334a45a8ff	678	(*pData++) =hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	679	sizetmp--;
bogdanm	0:9b334a45a8ff	680	Size--;
mbed_official	83:a036322b8637	681
bogdanm	0:9b334a45a8ff	682	if((sizetmp == 0)&&(Size!=0))
bogdanm	0:9b334a45a8ff	683	{
bogdanm	0:9b334a45a8ff	684	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	685	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	686	{
bogdanm	0:9b334a45a8ff	687	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	688	}
bogdanm	0:9b334a45a8ff	689
bogdanm	0:9b334a45a8ff	690	if(Size > 255)
bogdanm	0:9b334a45a8ff	691	{
bogdanm	0:9b334a45a8ff	692	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	693	sizetmp = 255;
bogdanm	0:9b334a45a8ff	694	}
bogdanm	0:9b334a45a8ff	695	else
bogdanm	0:9b334a45a8ff	696	{
bogdanm	0:9b334a45a8ff	697	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	698	sizetmp = Size;
bogdanm	0:9b334a45a8ff	699	}
bogdanm	0:9b334a45a8ff	700	}
mbed_official	83:a036322b8637	701
bogdanm	0:9b334a45a8ff	702	}while(Size > 0);
bogdanm	0:9b334a45a8ff	703
bogdanm	0:9b334a45a8ff	704	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	705	/* Wait until STOPF flag is set */
bogdanm	0:9b334a45a8ff	706	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	707	{
bogdanm	0:9b334a45a8ff	708	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	709	{
bogdanm	0:9b334a45a8ff	710	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	711	}
bogdanm	0:9b334a45a8ff	712	else
bogdanm	0:9b334a45a8ff	713	{
bogdanm	0:9b334a45a8ff	714	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	715	}
bogdanm	0:9b334a45a8ff	716	}
bogdanm	0:9b334a45a8ff	717
bogdanm	0:9b334a45a8ff	718	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	719	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	720
bogdanm	0:9b334a45a8ff	721	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	722	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	723
bogdanm	0:9b334a45a8ff	724	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	725
bogdanm	0:9b334a45a8ff	726	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	727	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	728
bogdanm	0:9b334a45a8ff	729	return HAL_OK;
bogdanm	0:9b334a45a8ff	730	}
bogdanm	0:9b334a45a8ff	731	else
bogdanm	0:9b334a45a8ff	732	{
bogdanm	0:9b334a45a8ff	733	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	734	}
bogdanm	0:9b334a45a8ff	735	}
bogdanm	0:9b334a45a8ff	736
bogdanm	0:9b334a45a8ff	737	/**
bogdanm	0:9b334a45a8ff	738	* @brief Transmits in slave mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	739	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	740	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	741	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	742	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	743	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	744	* @retval HAL status
bogdanm	0:9b334a45a8ff	745	*/
bogdanm	0:9b334a45a8ff	746	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	747	{
bogdanm	0:9b334a45a8ff	748	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	749	{
bogdanm	0:9b334a45a8ff	750	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	751	{
bogdanm	0:9b334a45a8ff	752	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	753	}
bogdanm	0:9b334a45a8ff	754
bogdanm	0:9b334a45a8ff	755	/* Process Locked */
bogdanm	0:9b334a45a8ff	756	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	757
bogdanm	0:9b334a45a8ff	758	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm	0:9b334a45a8ff	759	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	760
bogdanm	0:9b334a45a8ff	761	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	762	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official	83:a036322b8637	763
bogdanm	0:9b334a45a8ff	764	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	765	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	766	{
bogdanm	0:9b334a45a8ff	767	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	768	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	769	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	770	}
bogdanm	0:9b334a45a8ff	771
bogdanm	0:9b334a45a8ff	772	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	773	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
mbed_official	83:a036322b8637	774
bogdanm	0:9b334a45a8ff	775	/* If 10bit addressing mode is selected */
bogdanm	0:9b334a45a8ff	776	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm	0:9b334a45a8ff	777	{
bogdanm	0:9b334a45a8ff	778	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	779	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	780	{
bogdanm	0:9b334a45a8ff	781	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	782	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	783	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	784	}
mbed_official	83:a036322b8637	785
bogdanm	0:9b334a45a8ff	786	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	787	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	788	}
mbed_official	83:a036322b8637	789
bogdanm	0:9b334a45a8ff	790	/* Wait until DIR flag is set Transmitter mode */
bogdanm	0:9b334a45a8ff	791	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	792	{
bogdanm	0:9b334a45a8ff	793	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	794	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	795	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	796	}
mbed_official	83:a036322b8637	797
bogdanm	0:9b334a45a8ff	798	do
bogdanm	0:9b334a45a8ff	799	{
bogdanm	0:9b334a45a8ff	800	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	801	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	802	{
bogdanm	0:9b334a45a8ff	803	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	804	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	805
bogdanm	0:9b334a45a8ff	806	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	807	{
bogdanm	0:9b334a45a8ff	808	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	809	}
bogdanm	0:9b334a45a8ff	810	else
bogdanm	0:9b334a45a8ff	811	{
bogdanm	0:9b334a45a8ff	812	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	813	}
bogdanm	0:9b334a45a8ff	814	}
bogdanm	0:9b334a45a8ff	815
bogdanm	0:9b334a45a8ff	816	/* Read data from TXDR */
bogdanm	0:9b334a45a8ff	817	hi2c->Instance->TXDR = (*pData++);
bogdanm	0:9b334a45a8ff	818	Size--;
bogdanm	0:9b334a45a8ff	819	}while(Size > 0);
bogdanm	0:9b334a45a8ff	820
bogdanm	0:9b334a45a8ff	821	/* Wait until STOP flag is set */
bogdanm	0:9b334a45a8ff	822	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	823	{
bogdanm	0:9b334a45a8ff	824	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	825	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	826
bogdanm	0:9b334a45a8ff	827	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	828	{
mbed_official	83:a036322b8637	829	/* Normal use case for Transmitter mode */
mbed_official	83:a036322b8637	830	/* A NACK is generated to confirm the end of transfer */
mbed_official	83:a036322b8637	831	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	832	}
bogdanm	0:9b334a45a8ff	833	else
bogdanm	0:9b334a45a8ff	834	{
bogdanm	0:9b334a45a8ff	835	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	836	}
bogdanm	0:9b334a45a8ff	837	}
bogdanm	0:9b334a45a8ff	838
bogdanm	0:9b334a45a8ff	839	/* Clear STOP flag */
bogdanm	0:9b334a45a8ff	840	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	841
bogdanm	0:9b334a45a8ff	842	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	843	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	844	{
bogdanm	0:9b334a45a8ff	845	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	846	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	847	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	848	}
bogdanm	0:9b334a45a8ff	849
bogdanm	0:9b334a45a8ff	850	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	851	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	852
bogdanm	0:9b334a45a8ff	853	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	854
bogdanm	0:9b334a45a8ff	855	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	856	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	857
bogdanm	0:9b334a45a8ff	858	return HAL_OK;
bogdanm	0:9b334a45a8ff	859	}
bogdanm	0:9b334a45a8ff	860	else
bogdanm	0:9b334a45a8ff	861	{
bogdanm	0:9b334a45a8ff	862	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	863	}
bogdanm	0:9b334a45a8ff	864	}
bogdanm	0:9b334a45a8ff	865
bogdanm	0:9b334a45a8ff	866	/**
bogdanm	0:9b334a45a8ff	867	* @brief Receive in slave mode an amount of data in blocking mode
bogdanm	0:9b334a45a8ff	868	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	869	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	870	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	871	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	872	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	873	* @retval HAL status
bogdanm	0:9b334a45a8ff	874	*/
bogdanm	0:9b334a45a8ff	875	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	876	{
bogdanm	0:9b334a45a8ff	877	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	878	{
bogdanm	0:9b334a45a8ff	879	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	880	{
bogdanm	0:9b334a45a8ff	881	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	882	}
bogdanm	0:9b334a45a8ff	883
bogdanm	0:9b334a45a8ff	884	/* Process Locked */
bogdanm	0:9b334a45a8ff	885	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	886
bogdanm	0:9b334a45a8ff	887	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm	0:9b334a45a8ff	888	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	889
bogdanm	0:9b334a45a8ff	890	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	891	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official	83:a036322b8637	892
bogdanm	0:9b334a45a8ff	893	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	894	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	895	{
bogdanm	0:9b334a45a8ff	896	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	897	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	898	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	899	}
mbed_official	83:a036322b8637	900
bogdanm	0:9b334a45a8ff	901	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	902	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	903
bogdanm	0:9b334a45a8ff	904	/* Wait until DIR flag is reset Receiver mode */
bogdanm	0:9b334a45a8ff	905	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	906	{
bogdanm	0:9b334a45a8ff	907	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	908	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	909	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	910	}
mbed_official	83:a036322b8637	911
bogdanm	0:9b334a45a8ff	912	while(Size > 0)
bogdanm	0:9b334a45a8ff	913	{
bogdanm	0:9b334a45a8ff	914	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	915	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	916	{
bogdanm	0:9b334a45a8ff	917	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	918	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	919
mbed_official	83:a036322b8637	920	/* Store Last receive data if any */
mbed_official	83:a036322b8637	921	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
mbed_official	83:a036322b8637	922	{
mbed_official	83:a036322b8637	923	/* Read data from RXDR */
mbed_official	83:a036322b8637	924	(*pData++) = hi2c->Instance->RXDR;
mbed_official	83:a036322b8637	925	}
mbed_official	83:a036322b8637	926
bogdanm	0:9b334a45a8ff	927	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
bogdanm	0:9b334a45a8ff	928	{
bogdanm	0:9b334a45a8ff	929	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	930	}
bogdanm	0:9b334a45a8ff	931	else
bogdanm	0:9b334a45a8ff	932	{
bogdanm	0:9b334a45a8ff	933	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	934	}
bogdanm	0:9b334a45a8ff	935	}
bogdanm	0:9b334a45a8ff	936
bogdanm	0:9b334a45a8ff	937	/* Read data from RXDR */
bogdanm	0:9b334a45a8ff	938	(*pData++) = hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	939	Size--;
bogdanm	0:9b334a45a8ff	940	}
bogdanm	0:9b334a45a8ff	941
bogdanm	0:9b334a45a8ff	942	/* Wait until STOP flag is set */
bogdanm	0:9b334a45a8ff	943	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	944	{
bogdanm	0:9b334a45a8ff	945	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	946	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	947
bogdanm	0:9b334a45a8ff	948	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	949	{
bogdanm	0:9b334a45a8ff	950	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	951	}
bogdanm	0:9b334a45a8ff	952	else
bogdanm	0:9b334a45a8ff	953	{
bogdanm	0:9b334a45a8ff	954	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	955	}
bogdanm	0:9b334a45a8ff	956	}
mbed_official	83:a036322b8637	957
bogdanm	0:9b334a45a8ff	958	/* Clear STOP flag */
bogdanm	0:9b334a45a8ff	959	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	960
bogdanm	0:9b334a45a8ff	961	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	962	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	963	{
bogdanm	0:9b334a45a8ff	964	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	965	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	966	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	967	}
mbed_official	83:a036322b8637	968
bogdanm	0:9b334a45a8ff	969
bogdanm	0:9b334a45a8ff	970	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	971	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	972
bogdanm	0:9b334a45a8ff	973	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	974
bogdanm	0:9b334a45a8ff	975	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	976	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	977
bogdanm	0:9b334a45a8ff	978	return HAL_OK;
bogdanm	0:9b334a45a8ff	979	}
bogdanm	0:9b334a45a8ff	980	else
bogdanm	0:9b334a45a8ff	981	{
bogdanm	0:9b334a45a8ff	982	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	983	}
bogdanm	0:9b334a45a8ff	984	}
bogdanm	0:9b334a45a8ff	985
bogdanm	0:9b334a45a8ff	986	/**
bogdanm	0:9b334a45a8ff	987	* @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	988	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	989	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	990	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	991	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	992	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	993	* @retval HAL status
bogdanm	0:9b334a45a8ff	994	*/
bogdanm	0:9b334a45a8ff	995	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	996	{
bogdanm	0:9b334a45a8ff	997	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	998	{
bogdanm	0:9b334a45a8ff	999	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1000	{
bogdanm	0:9b334a45a8ff	1001	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1002	}
bogdanm	0:9b334a45a8ff	1003
bogdanm	0:9b334a45a8ff	1004	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1005	{
bogdanm	0:9b334a45a8ff	1006	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1007	}
mbed_official	83:a036322b8637	1008
bogdanm	0:9b334a45a8ff	1009	/* Process Locked */
bogdanm	0:9b334a45a8ff	1010	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1011
bogdanm	0:9b334a45a8ff	1012	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm	0:9b334a45a8ff	1013	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1014
bogdanm	0:9b334a45a8ff	1015	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1016	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1017	if(Size > 255)
bogdanm	0:9b334a45a8ff	1018	{
bogdanm	0:9b334a45a8ff	1019	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1020	}
bogdanm	0:9b334a45a8ff	1021	else
bogdanm	0:9b334a45a8ff	1022	{
bogdanm	0:9b334a45a8ff	1023	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1024	}
bogdanm	0:9b334a45a8ff	1025
bogdanm	0:9b334a45a8ff	1026	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1027	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1028	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1029	{
bogdanm	0:9b334a45a8ff	1030	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	1031	}
bogdanm	0:9b334a45a8ff	1032	else
bogdanm	0:9b334a45a8ff	1033	{
bogdanm	0:9b334a45a8ff	1034	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	1035	}
bogdanm	0:9b334a45a8ff	1036
bogdanm	0:9b334a45a8ff	1037	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1038	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	1039
bogdanm	0:9b334a45a8ff	1040	/* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official	83:a036322b8637	1041	to avoid the risk of I2C interrupt handle execution before current
mbed_official	83:a036322b8637	1042	process unlock */
mbed_official	83:a036322b8637	1043
mbed_official	83:a036322b8637	1044
bogdanm	0:9b334a45a8ff	1045	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	1046	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1047	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1048	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_TXI );
mbed_official	83:a036322b8637	1049
bogdanm	0:9b334a45a8ff	1050	return HAL_OK;
bogdanm	0:9b334a45a8ff	1051	}
bogdanm	0:9b334a45a8ff	1052	else
bogdanm	0:9b334a45a8ff	1053	{
bogdanm	0:9b334a45a8ff	1054	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1055	}
bogdanm	0:9b334a45a8ff	1056	}
bogdanm	0:9b334a45a8ff	1057
bogdanm	0:9b334a45a8ff	1058	/**
bogdanm	0:9b334a45a8ff	1059	* @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1060	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1061	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1062	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1063	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1064	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1065	* @retval HAL status
bogdanm	0:9b334a45a8ff	1066	*/
bogdanm	0:9b334a45a8ff	1067	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1068	{
bogdanm	0:9b334a45a8ff	1069	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1070	{
bogdanm	0:9b334a45a8ff	1071	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1072	{
bogdanm	0:9b334a45a8ff	1073	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1074	}
bogdanm	0:9b334a45a8ff	1075
bogdanm	0:9b334a45a8ff	1076	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1077	{
bogdanm	0:9b334a45a8ff	1078	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1079	}
mbed_official	83:a036322b8637	1080
bogdanm	0:9b334a45a8ff	1081	/* Process Locked */
bogdanm	0:9b334a45a8ff	1082	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1083
bogdanm	0:9b334a45a8ff	1084	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm	0:9b334a45a8ff	1085	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1086
bogdanm	0:9b334a45a8ff	1087	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1088	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1089	if(Size > 255)
bogdanm	0:9b334a45a8ff	1090	{
bogdanm	0:9b334a45a8ff	1091	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1092	}
bogdanm	0:9b334a45a8ff	1093	else
bogdanm	0:9b334a45a8ff	1094	{
bogdanm	0:9b334a45a8ff	1095	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1096	}
bogdanm	0:9b334a45a8ff	1097
bogdanm	0:9b334a45a8ff	1098	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1099	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1100	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1101	{
bogdanm	0:9b334a45a8ff	1102	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1103	}
bogdanm	0:9b334a45a8ff	1104	else
bogdanm	0:9b334a45a8ff	1105	{
bogdanm	0:9b334a45a8ff	1106	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1107	}
bogdanm	0:9b334a45a8ff	1108
bogdanm	0:9b334a45a8ff	1109	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1110	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	1111
bogdanm	0:9b334a45a8ff	1112	/* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official	83:a036322b8637	1113	to avoid the risk of I2C interrupt handle execution before current
mbed_official	83:a036322b8637	1114	process unlock */
bogdanm	0:9b334a45a8ff	1115
bogdanm	0:9b334a45a8ff	1116	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm	0:9b334a45a8ff	1117	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1118	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1119	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_RXI );
bogdanm	0:9b334a45a8ff	1120
bogdanm	0:9b334a45a8ff	1121	return HAL_OK;
bogdanm	0:9b334a45a8ff	1122	}
bogdanm	0:9b334a45a8ff	1123	else
bogdanm	0:9b334a45a8ff	1124	{
bogdanm	0:9b334a45a8ff	1125	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1126	}
bogdanm	0:9b334a45a8ff	1127	}
bogdanm	0:9b334a45a8ff	1128
bogdanm	0:9b334a45a8ff	1129	/**
bogdanm	0:9b334a45a8ff	1130	* @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1131	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1132	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1133	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1134	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1135	* @retval HAL status
bogdanm	0:9b334a45a8ff	1136	*/
bogdanm	0:9b334a45a8ff	1137	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1138	{
bogdanm	0:9b334a45a8ff	1139	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1140	{
bogdanm	0:9b334a45a8ff	1141	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1142	{
bogdanm	0:9b334a45a8ff	1143	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1144	}
bogdanm	0:9b334a45a8ff	1145
bogdanm	0:9b334a45a8ff	1146	/* Process Locked */
bogdanm	0:9b334a45a8ff	1147	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1148
bogdanm	0:9b334a45a8ff	1149	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1150	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1151
bogdanm	0:9b334a45a8ff	1152	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1153	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official	83:a036322b8637	1154
bogdanm	0:9b334a45a8ff	1155	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1156	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1157	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1158
bogdanm	0:9b334a45a8ff	1159	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1160	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	1161
bogdanm	0:9b334a45a8ff	1162	/* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official	83:a036322b8637	1163	to avoid the risk of I2C interrupt handle execution before current
mbed_official	83:a036322b8637	1164	process unlock */
bogdanm	0:9b334a45a8ff	1165
bogdanm	0:9b334a45a8ff	1166	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	1167	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1168	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1169	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_TXI );
bogdanm	0:9b334a45a8ff	1170
bogdanm	0:9b334a45a8ff	1171	return HAL_OK;
bogdanm	0:9b334a45a8ff	1172	}
bogdanm	0:9b334a45a8ff	1173	else
bogdanm	0:9b334a45a8ff	1174	{
bogdanm	0:9b334a45a8ff	1175	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1176	}
bogdanm	0:9b334a45a8ff	1177	}
bogdanm	0:9b334a45a8ff	1178
bogdanm	0:9b334a45a8ff	1179	/**
bogdanm	0:9b334a45a8ff	1180	* @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1181	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1182	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1183	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1184	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1185	* @retval HAL status
bogdanm	0:9b334a45a8ff	1186	*/
bogdanm	0:9b334a45a8ff	1187	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1188	{
bogdanm	0:9b334a45a8ff	1189	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1190	{
bogdanm	0:9b334a45a8ff	1191	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1192	{
bogdanm	0:9b334a45a8ff	1193	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1194	}
bogdanm	0:9b334a45a8ff	1195
bogdanm	0:9b334a45a8ff	1196	/* Process Locked */
bogdanm	0:9b334a45a8ff	1197	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1198
bogdanm	0:9b334a45a8ff	1199	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1200	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1201
bogdanm	0:9b334a45a8ff	1202	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1203	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official	83:a036322b8637	1204
bogdanm	0:9b334a45a8ff	1205	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1206	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1207	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1208
bogdanm	0:9b334a45a8ff	1209	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1210	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	1211
bogdanm	0:9b334a45a8ff	1212	/* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official	83:a036322b8637	1213	to avoid the risk of I2C interrupt handle execution before current
mbed_official	83:a036322b8637	1214	process unlock */
bogdanm	0:9b334a45a8ff	1215
bogdanm	0:9b334a45a8ff	1216	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm	0:9b334a45a8ff	1217	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1218	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1219	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI);
bogdanm	0:9b334a45a8ff	1220
bogdanm	0:9b334a45a8ff	1221	return HAL_OK;
bogdanm	0:9b334a45a8ff	1222	}
bogdanm	0:9b334a45a8ff	1223	else
bogdanm	0:9b334a45a8ff	1224	{
bogdanm	0:9b334a45a8ff	1225	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1226	}
bogdanm	0:9b334a45a8ff	1227	}
bogdanm	0:9b334a45a8ff	1228
bogdanm	0:9b334a45a8ff	1229	/**
bogdanm	0:9b334a45a8ff	1230	* @brief Transmit in master mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1231	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1232	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1233	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1234	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1235	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1236	* @retval HAL status
bogdanm	0:9b334a45a8ff	1237	*/
bogdanm	0:9b334a45a8ff	1238	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1239	{
bogdanm	0:9b334a45a8ff	1240	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1241	{
bogdanm	0:9b334a45a8ff	1242	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1243	{
bogdanm	0:9b334a45a8ff	1244	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1245	}
mbed_official	83:a036322b8637	1246
bogdanm	0:9b334a45a8ff	1247	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1248	{
bogdanm	0:9b334a45a8ff	1249	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1250	}
mbed_official	83:a036322b8637	1251
bogdanm	0:9b334a45a8ff	1252	/* Process Locked */
bogdanm	0:9b334a45a8ff	1253	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1254
bogdanm	0:9b334a45a8ff	1255	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm	0:9b334a45a8ff	1256	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1257
bogdanm	0:9b334a45a8ff	1258	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1259	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1260	if(Size > 255)
bogdanm	0:9b334a45a8ff	1261	{
bogdanm	0:9b334a45a8ff	1262	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1263	}
bogdanm	0:9b334a45a8ff	1264	else
bogdanm	0:9b334a45a8ff	1265	{
bogdanm	0:9b334a45a8ff	1266	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1267	}
bogdanm	0:9b334a45a8ff	1268
bogdanm	0:9b334a45a8ff	1269	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1270	hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
bogdanm	0:9b334a45a8ff	1271
bogdanm	0:9b334a45a8ff	1272	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1273	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1274
bogdanm	0:9b334a45a8ff	1275	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1276	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	1277
bogdanm	0:9b334a45a8ff	1278	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1279	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1280	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1281	{
bogdanm	0:9b334a45a8ff	1282	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	1283	}
bogdanm	0:9b334a45a8ff	1284	else
bogdanm	0:9b334a45a8ff	1285	{
bogdanm	0:9b334a45a8ff	1286	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	1287	}
mbed_official	83:a036322b8637	1288
bogdanm	0:9b334a45a8ff	1289	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	1290	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm	0:9b334a45a8ff	1291	{
bogdanm	0:9b334a45a8ff	1292	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1293	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	1294
mbed_official	83:a036322b8637	1295	/* Abort DMA */
mbed_official	83:a036322b8637	1296	HAL_DMA_Abort(hi2c->hdmatx);
mbed_official	83:a036322b8637	1297
bogdanm	0:9b334a45a8ff	1298	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1299	{
bogdanm	0:9b334a45a8ff	1300	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1301	}
bogdanm	0:9b334a45a8ff	1302	else
bogdanm	0:9b334a45a8ff	1303	{
bogdanm	0:9b334a45a8ff	1304	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1305	}
bogdanm	0:9b334a45a8ff	1306	}
bogdanm	0:9b334a45a8ff	1307
bogdanm	0:9b334a45a8ff	1308	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1309	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	1310
bogdanm	0:9b334a45a8ff	1311	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1312	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1313
bogdanm	0:9b334a45a8ff	1314	return HAL_OK;
bogdanm	0:9b334a45a8ff	1315	}
bogdanm	0:9b334a45a8ff	1316	else
bogdanm	0:9b334a45a8ff	1317	{
bogdanm	0:9b334a45a8ff	1318	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1319	}
bogdanm	0:9b334a45a8ff	1320	}
bogdanm	0:9b334a45a8ff	1321
bogdanm	0:9b334a45a8ff	1322	/**
bogdanm	0:9b334a45a8ff	1323	* @brief Receive in master mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1324	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1325	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1326	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1327	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1328	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1329	* @retval HAL status
bogdanm	0:9b334a45a8ff	1330	*/
bogdanm	0:9b334a45a8ff	1331	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1332	{
bogdanm	0:9b334a45a8ff	1333	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1334	{
bogdanm	0:9b334a45a8ff	1335	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1336	{
bogdanm	0:9b334a45a8ff	1337	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1338	}
mbed_official	83:a036322b8637	1339
bogdanm	0:9b334a45a8ff	1340	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1341	{
bogdanm	0:9b334a45a8ff	1342	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1343	}
mbed_official	83:a036322b8637	1344
bogdanm	0:9b334a45a8ff	1345	/* Process Locked */
bogdanm	0:9b334a45a8ff	1346	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1347
bogdanm	0:9b334a45a8ff	1348	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm	0:9b334a45a8ff	1349	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1350
bogdanm	0:9b334a45a8ff	1351	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1352	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1353	if(Size > 255)
bogdanm	0:9b334a45a8ff	1354	{
bogdanm	0:9b334a45a8ff	1355	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1356	}
bogdanm	0:9b334a45a8ff	1357	else
bogdanm	0:9b334a45a8ff	1358	{
bogdanm	0:9b334a45a8ff	1359	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1360	}
bogdanm	0:9b334a45a8ff	1361
bogdanm	0:9b334a45a8ff	1362	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1363	hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
bogdanm	0:9b334a45a8ff	1364
bogdanm	0:9b334a45a8ff	1365	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1366	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1367
bogdanm	0:9b334a45a8ff	1368	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1369	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	1370
bogdanm	0:9b334a45a8ff	1371	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1372	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1373	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1374	{
bogdanm	0:9b334a45a8ff	1375	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1376	}
bogdanm	0:9b334a45a8ff	1377	else
bogdanm	0:9b334a45a8ff	1378	{
bogdanm	0:9b334a45a8ff	1379	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1380	}
mbed_official	83:a036322b8637	1381
bogdanm	0:9b334a45a8ff	1382	/* Wait until RXNE flag is set */
mbed_official	83:a036322b8637	1383	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, I2C_FLAG_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1384	{
mbed_official	83:a036322b8637	1385	/* Abort DMA */
mbed_official	83:a036322b8637	1386	HAL_DMA_Abort(hi2c->hdmarx);
mbed_official	83:a036322b8637	1387
mbed_official	83:a036322b8637	1388	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official	83:a036322b8637	1389	{
mbed_official	83:a036322b8637	1390	return HAL_ERROR;
mbed_official	83:a036322b8637	1391	}
mbed_official	83:a036322b8637	1392	else
mbed_official	83:a036322b8637	1393	{
mbed_official	83:a036322b8637	1394	return HAL_TIMEOUT;
mbed_official	83:a036322b8637	1395	}
mbed_official	83:a036322b8637	1396	}
bogdanm	0:9b334a45a8ff	1397
bogdanm	0:9b334a45a8ff	1398	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1399	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	1400
bogdanm	0:9b334a45a8ff	1401	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1402	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1403
bogdanm	0:9b334a45a8ff	1404	return HAL_OK;
bogdanm	0:9b334a45a8ff	1405	}
bogdanm	0:9b334a45a8ff	1406	else
bogdanm	0:9b334a45a8ff	1407	{
bogdanm	0:9b334a45a8ff	1408	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1409	}
bogdanm	0:9b334a45a8ff	1410	}
bogdanm	0:9b334a45a8ff	1411
bogdanm	0:9b334a45a8ff	1412	/**
bogdanm	0:9b334a45a8ff	1413	* @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1414	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1415	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1416	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1417	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1418	* @retval HAL status
bogdanm	0:9b334a45a8ff	1419	*/
bogdanm	0:9b334a45a8ff	1420	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1421	{
bogdanm	0:9b334a45a8ff	1422	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1423	{
bogdanm	0:9b334a45a8ff	1424	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1425	{
bogdanm	0:9b334a45a8ff	1426	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1427	}
bogdanm	0:9b334a45a8ff	1428	/* Process Locked */
bogdanm	0:9b334a45a8ff	1429	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1430
bogdanm	0:9b334a45a8ff	1431	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1432	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1433
bogdanm	0:9b334a45a8ff	1434	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1435	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1436	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1437
bogdanm	0:9b334a45a8ff	1438	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1439	hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
bogdanm	0:9b334a45a8ff	1440
bogdanm	0:9b334a45a8ff	1441	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1442	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1443
bogdanm	0:9b334a45a8ff	1444	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1445	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	1446
bogdanm	0:9b334a45a8ff	1447	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1448	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official	83:a036322b8637	1449
bogdanm	0:9b334a45a8ff	1450	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1451	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm	0:9b334a45a8ff	1452	{
bogdanm	0:9b334a45a8ff	1453	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1454	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1455	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1456	}
mbed_official	83:a036322b8637	1457
bogdanm	0:9b334a45a8ff	1458	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1459	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	1460
bogdanm	0:9b334a45a8ff	1461	/* If 10bits addressing mode is selected */
bogdanm	0:9b334a45a8ff	1462	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm	0:9b334a45a8ff	1463	{
bogdanm	0:9b334a45a8ff	1464	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1465	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm	0:9b334a45a8ff	1466	{
bogdanm	0:9b334a45a8ff	1467	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1468	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1469	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1470	}
mbed_official	83:a036322b8637	1471
bogdanm	0:9b334a45a8ff	1472	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1473	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	1474	}
bogdanm	0:9b334a45a8ff	1475
bogdanm	0:9b334a45a8ff	1476	/* Wait until DIR flag is set Transmitter mode */
bogdanm	0:9b334a45a8ff	1477	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm	0:9b334a45a8ff	1478	{
bogdanm	0:9b334a45a8ff	1479	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1480	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1481	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1482	}
mbed_official	83:a036322b8637	1483
bogdanm	0:9b334a45a8ff	1484	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1485	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	1486
bogdanm	0:9b334a45a8ff	1487	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1488	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1489
bogdanm	0:9b334a45a8ff	1490	return HAL_OK;
bogdanm	0:9b334a45a8ff	1491	}
bogdanm	0:9b334a45a8ff	1492	else
bogdanm	0:9b334a45a8ff	1493	{
bogdanm	0:9b334a45a8ff	1494	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1495	}
bogdanm	0:9b334a45a8ff	1496	}
bogdanm	0:9b334a45a8ff	1497
bogdanm	0:9b334a45a8ff	1498	/**
bogdanm	0:9b334a45a8ff	1499	* @brief Receive in slave mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1500	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1501	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1502	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1503	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1504	* @retval HAL status
bogdanm	0:9b334a45a8ff	1505	*/
bogdanm	0:9b334a45a8ff	1506	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1507	{
bogdanm	0:9b334a45a8ff	1508	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1509	{
bogdanm	0:9b334a45a8ff	1510	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1511	{
bogdanm	0:9b334a45a8ff	1512	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1513	}
bogdanm	0:9b334a45a8ff	1514	/* Process Locked */
bogdanm	0:9b334a45a8ff	1515	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1516
bogdanm	0:9b334a45a8ff	1517	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1518	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1519
bogdanm	0:9b334a45a8ff	1520	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1521	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1522	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1523
bogdanm	0:9b334a45a8ff	1524	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1525	hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
bogdanm	0:9b334a45a8ff	1526
bogdanm	0:9b334a45a8ff	1527	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1528	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1529
bogdanm	0:9b334a45a8ff	1530	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1531	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, Size);
bogdanm	0:9b334a45a8ff	1532
bogdanm	0:9b334a45a8ff	1533	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1534	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official	83:a036322b8637	1535
bogdanm	0:9b334a45a8ff	1536	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1537	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm	0:9b334a45a8ff	1538	{
bogdanm	0:9b334a45a8ff	1539	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1540	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1541	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1542	}
mbed_official	83:a036322b8637	1543
bogdanm	0:9b334a45a8ff	1544	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1545	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	1546
bogdanm	0:9b334a45a8ff	1547	/* Wait until DIR flag is set Receiver mode */
bogdanm	0:9b334a45a8ff	1548	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, I2C_TIMEOUT_DIR) != HAL_OK)
bogdanm	0:9b334a45a8ff	1549	{
bogdanm	0:9b334a45a8ff	1550	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1551	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1552	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1553	}
mbed_official	83:a036322b8637	1554
bogdanm	0:9b334a45a8ff	1555	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1556	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	1557
bogdanm	0:9b334a45a8ff	1558	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1559	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1560
bogdanm	0:9b334a45a8ff	1561	return HAL_OK;
bogdanm	0:9b334a45a8ff	1562	}
bogdanm	0:9b334a45a8ff	1563	else
bogdanm	0:9b334a45a8ff	1564	{
bogdanm	0:9b334a45a8ff	1565	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1566	}
bogdanm	0:9b334a45a8ff	1567	}
bogdanm	0:9b334a45a8ff	1568	/**
bogdanm	0:9b334a45a8ff	1569	* @brief Write an amount of data in blocking mode to a specific memory address
bogdanm	0:9b334a45a8ff	1570	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1571	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1572	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1573	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1574	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1575	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1576	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1577	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1578	* @retval HAL status
bogdanm	0:9b334a45a8ff	1579	*/
bogdanm	0:9b334a45a8ff	1580	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1581	{
bogdanm	0:9b334a45a8ff	1582	uint32_t Sizetmp = 0;
mbed_official	83:a036322b8637	1583
bogdanm	0:9b334a45a8ff	1584	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1585	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1586
bogdanm	0:9b334a45a8ff	1587	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1588	{
bogdanm	0:9b334a45a8ff	1589	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1590	{
bogdanm	0:9b334a45a8ff	1591	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1592	}
mbed_official	83:a036322b8637	1593
bogdanm	0:9b334a45a8ff	1594	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1595	{
bogdanm	0:9b334a45a8ff	1596	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1597	}
mbed_official	83:a036322b8637	1598
bogdanm	0:9b334a45a8ff	1599	/* Process Locked */
bogdanm	0:9b334a45a8ff	1600	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1601
bogdanm	0:9b334a45a8ff	1602	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	1603	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1604
bogdanm	0:9b334a45a8ff	1605	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1606	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1607	{
bogdanm	0:9b334a45a8ff	1608	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1609	{
bogdanm	0:9b334a45a8ff	1610	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1611	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1612	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1613	}
bogdanm	0:9b334a45a8ff	1614	else
bogdanm	0:9b334a45a8ff	1615	{
bogdanm	0:9b334a45a8ff	1616	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1617	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1618	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1619	}
bogdanm	0:9b334a45a8ff	1620	}
mbed_official	83:a036322b8637	1621
bogdanm	0:9b334a45a8ff	1622	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	1623	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	1624	if(Size > 255)
bogdanm	0:9b334a45a8ff	1625	{
bogdanm	0:9b334a45a8ff	1626	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1627	Sizetmp = 255;
bogdanm	0:9b334a45a8ff	1628	}
bogdanm	0:9b334a45a8ff	1629	else
bogdanm	0:9b334a45a8ff	1630	{
bogdanm	0:9b334a45a8ff	1631	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1632	Sizetmp = Size;
bogdanm	0:9b334a45a8ff	1633	}
bogdanm	0:9b334a45a8ff	1634
bogdanm	0:9b334a45a8ff	1635	do
bogdanm	0:9b334a45a8ff	1636	{
bogdanm	0:9b334a45a8ff	1637	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	1638	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1639	{
bogdanm	0:9b334a45a8ff	1640	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1641	{
bogdanm	0:9b334a45a8ff	1642	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1643	}
bogdanm	0:9b334a45a8ff	1644	else
bogdanm	0:9b334a45a8ff	1645	{
bogdanm	0:9b334a45a8ff	1646	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1647	}
bogdanm	0:9b334a45a8ff	1648	}
mbed_official	83:a036322b8637	1649
bogdanm	0:9b334a45a8ff	1650	/* Write data to DR */
bogdanm	0:9b334a45a8ff	1651	hi2c->Instance->TXDR = (*pData++);
bogdanm	0:9b334a45a8ff	1652	Sizetmp--;
bogdanm	0:9b334a45a8ff	1653	Size--;
mbed_official	83:a036322b8637	1654
bogdanm	0:9b334a45a8ff	1655	if((Sizetmp == 0)&&(Size!=0))
bogdanm	0:9b334a45a8ff	1656	{
bogdanm	0:9b334a45a8ff	1657	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	1658	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1659	{
bogdanm	0:9b334a45a8ff	1660	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1661	}
mbed_official	83:a036322b8637	1662
bogdanm	0:9b334a45a8ff	1663
bogdanm	0:9b334a45a8ff	1664	if(Size > 255)
bogdanm	0:9b334a45a8ff	1665	{
bogdanm	0:9b334a45a8ff	1666	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1667	Sizetmp = 255;
bogdanm	0:9b334a45a8ff	1668	}
bogdanm	0:9b334a45a8ff	1669	else
bogdanm	0:9b334a45a8ff	1670	{
bogdanm	0:9b334a45a8ff	1671	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1672	Sizetmp = Size;
bogdanm	0:9b334a45a8ff	1673	}
bogdanm	0:9b334a45a8ff	1674	}
bogdanm	0:9b334a45a8ff	1675
bogdanm	0:9b334a45a8ff	1676	}while(Size > 0);
bogdanm	0:9b334a45a8ff	1677
bogdanm	0:9b334a45a8ff	1678	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	1679	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	1680	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	1681	{
bogdanm	0:9b334a45a8ff	1682	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1683	{
bogdanm	0:9b334a45a8ff	1684	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1685	}
bogdanm	0:9b334a45a8ff	1686	else
bogdanm	0:9b334a45a8ff	1687	{
bogdanm	0:9b334a45a8ff	1688	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1689	}
bogdanm	0:9b334a45a8ff	1690	}
bogdanm	0:9b334a45a8ff	1691
bogdanm	0:9b334a45a8ff	1692	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	1693	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	1694
bogdanm	0:9b334a45a8ff	1695	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	1696	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	1697
bogdanm	0:9b334a45a8ff	1698	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	1699
bogdanm	0:9b334a45a8ff	1700	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1701	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1702
bogdanm	0:9b334a45a8ff	1703	return HAL_OK;
bogdanm	0:9b334a45a8ff	1704	}
bogdanm	0:9b334a45a8ff	1705	else
bogdanm	0:9b334a45a8ff	1706	{
bogdanm	0:9b334a45a8ff	1707	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1708	}
bogdanm	0:9b334a45a8ff	1709	}
bogdanm	0:9b334a45a8ff	1710
bogdanm	0:9b334a45a8ff	1711	/**
bogdanm	0:9b334a45a8ff	1712	* @brief Read an amount of data in blocking mode from a specific memory address
bogdanm	0:9b334a45a8ff	1713	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1714	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1715	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1716	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1717	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1718	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1719	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1720	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1721	* @retval HAL status
bogdanm	0:9b334a45a8ff	1722	*/
bogdanm	0:9b334a45a8ff	1723	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1724	{
bogdanm	0:9b334a45a8ff	1725	uint32_t Sizetmp = 0;
mbed_official	83:a036322b8637	1726
bogdanm	0:9b334a45a8ff	1727	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1728	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1729
bogdanm	0:9b334a45a8ff	1730	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1731	{
bogdanm	0:9b334a45a8ff	1732	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1733	{
bogdanm	0:9b334a45a8ff	1734	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1735	}
mbed_official	83:a036322b8637	1736
bogdanm	0:9b334a45a8ff	1737	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1738	{
bogdanm	0:9b334a45a8ff	1739	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1740	}
mbed_official	83:a036322b8637	1741
bogdanm	0:9b334a45a8ff	1742	/* Process Locked */
bogdanm	0:9b334a45a8ff	1743	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1744
bogdanm	0:9b334a45a8ff	1745	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	1746	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1747
bogdanm	0:9b334a45a8ff	1748	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1749	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1750	{
bogdanm	0:9b334a45a8ff	1751	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1752	{
bogdanm	0:9b334a45a8ff	1753	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1754	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1755	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1756	}
bogdanm	0:9b334a45a8ff	1757	else
bogdanm	0:9b334a45a8ff	1758	{
bogdanm	0:9b334a45a8ff	1759	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1760	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1761	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1762	}
bogdanm	0:9b334a45a8ff	1763	}
mbed_official	83:a036322b8637	1764
bogdanm	0:9b334a45a8ff	1765	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1766	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1767	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	1768	if(Size > 255)
bogdanm	0:9b334a45a8ff	1769	{
bogdanm	0:9b334a45a8ff	1770	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1771	Sizetmp = 255;
bogdanm	0:9b334a45a8ff	1772	}
bogdanm	0:9b334a45a8ff	1773	else
bogdanm	0:9b334a45a8ff	1774	{
bogdanm	0:9b334a45a8ff	1775	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1776	Sizetmp = Size;
bogdanm	0:9b334a45a8ff	1777	}
bogdanm	0:9b334a45a8ff	1778
bogdanm	0:9b334a45a8ff	1779	do
bogdanm	0:9b334a45a8ff	1780	{
bogdanm	0:9b334a45a8ff	1781	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	1782	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1783	{
bogdanm	0:9b334a45a8ff	1784	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1785	}
mbed_official	83:a036322b8637	1786
bogdanm	0:9b334a45a8ff	1787	/* Read data from RXDR */
bogdanm	0:9b334a45a8ff	1788	(*pData++) = hi2c->Instance->RXDR;
mbed_official	83:a036322b8637	1789
bogdanm	0:9b334a45a8ff	1790	/* Decrement the Size counter */
bogdanm	0:9b334a45a8ff	1791	Sizetmp--;
bogdanm	0:9b334a45a8ff	1792	Size--;
mbed_official	83:a036322b8637	1793
bogdanm	0:9b334a45a8ff	1794	if((Sizetmp == 0)&&(Size!=0))
bogdanm	0:9b334a45a8ff	1795	{
bogdanm	0:9b334a45a8ff	1796	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	1797	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1798	{
bogdanm	0:9b334a45a8ff	1799	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1800	}
bogdanm	0:9b334a45a8ff	1801
bogdanm	0:9b334a45a8ff	1802	if(Size > 255)
bogdanm	0:9b334a45a8ff	1803	{
bogdanm	0:9b334a45a8ff	1804	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1805	Sizetmp = 255;
bogdanm	0:9b334a45a8ff	1806	}
bogdanm	0:9b334a45a8ff	1807	else
bogdanm	0:9b334a45a8ff	1808	{
bogdanm	0:9b334a45a8ff	1809	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1810	Sizetmp = Size;
bogdanm	0:9b334a45a8ff	1811	}
bogdanm	0:9b334a45a8ff	1812	}
mbed_official	83:a036322b8637	1813
bogdanm	0:9b334a45a8ff	1814	}while(Size > 0);
mbed_official	83:a036322b8637	1815
bogdanm	0:9b334a45a8ff	1816	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	1817	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	1818	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	1819	{
bogdanm	0:9b334a45a8ff	1820	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1821	{
bogdanm	0:9b334a45a8ff	1822	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1823	}
bogdanm	0:9b334a45a8ff	1824	else
bogdanm	0:9b334a45a8ff	1825	{
bogdanm	0:9b334a45a8ff	1826	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1827	}
bogdanm	0:9b334a45a8ff	1828	}
mbed_official	83:a036322b8637	1829
bogdanm	0:9b334a45a8ff	1830	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	1831	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	1832
bogdanm	0:9b334a45a8ff	1833	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	1834	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	1835
bogdanm	0:9b334a45a8ff	1836	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	1837
bogdanm	0:9b334a45a8ff	1838	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1839	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1840
bogdanm	0:9b334a45a8ff	1841	return HAL_OK;
bogdanm	0:9b334a45a8ff	1842	}
bogdanm	0:9b334a45a8ff	1843	else
bogdanm	0:9b334a45a8ff	1844	{
bogdanm	0:9b334a45a8ff	1845	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1846	}
bogdanm	0:9b334a45a8ff	1847	}
bogdanm	0:9b334a45a8ff	1848	/**
bogdanm	0:9b334a45a8ff	1849	* @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
bogdanm	0:9b334a45a8ff	1850	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1851	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1852	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1853	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1854	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1855	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1856	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1857	* @retval HAL status
bogdanm	0:9b334a45a8ff	1858	*/
bogdanm	0:9b334a45a8ff	1859	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1860	{
bogdanm	0:9b334a45a8ff	1861	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1862	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1863
bogdanm	0:9b334a45a8ff	1864	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1865	{
bogdanm	0:9b334a45a8ff	1866	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1867	{
bogdanm	0:9b334a45a8ff	1868	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1869	}
bogdanm	0:9b334a45a8ff	1870
bogdanm	0:9b334a45a8ff	1871	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1872	{
bogdanm	0:9b334a45a8ff	1873	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1874	}
mbed_official	83:a036322b8637	1875
bogdanm	0:9b334a45a8ff	1876	/* Process Locked */
bogdanm	0:9b334a45a8ff	1877	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1878
bogdanm	0:9b334a45a8ff	1879	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	1880	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1881
bogdanm	0:9b334a45a8ff	1882	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1883	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1884	if(Size > 255)
bogdanm	0:9b334a45a8ff	1885	{
bogdanm	0:9b334a45a8ff	1886	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1887	}
bogdanm	0:9b334a45a8ff	1888	else
bogdanm	0:9b334a45a8ff	1889	{
bogdanm	0:9b334a45a8ff	1890	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1891	}
bogdanm	0:9b334a45a8ff	1892
bogdanm	0:9b334a45a8ff	1893	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1894	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1895	{
bogdanm	0:9b334a45a8ff	1896	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1897	{
bogdanm	0:9b334a45a8ff	1898	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1899	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1900	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1901	}
bogdanm	0:9b334a45a8ff	1902	else
bogdanm	0:9b334a45a8ff	1903	{
bogdanm	0:9b334a45a8ff	1904	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1905	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1906	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1907	}
bogdanm	0:9b334a45a8ff	1908	}
mbed_official	83:a036322b8637	1909
bogdanm	0:9b334a45a8ff	1910	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	1911	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	1912	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1913	{
bogdanm	0:9b334a45a8ff	1914	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1915	}
bogdanm	0:9b334a45a8ff	1916	else
bogdanm	0:9b334a45a8ff	1917	{
bogdanm	0:9b334a45a8ff	1918	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1919	}
mbed_official	83:a036322b8637	1920
bogdanm	0:9b334a45a8ff	1921	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1922	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	1923
bogdanm	0:9b334a45a8ff	1924	/* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official	83:a036322b8637	1925	to avoid the risk of I2C interrupt handle execution before current
mbed_official	83:a036322b8637	1926	process unlock */
bogdanm	0:9b334a45a8ff	1927
bogdanm	0:9b334a45a8ff	1928	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	1929	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1930	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1931	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_TXI );
bogdanm	0:9b334a45a8ff	1932
bogdanm	0:9b334a45a8ff	1933	return HAL_OK;
bogdanm	0:9b334a45a8ff	1934	}
bogdanm	0:9b334a45a8ff	1935	else
bogdanm	0:9b334a45a8ff	1936	{
bogdanm	0:9b334a45a8ff	1937	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1938	}
bogdanm	0:9b334a45a8ff	1939	}
bogdanm	0:9b334a45a8ff	1940
bogdanm	0:9b334a45a8ff	1941	/**
bogdanm	0:9b334a45a8ff	1942	* @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
bogdanm	0:9b334a45a8ff	1943	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1944	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1945	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1946	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1947	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1948	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1949	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1950	* @retval HAL status
bogdanm	0:9b334a45a8ff	1951	*/
bogdanm	0:9b334a45a8ff	1952	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1953	{
bogdanm	0:9b334a45a8ff	1954	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1955	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1956
bogdanm	0:9b334a45a8ff	1957	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1958	{
bogdanm	0:9b334a45a8ff	1959	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1960	{
bogdanm	0:9b334a45a8ff	1961	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1962	}
bogdanm	0:9b334a45a8ff	1963
bogdanm	0:9b334a45a8ff	1964	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1965	{
bogdanm	0:9b334a45a8ff	1966	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1967	}
mbed_official	83:a036322b8637	1968
bogdanm	0:9b334a45a8ff	1969	/* Process Locked */
bogdanm	0:9b334a45a8ff	1970	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1971
bogdanm	0:9b334a45a8ff	1972	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	1973
bogdanm	0:9b334a45a8ff	1974	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1975	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1976	if(Size > 255)
bogdanm	0:9b334a45a8ff	1977	{
bogdanm	0:9b334a45a8ff	1978	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1979	}
bogdanm	0:9b334a45a8ff	1980	else
bogdanm	0:9b334a45a8ff	1981	{
bogdanm	0:9b334a45a8ff	1982	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1983	}
bogdanm	0:9b334a45a8ff	1984
bogdanm	0:9b334a45a8ff	1985	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1986	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1987	{
bogdanm	0:9b334a45a8ff	1988	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1989	{
bogdanm	0:9b334a45a8ff	1990	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1991	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1992	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1993	}
bogdanm	0:9b334a45a8ff	1994	else
bogdanm	0:9b334a45a8ff	1995	{
bogdanm	0:9b334a45a8ff	1996	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1997	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1998	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1999	}
bogdanm	0:9b334a45a8ff	2000	}
mbed_official	83:a036322b8637	2001
bogdanm	0:9b334a45a8ff	2002	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	2003	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	2004	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	2005	{
bogdanm	0:9b334a45a8ff	2006	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	2007	}
bogdanm	0:9b334a45a8ff	2008	else
bogdanm	0:9b334a45a8ff	2009	{
bogdanm	0:9b334a45a8ff	2010	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	2011	}
mbed_official	83:a036322b8637	2012
bogdanm	0:9b334a45a8ff	2013	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2014	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2015
bogdanm	0:9b334a45a8ff	2016	/* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official	83:a036322b8637	2017	to avoid the risk of I2C interrupt handle execution before current
mbed_official	83:a036322b8637	2018	process unlock */
bogdanm	0:9b334a45a8ff	2019
bogdanm	0:9b334a45a8ff	2020	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm	0:9b334a45a8ff	2021	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	2022	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	2023	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_RXI );
bogdanm	0:9b334a45a8ff	2024
bogdanm	0:9b334a45a8ff	2025	return HAL_OK;
bogdanm	0:9b334a45a8ff	2026	}
bogdanm	0:9b334a45a8ff	2027	else
bogdanm	0:9b334a45a8ff	2028	{
bogdanm	0:9b334a45a8ff	2029	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2030	}
bogdanm	0:9b334a45a8ff	2031	}
bogdanm	0:9b334a45a8ff	2032	/**
bogdanm	0:9b334a45a8ff	2033	* @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
bogdanm	0:9b334a45a8ff	2034	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2035	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2036	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2037	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	2038	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	2039	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	2040	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	2041	* @retval HAL status
bogdanm	0:9b334a45a8ff	2042	*/
bogdanm	0:9b334a45a8ff	2043	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	2044	{
bogdanm	0:9b334a45a8ff	2045	/* Check the parameters */
bogdanm	0:9b334a45a8ff	2046	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	2047
bogdanm	0:9b334a45a8ff	2048	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2049	{
bogdanm	0:9b334a45a8ff	2050	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	2051	{
bogdanm	0:9b334a45a8ff	2052	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2053	}
bogdanm	0:9b334a45a8ff	2054
bogdanm	0:9b334a45a8ff	2055	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2056	{
bogdanm	0:9b334a45a8ff	2057	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2058	}
mbed_official	83:a036322b8637	2059
bogdanm	0:9b334a45a8ff	2060	/* Process Locked */
bogdanm	0:9b334a45a8ff	2061	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2062
bogdanm	0:9b334a45a8ff	2063	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	2064	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	2065
bogdanm	0:9b334a45a8ff	2066	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	2067	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	2068	if(Size > 255)
bogdanm	0:9b334a45a8ff	2069	{
bogdanm	0:9b334a45a8ff	2070	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	2071	}
bogdanm	0:9b334a45a8ff	2072	else
bogdanm	0:9b334a45a8ff	2073	{
bogdanm	0:9b334a45a8ff	2074	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	2075	}
bogdanm	0:9b334a45a8ff	2076
bogdanm	0:9b334a45a8ff	2077	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	2078	hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
bogdanm	0:9b334a45a8ff	2079
bogdanm	0:9b334a45a8ff	2080	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	2081	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	2082
bogdanm	0:9b334a45a8ff	2083	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	2084	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	2085
bogdanm	0:9b334a45a8ff	2086	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	2087	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2088	{
bogdanm	0:9b334a45a8ff	2089	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2090	{
bogdanm	0:9b334a45a8ff	2091	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2092	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2093	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2094	}
bogdanm	0:9b334a45a8ff	2095	else
bogdanm	0:9b334a45a8ff	2096	{
bogdanm	0:9b334a45a8ff	2097	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2098	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2099	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2100	}
bogdanm	0:9b334a45a8ff	2101	}
bogdanm	0:9b334a45a8ff	2102
bogdanm	0:9b334a45a8ff	2103	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	2104	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	2105	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	2106	{
bogdanm	0:9b334a45a8ff	2107	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2108	}
bogdanm	0:9b334a45a8ff	2109	else
bogdanm	0:9b334a45a8ff	2110	{
bogdanm	0:9b334a45a8ff	2111	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2112	}
bogdanm	0:9b334a45a8ff	2113
bogdanm	0:9b334a45a8ff	2114	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	2115	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm	0:9b334a45a8ff	2116	{
bogdanm	0:9b334a45a8ff	2117	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2118	{
bogdanm	0:9b334a45a8ff	2119	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2120	}
bogdanm	0:9b334a45a8ff	2121	else
bogdanm	0:9b334a45a8ff	2122	{
bogdanm	0:9b334a45a8ff	2123	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2124	}
bogdanm	0:9b334a45a8ff	2125	}
mbed_official	83:a036322b8637	2126
bogdanm	0:9b334a45a8ff	2127	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	2128	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	2129
bogdanm	0:9b334a45a8ff	2130	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2131	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2132
bogdanm	0:9b334a45a8ff	2133	return HAL_OK;
bogdanm	0:9b334a45a8ff	2134	}
bogdanm	0:9b334a45a8ff	2135	else
bogdanm	0:9b334a45a8ff	2136	{
bogdanm	0:9b334a45a8ff	2137	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2138	}
bogdanm	0:9b334a45a8ff	2139	}
bogdanm	0:9b334a45a8ff	2140
bogdanm	0:9b334a45a8ff	2141	/**
bogdanm	0:9b334a45a8ff	2142	* @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
bogdanm	0:9b334a45a8ff	2143	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2144	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2145	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2146	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	2147	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	2148	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	2149	* @param Size: Amount of data to be read
bogdanm	0:9b334a45a8ff	2150	* @retval HAL status
bogdanm	0:9b334a45a8ff	2151	*/
bogdanm	0:9b334a45a8ff	2152	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	2153	{
bogdanm	0:9b334a45a8ff	2154	/* Check the parameters */
bogdanm	0:9b334a45a8ff	2155	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	2156
bogdanm	0:9b334a45a8ff	2157	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2158	{
bogdanm	0:9b334a45a8ff	2159	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	2160	{
bogdanm	0:9b334a45a8ff	2161	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2162	}
mbed_official	83:a036322b8637	2163
bogdanm	0:9b334a45a8ff	2164	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2165	{
bogdanm	0:9b334a45a8ff	2166	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2167	}
mbed_official	83:a036322b8637	2168
bogdanm	0:9b334a45a8ff	2169	/* Process Locked */
bogdanm	0:9b334a45a8ff	2170	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2171
bogdanm	0:9b334a45a8ff	2172	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	2173
bogdanm	0:9b334a45a8ff	2174	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	2175	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	2176	if(Size > 255)
bogdanm	0:9b334a45a8ff	2177	{
bogdanm	0:9b334a45a8ff	2178	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	2179	}
bogdanm	0:9b334a45a8ff	2180	else
bogdanm	0:9b334a45a8ff	2181	{
bogdanm	0:9b334a45a8ff	2182	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	2183	}
mbed_official	83:a036322b8637	2184
bogdanm	0:9b334a45a8ff	2185	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	2186	hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
bogdanm	0:9b334a45a8ff	2187
bogdanm	0:9b334a45a8ff	2188	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	2189	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	2190
bogdanm	0:9b334a45a8ff	2191	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	2192	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	2193
bogdanm	0:9b334a45a8ff	2194	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	2195	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2196	{
bogdanm	0:9b334a45a8ff	2197	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2198	{
bogdanm	0:9b334a45a8ff	2199	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2200	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2201	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2202	}
bogdanm	0:9b334a45a8ff	2203	else
bogdanm	0:9b334a45a8ff	2204	{
bogdanm	0:9b334a45a8ff	2205	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2206	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2207	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2208	}
bogdanm	0:9b334a45a8ff	2209	}
bogdanm	0:9b334a45a8ff	2210
bogdanm	0:9b334a45a8ff	2211	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	2212	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	2213	{
bogdanm	0:9b334a45a8ff	2214	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	2215	}
bogdanm	0:9b334a45a8ff	2216	else
bogdanm	0:9b334a45a8ff	2217	{
bogdanm	0:9b334a45a8ff	2218	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	2219	}
mbed_official	83:a036322b8637	2220
bogdanm	0:9b334a45a8ff	2221	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	2222	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	2223	{
bogdanm	0:9b334a45a8ff	2224	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2225	}
bogdanm	0:9b334a45a8ff	2226
bogdanm	0:9b334a45a8ff	2227	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	2228	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	2229
bogdanm	0:9b334a45a8ff	2230	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2231	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2232
bogdanm	0:9b334a45a8ff	2233	return HAL_OK;
bogdanm	0:9b334a45a8ff	2234	}
bogdanm	0:9b334a45a8ff	2235	else
bogdanm	0:9b334a45a8ff	2236	{
bogdanm	0:9b334a45a8ff	2237	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2238	}
bogdanm	0:9b334a45a8ff	2239	}
bogdanm	0:9b334a45a8ff	2240
bogdanm	0:9b334a45a8ff	2241	/**
bogdanm	0:9b334a45a8ff	2242	* @brief Checks if target device is ready for communication.
bogdanm	0:9b334a45a8ff	2243	* @note This function is used with Memory devices
bogdanm	0:9b334a45a8ff	2244	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2245	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2246	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2247	* @param Trials: Number of trials
bogdanm	0:9b334a45a8ff	2248	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	2249	* @retval HAL status
bogdanm	0:9b334a45a8ff	2250	*/
bogdanm	0:9b334a45a8ff	2251	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	2252	{
bogdanm	0:9b334a45a8ff	2253	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	2254
bogdanm	0:9b334a45a8ff	2255	__IO uint32_t I2C_Trials = 0;
mbed_official	83:a036322b8637	2256
bogdanm	0:9b334a45a8ff	2257	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2258	{
bogdanm	0:9b334a45a8ff	2259	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2260	{
bogdanm	0:9b334a45a8ff	2261	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2262	}
mbed_official	83:a036322b8637	2263
bogdanm	0:9b334a45a8ff	2264	/* Process Locked */
bogdanm	0:9b334a45a8ff	2265	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2266
bogdanm	0:9b334a45a8ff	2267	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	2268	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	2269
bogdanm	0:9b334a45a8ff	2270	do
bogdanm	0:9b334a45a8ff	2271	{
bogdanm	0:9b334a45a8ff	2272	/* Generate Start */
bogdanm	0:9b334a45a8ff	2273	hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode,DevAddress);
bogdanm	0:9b334a45a8ff	2274
bogdanm	0:9b334a45a8ff	2275	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	2276	/* Wait until STOPF flag is set or a NACK flag is set*/
bogdanm	0:9b334a45a8ff	2277	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	2278	while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT))
bogdanm	0:9b334a45a8ff	2279	{
bogdanm	0:9b334a45a8ff	2280	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	2281	{
bogdanm	0:9b334a45a8ff	2282	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	2283	{
bogdanm	0:9b334a45a8ff	2284	/* Device is ready */
bogdanm	0:9b334a45a8ff	2285	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2286	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2287	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2288	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2289	}
bogdanm	0:9b334a45a8ff	2290	}
bogdanm	0:9b334a45a8ff	2291	}
bogdanm	0:9b334a45a8ff	2292
bogdanm	0:9b334a45a8ff	2293	/* Check if the NACKF flag has not been set */
bogdanm	0:9b334a45a8ff	2294	if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET)
bogdanm	0:9b334a45a8ff	2295	{
bogdanm	0:9b334a45a8ff	2296	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	2297	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2298	{
bogdanm	0:9b334a45a8ff	2299	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2300	}
bogdanm	0:9b334a45a8ff	2301
bogdanm	0:9b334a45a8ff	2302	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2303	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	2304
bogdanm	0:9b334a45a8ff	2305	/* Device is ready */
bogdanm	0:9b334a45a8ff	2306	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2307
bogdanm	0:9b334a45a8ff	2308	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2309	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2310
bogdanm	0:9b334a45a8ff	2311	return HAL_OK;
bogdanm	0:9b334a45a8ff	2312	}
bogdanm	0:9b334a45a8ff	2313	else
bogdanm	0:9b334a45a8ff	2314	{
bogdanm	0:9b334a45a8ff	2315	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	2316	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2317	{
bogdanm	0:9b334a45a8ff	2318	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2319	}
mbed_official	83:a036322b8637	2320
bogdanm	0:9b334a45a8ff	2321	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2322	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	2323
bogdanm	0:9b334a45a8ff	2324	/* Clear STOP Flag, auto generated with autoend*/
bogdanm	0:9b334a45a8ff	2325	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2326	}
bogdanm	0:9b334a45a8ff	2327
bogdanm	0:9b334a45a8ff	2328	/* Check if the maximum allowed number of trials has been reached */
bogdanm	0:9b334a45a8ff	2329	if (I2C_Trials++ == Trials)
bogdanm	0:9b334a45a8ff	2330	{
bogdanm	0:9b334a45a8ff	2331	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2332	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
bogdanm	0:9b334a45a8ff	2333
bogdanm	0:9b334a45a8ff	2334	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	2335	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2336	{
bogdanm	0:9b334a45a8ff	2337	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2338	}
bogdanm	0:9b334a45a8ff	2339
bogdanm	0:9b334a45a8ff	2340	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2341	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2342	}
bogdanm	0:9b334a45a8ff	2343	}while(I2C_Trials < Trials);
mbed_official	83:a036322b8637	2344
bogdanm	0:9b334a45a8ff	2345	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	2346
bogdanm	0:9b334a45a8ff	2347	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2348	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2349
bogdanm	0:9b334a45a8ff	2350	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2351	}
bogdanm	0:9b334a45a8ff	2352	else
bogdanm	0:9b334a45a8ff	2353	{
bogdanm	0:9b334a45a8ff	2354	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2355	}
bogdanm	0:9b334a45a8ff	2356	}
bogdanm	0:9b334a45a8ff	2357	/**
bogdanm	0:9b334a45a8ff	2358	* @}
bogdanm	0:9b334a45a8ff	2359	*/
bogdanm	0:9b334a45a8ff	2360
bogdanm	0:9b334a45a8ff	2361	/** @defgroup IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
bogdanm	0:9b334a45a8ff	2362	* @{
bogdanm	0:9b334a45a8ff	2363	*/
bogdanm	0:9b334a45a8ff	2364
bogdanm	0:9b334a45a8ff	2365	/**
bogdanm	0:9b334a45a8ff	2366	* @brief This function handles I2C event interrupt request.
bogdanm	0:9b334a45a8ff	2367	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2368	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2369	* @retval None
bogdanm	0:9b334a45a8ff	2370	*/
bogdanm	0:9b334a45a8ff	2371	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2372	{
bogdanm	0:9b334a45a8ff	2373	/* I2C in mode Transmitter ---------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2374	if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_TXI \| I2C_IT_ADDRI)) == SET))
bogdanm	0:9b334a45a8ff	2375	{
bogdanm	0:9b334a45a8ff	2376	/* Slave mode selected */
bogdanm	0:9b334a45a8ff	2377	if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX)
bogdanm	0:9b334a45a8ff	2378	{
bogdanm	0:9b334a45a8ff	2379	I2C_SlaveTransmit_ISR(hi2c);
bogdanm	0:9b334a45a8ff	2380	}
bogdanm	0:9b334a45a8ff	2381	}
mbed_official	83:a036322b8637	2382
bogdanm	0:9b334a45a8ff	2383	if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_TXI)) == SET))
bogdanm	0:9b334a45a8ff	2384	{
bogdanm	0:9b334a45a8ff	2385	/* Master mode selected */
bogdanm	0:9b334a45a8ff	2386	if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) \|\| (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX))
bogdanm	0:9b334a45a8ff	2387	{
bogdanm	0:9b334a45a8ff	2388	I2C_MasterTransmit_ISR(hi2c);
bogdanm	0:9b334a45a8ff	2389	}
bogdanm	0:9b334a45a8ff	2390	}
mbed_official	83:a036322b8637	2391
bogdanm	0:9b334a45a8ff	2392	/* I2C in mode Receiver ----------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2393	if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_RXI \| I2C_IT_ADDRI)) == SET))
bogdanm	0:9b334a45a8ff	2394	{
bogdanm	0:9b334a45a8ff	2395	/* Slave mode selected */
bogdanm	0:9b334a45a8ff	2396	if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX)
bogdanm	0:9b334a45a8ff	2397	{
bogdanm	0:9b334a45a8ff	2398	I2C_SlaveReceive_ISR(hi2c);
bogdanm	0:9b334a45a8ff	2399	}
bogdanm	0:9b334a45a8ff	2400	}
bogdanm	0:9b334a45a8ff	2401	if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_RXI)) == SET))
bogdanm	0:9b334a45a8ff	2402	{
bogdanm	0:9b334a45a8ff	2403	/* Master mode selected */
bogdanm	0:9b334a45a8ff	2404	if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX) \|\| (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX))
bogdanm	0:9b334a45a8ff	2405	{
bogdanm	0:9b334a45a8ff	2406	I2C_MasterReceive_ISR(hi2c);
bogdanm	0:9b334a45a8ff	2407	}
bogdanm	0:9b334a45a8ff	2408	}
bogdanm	0:9b334a45a8ff	2409	}
bogdanm	0:9b334a45a8ff	2410
bogdanm	0:9b334a45a8ff	2411	/**
bogdanm	0:9b334a45a8ff	2412	* @brief This function handles I2C error interrupt request.
bogdanm	0:9b334a45a8ff	2413	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2414	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2415	* @retval None
bogdanm	0:9b334a45a8ff	2416	*/
bogdanm	0:9b334a45a8ff	2417	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2418	{
bogdanm	0:9b334a45a8ff	2419	/* I2C Bus error interrupt occurred ------------------------------------*/
bogdanm	0:9b334a45a8ff	2420	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm	0:9b334a45a8ff	2421	{
bogdanm	0:9b334a45a8ff	2422	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
mbed_official	83:a036322b8637	2423
bogdanm	0:9b334a45a8ff	2424	/* Clear BERR flag */
bogdanm	0:9b334a45a8ff	2425	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
bogdanm	0:9b334a45a8ff	2426	}
bogdanm	0:9b334a45a8ff	2427
bogdanm	0:9b334a45a8ff	2428	/* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
bogdanm	0:9b334a45a8ff	2429	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm	0:9b334a45a8ff	2430	{
bogdanm	0:9b334a45a8ff	2431	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
mbed_official	83:a036322b8637	2432
bogdanm	0:9b334a45a8ff	2433	/* Clear OVR flag */
bogdanm	0:9b334a45a8ff	2434	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
bogdanm	0:9b334a45a8ff	2435	}
mbed_official	83:a036322b8637	2436
bogdanm	0:9b334a45a8ff	2437	/* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
bogdanm	0:9b334a45a8ff	2438	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm	0:9b334a45a8ff	2439	{
bogdanm	0:9b334a45a8ff	2440	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
mbed_official	83:a036322b8637	2441
bogdanm	0:9b334a45a8ff	2442	/* Clear ARLO flag */
bogdanm	0:9b334a45a8ff	2443	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
bogdanm	0:9b334a45a8ff	2444	}
mbed_official	83:a036322b8637	2445
bogdanm	0:9b334a45a8ff	2446	/* Call the Error Callback in case of Error detected */
bogdanm	0:9b334a45a8ff	2447	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	2448	{
bogdanm	0:9b334a45a8ff	2449	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2450
bogdanm	0:9b334a45a8ff	2451	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2452	}
bogdanm	0:9b334a45a8ff	2453	}
bogdanm	0:9b334a45a8ff	2454
bogdanm	0:9b334a45a8ff	2455	/**
bogdanm	0:9b334a45a8ff	2456	* @brief Master Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2457	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2458	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2459	* @retval None
bogdanm	0:9b334a45a8ff	2460	*/
bogdanm	0:9b334a45a8ff	2461	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2462	{
mbed_official	83:a036322b8637	2463	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	2464	UNUSED(hi2c);
mbed_official	83:a036322b8637	2465
bogdanm	0:9b334a45a8ff	2466	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2467	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2468	*/
bogdanm	0:9b334a45a8ff	2469	}
bogdanm	0:9b334a45a8ff	2470
bogdanm	0:9b334a45a8ff	2471	/**
bogdanm	0:9b334a45a8ff	2472	* @brief Master Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2473	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2474	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2475	* @retval None
bogdanm	0:9b334a45a8ff	2476	*/
bogdanm	0:9b334a45a8ff	2477	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2478	{
mbed_official	83:a036322b8637	2479	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	2480	UNUSED(hi2c);
mbed_official	83:a036322b8637	2481
bogdanm	0:9b334a45a8ff	2482	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2483	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2484	*/
bogdanm	0:9b334a45a8ff	2485	}
bogdanm	0:9b334a45a8ff	2486
bogdanm	0:9b334a45a8ff	2487	/** @brief Slave Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2488	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2489	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2490	* @retval None
bogdanm	0:9b334a45a8ff	2491	*/
bogdanm	0:9b334a45a8ff	2492	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2493	{
mbed_official	83:a036322b8637	2494	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	2495	UNUSED(hi2c);
mbed_official	83:a036322b8637	2496
bogdanm	0:9b334a45a8ff	2497	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2498	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2499	*/
bogdanm	0:9b334a45a8ff	2500	}
bogdanm	0:9b334a45a8ff	2501
bogdanm	0:9b334a45a8ff	2502	/**
bogdanm	0:9b334a45a8ff	2503	* @brief Slave Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2504	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2505	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2506	* @retval None
bogdanm	0:9b334a45a8ff	2507	*/
bogdanm	0:9b334a45a8ff	2508	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2509	{
mbed_official	83:a036322b8637	2510	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	2511	UNUSED(hi2c);
mbed_official	83:a036322b8637	2512
bogdanm	0:9b334a45a8ff	2513	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2514	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2515	*/
bogdanm	0:9b334a45a8ff	2516	}
bogdanm	0:9b334a45a8ff	2517
bogdanm	0:9b334a45a8ff	2518	/**
bogdanm	0:9b334a45a8ff	2519	* @brief Memory Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2520	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2521	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2522	* @retval None
bogdanm	0:9b334a45a8ff	2523	*/
bogdanm	0:9b334a45a8ff	2524	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2525	{
mbed_official	83:a036322b8637	2526	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	2527	UNUSED(hi2c);
mbed_official	83:a036322b8637	2528
bogdanm	0:9b334a45a8ff	2529	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2530	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2531	*/
bogdanm	0:9b334a45a8ff	2532	}
bogdanm	0:9b334a45a8ff	2533
bogdanm	0:9b334a45a8ff	2534	/**
bogdanm	0:9b334a45a8ff	2535	* @brief Memory Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2536	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2537	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2538	* @retval None
bogdanm	0:9b334a45a8ff	2539	*/
bogdanm	0:9b334a45a8ff	2540	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2541	{
mbed_official	83:a036322b8637	2542	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	2543	UNUSED(hi2c);
mbed_official	83:a036322b8637	2544
bogdanm	0:9b334a45a8ff	2545	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2546	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2547	*/
bogdanm	0:9b334a45a8ff	2548	}
bogdanm	0:9b334a45a8ff	2549
bogdanm	0:9b334a45a8ff	2550	/**
bogdanm	0:9b334a45a8ff	2551	* @brief I2C error callbacks.
bogdanm	0:9b334a45a8ff	2552	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2553	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2554	* @retval None
bogdanm	0:9b334a45a8ff	2555	*/
bogdanm	0:9b334a45a8ff	2556	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2557	{
mbed_official	83:a036322b8637	2558	/* Prevent unused argument(s) compilation warning */
mbed_official	83:a036322b8637	2559	UNUSED(hi2c);
mbed_official	83:a036322b8637	2560
bogdanm	0:9b334a45a8ff	2561	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2562	the HAL_I2C_ErrorCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2563	*/
bogdanm	0:9b334a45a8ff	2564	}
bogdanm	0:9b334a45a8ff	2565
bogdanm	0:9b334a45a8ff	2566	/**
bogdanm	0:9b334a45a8ff	2567	* @}
bogdanm	0:9b334a45a8ff	2568	*/
bogdanm	0:9b334a45a8ff	2569
bogdanm	0:9b334a45a8ff	2570	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	2571	* @brief Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	2572	*
bogdanm	0:9b334a45a8ff	2573	@verbatim
bogdanm	0:9b334a45a8ff	2574	===============================================================================
bogdanm	0:9b334a45a8ff	2575	##### Peripheral State and Errors functions #####
bogdanm	0:9b334a45a8ff	2576	===============================================================================
bogdanm	0:9b334a45a8ff	2577	[..]
bogdanm	0:9b334a45a8ff	2578	This subsection permit to get in run-time the status of the peripheral
bogdanm	0:9b334a45a8ff	2579	and the data flow.
bogdanm	0:9b334a45a8ff	2580
bogdanm	0:9b334a45a8ff	2581	@endverbatim
bogdanm	0:9b334a45a8ff	2582	* @{
bogdanm	0:9b334a45a8ff	2583	*/
bogdanm	0:9b334a45a8ff	2584
bogdanm	0:9b334a45a8ff	2585	/**
bogdanm	0:9b334a45a8ff	2586	* @brief Returns the I2C state.
bogdanm	0:9b334a45a8ff	2587	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2588	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2589	* @retval HAL state
bogdanm	0:9b334a45a8ff	2590	*/
bogdanm	0:9b334a45a8ff	2591	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2592	{
bogdanm	0:9b334a45a8ff	2593	return hi2c->State;
bogdanm	0:9b334a45a8ff	2594	}
bogdanm	0:9b334a45a8ff	2595
bogdanm	0:9b334a45a8ff	2596	/**
bogdanm	0:9b334a45a8ff	2597	* @brief Return the I2C error code
bogdanm	0:9b334a45a8ff	2598	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2599	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2600	* @retval I2C Error Code
bogdanm	0:9b334a45a8ff	2601	*/
bogdanm	0:9b334a45a8ff	2602	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2603	{
bogdanm	0:9b334a45a8ff	2604	return hi2c->ErrorCode;
bogdanm	0:9b334a45a8ff	2605	}
bogdanm	0:9b334a45a8ff	2606
bogdanm	0:9b334a45a8ff	2607	/**
bogdanm	0:9b334a45a8ff	2608	* @}
bogdanm	0:9b334a45a8ff	2609	*/
bogdanm	0:9b334a45a8ff	2610
bogdanm	0:9b334a45a8ff	2611	/**
bogdanm	0:9b334a45a8ff	2612	* @}
bogdanm	0:9b334a45a8ff	2613	*/
bogdanm	0:9b334a45a8ff	2614
bogdanm	0:9b334a45a8ff	2615	/** @addtogroup I2C_Private_Functions
bogdanm	0:9b334a45a8ff	2616	* @{
bogdanm	0:9b334a45a8ff	2617	*/
bogdanm	0:9b334a45a8ff	2618
bogdanm	0:9b334a45a8ff	2619	/**
bogdanm	0:9b334a45a8ff	2620	* @brief Handle Interrupt Flags Master Transmit Mode
bogdanm	0:9b334a45a8ff	2621	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2622	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2623	* @retval HAL status
bogdanm	0:9b334a45a8ff	2624	*/
bogdanm	0:9b334a45a8ff	2625	static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2626	{
bogdanm	0:9b334a45a8ff	2627	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	2628
bogdanm	0:9b334a45a8ff	2629	/* Process Locked */
bogdanm	0:9b334a45a8ff	2630	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2631
bogdanm	0:9b334a45a8ff	2632	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET)
bogdanm	0:9b334a45a8ff	2633	{
bogdanm	0:9b334a45a8ff	2634	/* Write data to TXDR */
bogdanm	0:9b334a45a8ff	2635	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
bogdanm	0:9b334a45a8ff	2636	hi2c->XferSize--;
bogdanm	0:9b334a45a8ff	2637	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2638	}
bogdanm	0:9b334a45a8ff	2639	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET)
bogdanm	0:9b334a45a8ff	2640	{
bogdanm	0:9b334a45a8ff	2641	if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0))
bogdanm	0:9b334a45a8ff	2642	{
bogdanm	0:9b334a45a8ff	2643	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm	0:9b334a45a8ff	2644
bogdanm	0:9b334a45a8ff	2645	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	2646	{
bogdanm	0:9b334a45a8ff	2647	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2648	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	2649	}
bogdanm	0:9b334a45a8ff	2650	else
bogdanm	0:9b334a45a8ff	2651	{
bogdanm	0:9b334a45a8ff	2652	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2653	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	2654	}
bogdanm	0:9b334a45a8ff	2655	}
bogdanm	0:9b334a45a8ff	2656	else
bogdanm	0:9b334a45a8ff	2657	{
bogdanm	0:9b334a45a8ff	2658	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2659	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2660
bogdanm	0:9b334a45a8ff	2661	/* Wrong size Status regarding TCR flag event */
bogdanm	0:9b334a45a8ff	2662	hi2c->ErrorCode \|= HAL_I2C_ERROR_SIZE;
bogdanm	0:9b334a45a8ff	2663	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2664	}
bogdanm	0:9b334a45a8ff	2665	}
bogdanm	0:9b334a45a8ff	2666	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET)
bogdanm	0:9b334a45a8ff	2667	{
bogdanm	0:9b334a45a8ff	2668	if(hi2c->XferCount == 0)
bogdanm	0:9b334a45a8ff	2669	{
bogdanm	0:9b334a45a8ff	2670	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2671	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
bogdanm	0:9b334a45a8ff	2672	}
bogdanm	0:9b334a45a8ff	2673	else
bogdanm	0:9b334a45a8ff	2674	{
bogdanm	0:9b334a45a8ff	2675	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2676	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2677
bogdanm	0:9b334a45a8ff	2678	/* Wrong size Status regarding TCR flag event */
bogdanm	0:9b334a45a8ff	2679	hi2c->ErrorCode \|= HAL_I2C_ERROR_SIZE;
bogdanm	0:9b334a45a8ff	2680	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2681	}
bogdanm	0:9b334a45a8ff	2682	}
bogdanm	0:9b334a45a8ff	2683	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	2684	{
mbed_official	83:a036322b8637	2685	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
mbed_official	83:a036322b8637	2686	{
mbed_official	83:a036322b8637	2687	/* Clear NACK Flag */
mbed_official	83:a036322b8637	2688	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	2689
mbed_official	83:a036322b8637	2690	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
mbed_official	83:a036322b8637	2691	}
mbed_official	83:a036322b8637	2692
bogdanm	0:9b334a45a8ff	2693	/* Disable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	2694	__HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_TXI );
mbed_official	83:a036322b8637	2695
bogdanm	0:9b334a45a8ff	2696	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2697	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	2698
bogdanm	0:9b334a45a8ff	2699	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	2700	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	2701
mbed_official	83:a036322b8637	2702	/* Flush TX register if not empty */
mbed_official	83:a036322b8637	2703	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
bogdanm	0:9b334a45a8ff	2704	{
mbed_official	83:a036322b8637	2705	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
mbed_official	83:a036322b8637	2706	}
mbed_official	83:a036322b8637	2707
mbed_official	83:a036322b8637	2708	/* Call the correct callback to inform upper layer */
mbed_official	83:a036322b8637	2709	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official	83:a036322b8637	2710	{
mbed_official	83:a036322b8637	2711	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	2712
mbed_official	83:a036322b8637	2713	/* Process Unlocked */
mbed_official	83:a036322b8637	2714	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2715
mbed_official	83:a036322b8637	2716	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2717	}
bogdanm	0:9b334a45a8ff	2718	else
bogdanm	0:9b334a45a8ff	2719	{
mbed_official	83:a036322b8637	2720	if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
mbed_official	83:a036322b8637	2721	{
mbed_official	83:a036322b8637	2722	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	2723
mbed_official	83:a036322b8637	2724	/* Process Unlocked */
mbed_official	83:a036322b8637	2725	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2726
mbed_official	83:a036322b8637	2727	HAL_I2C_MemTxCpltCallback(hi2c);
mbed_official	83:a036322b8637	2728	}
mbed_official	83:a036322b8637	2729	else
mbed_official	83:a036322b8637	2730	{
mbed_official	83:a036322b8637	2731	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	2732
mbed_official	83:a036322b8637	2733	/* Process Unlocked */
mbed_official	83:a036322b8637	2734	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2735
mbed_official	83:a036322b8637	2736	HAL_I2C_MasterTxCpltCallback(hi2c);
mbed_official	83:a036322b8637	2737	}
bogdanm	0:9b334a45a8ff	2738	}
bogdanm	0:9b334a45a8ff	2739	}
bogdanm	0:9b334a45a8ff	2740	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm	0:9b334a45a8ff	2741	{
bogdanm	0:9b334a45a8ff	2742	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2743	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	2744
bogdanm	0:9b334a45a8ff	2745	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2746	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2747
bogdanm	0:9b334a45a8ff	2748	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	2749	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2750	}
bogdanm	0:9b334a45a8ff	2751
bogdanm	0:9b334a45a8ff	2752	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2753	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2754
bogdanm	0:9b334a45a8ff	2755	return HAL_OK;
bogdanm	0:9b334a45a8ff	2756	}
bogdanm	0:9b334a45a8ff	2757
bogdanm	0:9b334a45a8ff	2758	/**
bogdanm	0:9b334a45a8ff	2759	* @brief Handle Interrupt Flags Master Receive Mode
bogdanm	0:9b334a45a8ff	2760	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2761	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2762	* @retval HAL status
bogdanm	0:9b334a45a8ff	2763	*/
bogdanm	0:9b334a45a8ff	2764	static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2765	{
bogdanm	0:9b334a45a8ff	2766	uint16_t DevAddress;
mbed_official	83:a036322b8637	2767
bogdanm	0:9b334a45a8ff	2768	/* Process Locked */
bogdanm	0:9b334a45a8ff	2769	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2770
bogdanm	0:9b334a45a8ff	2771	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
bogdanm	0:9b334a45a8ff	2772	{
bogdanm	0:9b334a45a8ff	2773	/* Read data from RXDR */
bogdanm	0:9b334a45a8ff	2774	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	2775	hi2c->XferSize--;
bogdanm	0:9b334a45a8ff	2776	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2777	}
bogdanm	0:9b334a45a8ff	2778	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET)
bogdanm	0:9b334a45a8ff	2779	{
bogdanm	0:9b334a45a8ff	2780	if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0))
bogdanm	0:9b334a45a8ff	2781	{
bogdanm	0:9b334a45a8ff	2782	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm	0:9b334a45a8ff	2783
bogdanm	0:9b334a45a8ff	2784	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	2785	{
bogdanm	0:9b334a45a8ff	2786	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2787	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	2788	}
bogdanm	0:9b334a45a8ff	2789	else
bogdanm	0:9b334a45a8ff	2790	{
bogdanm	0:9b334a45a8ff	2791	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2792	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	2793	}
bogdanm	0:9b334a45a8ff	2794	}
bogdanm	0:9b334a45a8ff	2795	else
bogdanm	0:9b334a45a8ff	2796	{
bogdanm	0:9b334a45a8ff	2797	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2798	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2799
bogdanm	0:9b334a45a8ff	2800	/* Wrong size Status regarding TCR flag event */
bogdanm	0:9b334a45a8ff	2801	hi2c->ErrorCode \|= HAL_I2C_ERROR_SIZE;
bogdanm	0:9b334a45a8ff	2802	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2803	}
bogdanm	0:9b334a45a8ff	2804	}
bogdanm	0:9b334a45a8ff	2805	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET)
bogdanm	0:9b334a45a8ff	2806	{
bogdanm	0:9b334a45a8ff	2807	if(hi2c->XferCount == 0)
bogdanm	0:9b334a45a8ff	2808	{
bogdanm	0:9b334a45a8ff	2809	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2810	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
bogdanm	0:9b334a45a8ff	2811	}
bogdanm	0:9b334a45a8ff	2812	else
bogdanm	0:9b334a45a8ff	2813	{
bogdanm	0:9b334a45a8ff	2814	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2815	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2816
bogdanm	0:9b334a45a8ff	2817	/* Wrong size Status regarding TCR flag event */
bogdanm	0:9b334a45a8ff	2818	hi2c->ErrorCode \|= HAL_I2C_ERROR_SIZE;
bogdanm	0:9b334a45a8ff	2819	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2820	}
bogdanm	0:9b334a45a8ff	2821	}
bogdanm	0:9b334a45a8ff	2822	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	2823	{
mbed_official	83:a036322b8637	2824	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
mbed_official	83:a036322b8637	2825	{
mbed_official	83:a036322b8637	2826	/* Clear NACK Flag */
mbed_official	83:a036322b8637	2827	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	2828
mbed_official	83:a036322b8637	2829	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
mbed_official	83:a036322b8637	2830	}
mbed_official	83:a036322b8637	2831
bogdanm	0:9b334a45a8ff	2832	/* Disable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	2833	__HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_RXI );
mbed_official	83:a036322b8637	2834
bogdanm	0:9b334a45a8ff	2835	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2836	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	2837
bogdanm	0:9b334a45a8ff	2838	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	2839	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	2840
mbed_official	83:a036322b8637	2841	/* Call the correct callback to inform upper layer */
mbed_official	83:a036322b8637	2842	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	2843	{
mbed_official	83:a036322b8637	2844	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	2845
mbed_official	83:a036322b8637	2846	/* Process Unlocked */
mbed_official	83:a036322b8637	2847	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2848
mbed_official	83:a036322b8637	2849	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2850	}
bogdanm	0:9b334a45a8ff	2851	else
bogdanm	0:9b334a45a8ff	2852	{
mbed_official	83:a036322b8637	2853	if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
mbed_official	83:a036322b8637	2854	{
mbed_official	83:a036322b8637	2855	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	2856
mbed_official	83:a036322b8637	2857	/* Process Unlocked */
mbed_official	83:a036322b8637	2858	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2859
mbed_official	83:a036322b8637	2860	HAL_I2C_MemRxCpltCallback(hi2c);
mbed_official	83:a036322b8637	2861	}
mbed_official	83:a036322b8637	2862	else
mbed_official	83:a036322b8637	2863	{
mbed_official	83:a036322b8637	2864	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	2865
mbed_official	83:a036322b8637	2866	/* Process Unlocked */
mbed_official	83:a036322b8637	2867	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2868
mbed_official	83:a036322b8637	2869	HAL_I2C_MasterRxCpltCallback(hi2c);
mbed_official	83:a036322b8637	2870	}
bogdanm	0:9b334a45a8ff	2871	}
bogdanm	0:9b334a45a8ff	2872	}
bogdanm	0:9b334a45a8ff	2873	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm	0:9b334a45a8ff	2874	{
bogdanm	0:9b334a45a8ff	2875	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2876	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	2877
bogdanm	0:9b334a45a8ff	2878	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2879	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2880
bogdanm	0:9b334a45a8ff	2881	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	2882	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2883	}
mbed_official	83:a036322b8637	2884
bogdanm	0:9b334a45a8ff	2885	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2886	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2887
bogdanm	0:9b334a45a8ff	2888	return HAL_OK;
mbed_official	83:a036322b8637	2889
bogdanm	0:9b334a45a8ff	2890	}
bogdanm	0:9b334a45a8ff	2891
bogdanm	0:9b334a45a8ff	2892	/**
bogdanm	0:9b334a45a8ff	2893	* @brief Handle Interrupt Flags Slave Transmit Mode
bogdanm	0:9b334a45a8ff	2894	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2895	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2896	* @retval HAL status
bogdanm	0:9b334a45a8ff	2897	*/
bogdanm	0:9b334a45a8ff	2898	static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2899	{
bogdanm	0:9b334a45a8ff	2900	/* Process locked */
bogdanm	0:9b334a45a8ff	2901	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2902
bogdanm	0:9b334a45a8ff	2903	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET)
bogdanm	0:9b334a45a8ff	2904	{
bogdanm	0:9b334a45a8ff	2905	/* Check that I2C transfer finished */
bogdanm	0:9b334a45a8ff	2906	/* if yes, normal usecase, a NACK is sent by the MASTER when Transfer is finished */
bogdanm	0:9b334a45a8ff	2907	/* Mean XferCount == 0*/
bogdanm	0:9b334a45a8ff	2908	/* So clear Flag NACKF only */
bogdanm	0:9b334a45a8ff	2909	if(hi2c->XferCount == 0)
bogdanm	0:9b334a45a8ff	2910	{
bogdanm	0:9b334a45a8ff	2911	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2912	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	2913
bogdanm	0:9b334a45a8ff	2914	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2915	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2916	}
bogdanm	0:9b334a45a8ff	2917	else
bogdanm	0:9b334a45a8ff	2918	{
bogdanm	0:9b334a45a8ff	2919	/* if no, error usecase, a Non-Acknowledge of last Data is generated by the MASTER*/
bogdanm	0:9b334a45a8ff	2920	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2921	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	2922
bogdanm	0:9b334a45a8ff	2923	/* Set ErrorCode corresponding to a Non-Acknowledge */
bogdanm	0:9b334a45a8ff	2924	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
mbed_official	83:a036322b8637	2925
bogdanm	0:9b334a45a8ff	2926	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2927	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2928
bogdanm	0:9b334a45a8ff	2929	/* Call the Error callback to prevent upper layer */
bogdanm	0:9b334a45a8ff	2930	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2931	}
bogdanm	0:9b334a45a8ff	2932	}
bogdanm	0:9b334a45a8ff	2933	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
bogdanm	0:9b334a45a8ff	2934	{
bogdanm	0:9b334a45a8ff	2935	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	2936	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	2937	}
bogdanm	0:9b334a45a8ff	2938	/* Check first if STOPF is set */
bogdanm	0:9b334a45a8ff	2939	/* to prevent a Write Data in TX buffer */
bogdanm	0:9b334a45a8ff	2940	/* which is stuck in TXDR until next */
bogdanm	0:9b334a45a8ff	2941	/* communication with Master */
bogdanm	0:9b334a45a8ff	2942	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	2943	{
bogdanm	0:9b334a45a8ff	2944	/* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */
bogdanm	0:9b334a45a8ff	2945	__HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI );
bogdanm	0:9b334a45a8ff	2946
bogdanm	0:9b334a45a8ff	2947	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	2948	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	2949
bogdanm	0:9b334a45a8ff	2950	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2951	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	2952
bogdanm	0:9b334a45a8ff	2953	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2954
bogdanm	0:9b334a45a8ff	2955	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2956	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	2957
bogdanm	0:9b334a45a8ff	2958	HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2959	}
bogdanm	0:9b334a45a8ff	2960	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET)
bogdanm	0:9b334a45a8ff	2961	{
bogdanm	0:9b334a45a8ff	2962	/* Write data to TXDR only if XferCount not reach "0" */
bogdanm	0:9b334a45a8ff	2963	/* A TXIS flag can be set, during STOP treatment */
bogdanm	0:9b334a45a8ff	2964	if(hi2c->XferCount > 0)
bogdanm	0:9b334a45a8ff	2965	{
bogdanm	0:9b334a45a8ff	2966	/* Write data to TXDR */
bogdanm	0:9b334a45a8ff	2967	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
bogdanm	0:9b334a45a8ff	2968	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2969	}
bogdanm	0:9b334a45a8ff	2970	}
mbed_official	83:a036322b8637	2971
bogdanm	0:9b334a45a8ff	2972	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2973	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2974
bogdanm	0:9b334a45a8ff	2975	return HAL_OK;
bogdanm	0:9b334a45a8ff	2976	}
bogdanm	0:9b334a45a8ff	2977
bogdanm	0:9b334a45a8ff	2978	/**
bogdanm	0:9b334a45a8ff	2979	* @brief Handle Interrupt Flags Slave Receive Mode
bogdanm	0:9b334a45a8ff	2980	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2981	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2982	* @retval HAL status
bogdanm	0:9b334a45a8ff	2983	*/
bogdanm	0:9b334a45a8ff	2984	static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2985	{
bogdanm	0:9b334a45a8ff	2986	/* Process Locked */
bogdanm	0:9b334a45a8ff	2987	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2988
bogdanm	0:9b334a45a8ff	2989	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET)
bogdanm	0:9b334a45a8ff	2990	{
bogdanm	0:9b334a45a8ff	2991	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2992	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	2993
bogdanm	0:9b334a45a8ff	2994	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2995	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2996
bogdanm	0:9b334a45a8ff	2997	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	2998	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2999	}
bogdanm	0:9b334a45a8ff	3000	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
bogdanm	0:9b334a45a8ff	3001	{
bogdanm	0:9b334a45a8ff	3002	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	3003	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	3004	}
bogdanm	0:9b334a45a8ff	3005	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
bogdanm	0:9b334a45a8ff	3006	{
bogdanm	0:9b334a45a8ff	3007	/* Read data from RXDR */
bogdanm	0:9b334a45a8ff	3008	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	3009	hi2c->XferSize--;
bogdanm	0:9b334a45a8ff	3010	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	3011	}
bogdanm	0:9b334a45a8ff	3012	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	3013	{
bogdanm	0:9b334a45a8ff	3014	/* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */
bogdanm	0:9b334a45a8ff	3015	__HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_RXI );
bogdanm	0:9b334a45a8ff	3016
bogdanm	0:9b334a45a8ff	3017	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	3018	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	3019
bogdanm	0:9b334a45a8ff	3020	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3021	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3022
bogdanm	0:9b334a45a8ff	3023	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3024
bogdanm	0:9b334a45a8ff	3025	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3026	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	3027
bogdanm	0:9b334a45a8ff	3028	HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3029	}
mbed_official	83:a036322b8637	3030
bogdanm	0:9b334a45a8ff	3031	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3032	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3033
bogdanm	0:9b334a45a8ff	3034	return HAL_OK;
bogdanm	0:9b334a45a8ff	3035	}
bogdanm	0:9b334a45a8ff	3036
bogdanm	0:9b334a45a8ff	3037	/**
bogdanm	0:9b334a45a8ff	3038	* @brief Master sends target device address followed by internal memory address for write request.
bogdanm	0:9b334a45a8ff	3039	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3040	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3041	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	3042	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	3043	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	3044	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3045	* @retval HAL status
bogdanm	0:9b334a45a8ff	3046	*/
bogdanm	0:9b334a45a8ff	3047	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3048	{
bogdanm	0:9b334a45a8ff	3049	I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
mbed_official	83:a036322b8637	3050
bogdanm	0:9b334a45a8ff	3051	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3052	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3053	{
bogdanm	0:9b334a45a8ff	3054	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3055	{
bogdanm	0:9b334a45a8ff	3056	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3057	}
bogdanm	0:9b334a45a8ff	3058	else
bogdanm	0:9b334a45a8ff	3059	{
bogdanm	0:9b334a45a8ff	3060	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3061	}
bogdanm	0:9b334a45a8ff	3062	}
mbed_official	83:a036322b8637	3063
bogdanm	0:9b334a45a8ff	3064	/* If Memory address size is 8Bit */
bogdanm	0:9b334a45a8ff	3065	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm	0:9b334a45a8ff	3066	{
bogdanm	0:9b334a45a8ff	3067	/* Send Memory Address */
bogdanm	0:9b334a45a8ff	3068	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3069	}
bogdanm	0:9b334a45a8ff	3070	/* If Memory address size is 16Bit */
bogdanm	0:9b334a45a8ff	3071	else
bogdanm	0:9b334a45a8ff	3072	{
bogdanm	0:9b334a45a8ff	3073	/* Send MSB of Memory Address */
bogdanm	0:9b334a45a8ff	3074	hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm	0:9b334a45a8ff	3075
bogdanm	0:9b334a45a8ff	3076	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3077	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3078	{
bogdanm	0:9b334a45a8ff	3079	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3080	{
bogdanm	0:9b334a45a8ff	3081	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3082	}
bogdanm	0:9b334a45a8ff	3083	else
bogdanm	0:9b334a45a8ff	3084	{
bogdanm	0:9b334a45a8ff	3085	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3086	}
bogdanm	0:9b334a45a8ff	3087	}
bogdanm	0:9b334a45a8ff	3088
bogdanm	0:9b334a45a8ff	3089	/* Send LSB of Memory Address */
bogdanm	0:9b334a45a8ff	3090	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3091	}
bogdanm	0:9b334a45a8ff	3092
bogdanm	0:9b334a45a8ff	3093	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3094	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3095	{
bogdanm	0:9b334a45a8ff	3096	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3097	}
mbed_official	83:a036322b8637	3098
mbed_official	83:a036322b8637	3099	return HAL_OK;
bogdanm	0:9b334a45a8ff	3100	}
bogdanm	0:9b334a45a8ff	3101
bogdanm	0:9b334a45a8ff	3102	/**
bogdanm	0:9b334a45a8ff	3103	* @brief Master sends target device address followed by internal memory address for read request.
bogdanm	0:9b334a45a8ff	3104	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3105	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3106	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	3107	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	3108	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	3109	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3110	* @retval HAL status
bogdanm	0:9b334a45a8ff	3111	*/
bogdanm	0:9b334a45a8ff	3112	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3113	{
bogdanm	0:9b334a45a8ff	3114	I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	3115
bogdanm	0:9b334a45a8ff	3116	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3117	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3118	{
bogdanm	0:9b334a45a8ff	3119	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3120	{
bogdanm	0:9b334a45a8ff	3121	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3122	}
bogdanm	0:9b334a45a8ff	3123	else
bogdanm	0:9b334a45a8ff	3124	{
bogdanm	0:9b334a45a8ff	3125	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3126	}
bogdanm	0:9b334a45a8ff	3127	}
bogdanm	0:9b334a45a8ff	3128
bogdanm	0:9b334a45a8ff	3129	/* If Memory address size is 8Bit */
bogdanm	0:9b334a45a8ff	3130	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm	0:9b334a45a8ff	3131	{
bogdanm	0:9b334a45a8ff	3132	/* Send Memory Address */
bogdanm	0:9b334a45a8ff	3133	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3134	}
bogdanm	0:9b334a45a8ff	3135	/* If Memory address size is 16Bit */
bogdanm	0:9b334a45a8ff	3136	else
bogdanm	0:9b334a45a8ff	3137	{
bogdanm	0:9b334a45a8ff	3138	/* Send MSB of Memory Address */
bogdanm	0:9b334a45a8ff	3139	hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm	0:9b334a45a8ff	3140
bogdanm	0:9b334a45a8ff	3141	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3142	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3143	{
bogdanm	0:9b334a45a8ff	3144	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3145	{
bogdanm	0:9b334a45a8ff	3146	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3147	}
bogdanm	0:9b334a45a8ff	3148	else
bogdanm	0:9b334a45a8ff	3149	{
bogdanm	0:9b334a45a8ff	3150	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3151	}
bogdanm	0:9b334a45a8ff	3152	}
bogdanm	0:9b334a45a8ff	3153
bogdanm	0:9b334a45a8ff	3154	/* Send LSB of Memory Address */
bogdanm	0:9b334a45a8ff	3155	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3156	}
bogdanm	0:9b334a45a8ff	3157
bogdanm	0:9b334a45a8ff	3158	/* Wait until TC flag is set */
bogdanm	0:9b334a45a8ff	3159	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3160	{
bogdanm	0:9b334a45a8ff	3161	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3162	}
bogdanm	0:9b334a45a8ff	3163
bogdanm	0:9b334a45a8ff	3164	return HAL_OK;
bogdanm	0:9b334a45a8ff	3165	}
bogdanm	0:9b334a45a8ff	3166
bogdanm	0:9b334a45a8ff	3167	/**
bogdanm	0:9b334a45a8ff	3168	* @brief DMA I2C master transmit process complete callback.
bogdanm	0:9b334a45a8ff	3169	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3170	* @retval None
bogdanm	0:9b334a45a8ff	3171	*/
bogdanm	0:9b334a45a8ff	3172	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3173	{
bogdanm	0:9b334a45a8ff	3174	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	3175	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3176
bogdanm	0:9b334a45a8ff	3177	/* Check if last DMA request was done with RELOAD */
bogdanm	0:9b334a45a8ff	3178	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3179	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3180	{
bogdanm	0:9b334a45a8ff	3181	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3182	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm	0:9b334a45a8ff	3183	{
bogdanm	0:9b334a45a8ff	3184	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3185	}
mbed_official	83:a036322b8637	3186
bogdanm	0:9b334a45a8ff	3187	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3188	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3189
bogdanm	0:9b334a45a8ff	3190	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3191	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3192	{
bogdanm	0:9b334a45a8ff	3193	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3194	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3195	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3196	{
bogdanm	0:9b334a45a8ff	3197	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3198	{
bogdanm	0:9b334a45a8ff	3199	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3200	}
bogdanm	0:9b334a45a8ff	3201	else
bogdanm	0:9b334a45a8ff	3202	{
bogdanm	0:9b334a45a8ff	3203	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3204	}
bogdanm	0:9b334a45a8ff	3205	}
mbed_official	83:a036322b8637	3206
bogdanm	0:9b334a45a8ff	3207	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3208	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3209
bogdanm	0:9b334a45a8ff	3210	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3211	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3212
bogdanm	0:9b334a45a8ff	3213	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3214
bogdanm	0:9b334a45a8ff	3215	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3216	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3217	}
bogdanm	0:9b334a45a8ff	3218	else
bogdanm	0:9b334a45a8ff	3219	{
bogdanm	0:9b334a45a8ff	3220	hi2c->pBuffPtr += hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3221	hi2c->XferCount -= hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3222	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	3223	{
bogdanm	0:9b334a45a8ff	3224	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	3225	}
bogdanm	0:9b334a45a8ff	3226	else
bogdanm	0:9b334a45a8ff	3227	{
bogdanm	0:9b334a45a8ff	3228	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	3229	}
mbed_official	83:a036322b8637	3230
bogdanm	0:9b334a45a8ff	3231	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official	83:a036322b8637	3232
bogdanm	0:9b334a45a8ff	3233	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	3234	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	3235
bogdanm	0:9b334a45a8ff	3236	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	3237	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3238	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3239	{
bogdanm	0:9b334a45a8ff	3240	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3241	}
bogdanm	0:9b334a45a8ff	3242	else
bogdanm	0:9b334a45a8ff	3243	{
bogdanm	0:9b334a45a8ff	3244	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3245	}
mbed_official	83:a036322b8637	3246
bogdanm	0:9b334a45a8ff	3247	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3248	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm	0:9b334a45a8ff	3249	{
bogdanm	0:9b334a45a8ff	3250	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3251	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3252	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3253	{
bogdanm	0:9b334a45a8ff	3254	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3255	{
bogdanm	0:9b334a45a8ff	3256	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3257	}
bogdanm	0:9b334a45a8ff	3258	else
bogdanm	0:9b334a45a8ff	3259	{
bogdanm	0:9b334a45a8ff	3260	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3261	}
bogdanm	0:9b334a45a8ff	3262	}
mbed_official	83:a036322b8637	3263
bogdanm	0:9b334a45a8ff	3264	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3265	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3266
bogdanm	0:9b334a45a8ff	3267	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3268	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3269
bogdanm	0:9b334a45a8ff	3270	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3271
bogdanm	0:9b334a45a8ff	3272	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3273	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3274	}
bogdanm	0:9b334a45a8ff	3275	else
bogdanm	0:9b334a45a8ff	3276	{
bogdanm	0:9b334a45a8ff	3277	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	3278	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3279	}
bogdanm	0:9b334a45a8ff	3280	}
bogdanm	0:9b334a45a8ff	3281	}
bogdanm	0:9b334a45a8ff	3282	else
bogdanm	0:9b334a45a8ff	3283	{
bogdanm	0:9b334a45a8ff	3284	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3285	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3286	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3287	{
bogdanm	0:9b334a45a8ff	3288	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3289	{
bogdanm	0:9b334a45a8ff	3290	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3291	}
bogdanm	0:9b334a45a8ff	3292	else
bogdanm	0:9b334a45a8ff	3293	{
bogdanm	0:9b334a45a8ff	3294	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3295	}
bogdanm	0:9b334a45a8ff	3296	}
mbed_official	83:a036322b8637	3297
bogdanm	0:9b334a45a8ff	3298	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3299	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3300
bogdanm	0:9b334a45a8ff	3301	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3302	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3303
bogdanm	0:9b334a45a8ff	3304	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3305	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
mbed_official	83:a036322b8637	3306
bogdanm	0:9b334a45a8ff	3307	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3308
bogdanm	0:9b334a45a8ff	3309	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	3310
mbed_official	83:a036322b8637	3311	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3312	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3313	{
bogdanm	0:9b334a45a8ff	3314	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3315	}
bogdanm	0:9b334a45a8ff	3316	else
bogdanm	0:9b334a45a8ff	3317	{
bogdanm	0:9b334a45a8ff	3318	HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3319	}
bogdanm	0:9b334a45a8ff	3320	}
bogdanm	0:9b334a45a8ff	3321	}
bogdanm	0:9b334a45a8ff	3322
bogdanm	0:9b334a45a8ff	3323	/**
bogdanm	0:9b334a45a8ff	3324	* @brief DMA I2C slave transmit process complete callback.
bogdanm	0:9b334a45a8ff	3325	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3326	* @retval None
bogdanm	0:9b334a45a8ff	3327	*/
bogdanm	0:9b334a45a8ff	3328	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3329	{
bogdanm	0:9b334a45a8ff	3330	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3331
bogdanm	0:9b334a45a8ff	3332	/* Wait until STOP flag is set */
bogdanm	0:9b334a45a8ff	3333	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3334	{
bogdanm	0:9b334a45a8ff	3335	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3336	{
bogdanm	0:9b334a45a8ff	3337	/* Normal Use case, a AF is generated by master */
bogdanm	0:9b334a45a8ff	3338	/* to inform slave the end of transfer */
bogdanm	0:9b334a45a8ff	3339	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	3340	}
bogdanm	0:9b334a45a8ff	3341	else
bogdanm	0:9b334a45a8ff	3342	{
bogdanm	0:9b334a45a8ff	3343	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3344	}
bogdanm	0:9b334a45a8ff	3345	}
bogdanm	0:9b334a45a8ff	3346
bogdanm	0:9b334a45a8ff	3347	/* Clear STOP flag */
bogdanm	0:9b334a45a8ff	3348	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3349
bogdanm	0:9b334a45a8ff	3350	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3351	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm	0:9b334a45a8ff	3352	{
bogdanm	0:9b334a45a8ff	3353	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3354	}
bogdanm	0:9b334a45a8ff	3355
bogdanm	0:9b334a45a8ff	3356	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3357	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3358
bogdanm	0:9b334a45a8ff	3359	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3360
bogdanm	0:9b334a45a8ff	3361	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	3362
bogdanm	0:9b334a45a8ff	3363	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3364	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3365	{
bogdanm	0:9b334a45a8ff	3366	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3367	}
bogdanm	0:9b334a45a8ff	3368	else
bogdanm	0:9b334a45a8ff	3369	{
bogdanm	0:9b334a45a8ff	3370	HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3371	}
bogdanm	0:9b334a45a8ff	3372	}
bogdanm	0:9b334a45a8ff	3373
bogdanm	0:9b334a45a8ff	3374	/**
bogdanm	0:9b334a45a8ff	3375	* @brief DMA I2C master receive process complete callback
bogdanm	0:9b334a45a8ff	3376	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3377	* @retval None
bogdanm	0:9b334a45a8ff	3378	*/
bogdanm	0:9b334a45a8ff	3379	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3380	{
bogdanm	0:9b334a45a8ff	3381	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3382	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	3383
bogdanm	0:9b334a45a8ff	3384	/* Check if last DMA request was done with RELOAD */
bogdanm	0:9b334a45a8ff	3385	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3386	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3387	{
bogdanm	0:9b334a45a8ff	3388	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3389	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm	0:9b334a45a8ff	3390	{
bogdanm	0:9b334a45a8ff	3391	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3392	}
mbed_official	83:a036322b8637	3393
bogdanm	0:9b334a45a8ff	3394	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3395	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official	83:a036322b8637	3396
bogdanm	0:9b334a45a8ff	3397	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3398	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3399	{
bogdanm	0:9b334a45a8ff	3400	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3401	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3402	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3403	{
bogdanm	0:9b334a45a8ff	3404	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3405	{
bogdanm	0:9b334a45a8ff	3406	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3407	}
bogdanm	0:9b334a45a8ff	3408	else
bogdanm	0:9b334a45a8ff	3409	{
bogdanm	0:9b334a45a8ff	3410	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3411	}
bogdanm	0:9b334a45a8ff	3412	}
mbed_official	83:a036322b8637	3413
bogdanm	0:9b334a45a8ff	3414	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3415	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3416
bogdanm	0:9b334a45a8ff	3417	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3418	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3419
bogdanm	0:9b334a45a8ff	3420	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3421
bogdanm	0:9b334a45a8ff	3422	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3423	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3424	}
bogdanm	0:9b334a45a8ff	3425	else
bogdanm	0:9b334a45a8ff	3426	{
bogdanm	0:9b334a45a8ff	3427	hi2c->pBuffPtr += hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3428	hi2c->XferCount -= hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3429	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	3430	{
bogdanm	0:9b334a45a8ff	3431	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	3432	}
bogdanm	0:9b334a45a8ff	3433	else
bogdanm	0:9b334a45a8ff	3434	{
bogdanm	0:9b334a45a8ff	3435	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	3436	}
mbed_official	83:a036322b8637	3437
bogdanm	0:9b334a45a8ff	3438	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official	83:a036322b8637	3439
bogdanm	0:9b334a45a8ff	3440	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	3441	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	3442
bogdanm	0:9b334a45a8ff	3443	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	3444	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3445	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3446	{
bogdanm	0:9b334a45a8ff	3447	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3448	}
bogdanm	0:9b334a45a8ff	3449	else
bogdanm	0:9b334a45a8ff	3450	{
bogdanm	0:9b334a45a8ff	3451	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3452	}
mbed_official	83:a036322b8637	3453
bogdanm	0:9b334a45a8ff	3454	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	3455	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	3456	{
bogdanm	0:9b334a45a8ff	3457	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3458	}
bogdanm	0:9b334a45a8ff	3459
bogdanm	0:9b334a45a8ff	3460	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3461	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3462	{
bogdanm	0:9b334a45a8ff	3463	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3464	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3465	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3466	{
bogdanm	0:9b334a45a8ff	3467	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3468	{
bogdanm	0:9b334a45a8ff	3469	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3470	}
bogdanm	0:9b334a45a8ff	3471	else
bogdanm	0:9b334a45a8ff	3472	{
bogdanm	0:9b334a45a8ff	3473	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3474	}
bogdanm	0:9b334a45a8ff	3475	}
mbed_official	83:a036322b8637	3476
bogdanm	0:9b334a45a8ff	3477	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3478	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3479
bogdanm	0:9b334a45a8ff	3480	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3481	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3482
bogdanm	0:9b334a45a8ff	3483	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3484
bogdanm	0:9b334a45a8ff	3485	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	3486
bogdanm	0:9b334a45a8ff	3487	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3488	}
bogdanm	0:9b334a45a8ff	3489	else
bogdanm	0:9b334a45a8ff	3490	{
bogdanm	0:9b334a45a8ff	3491	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	3492	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3493	}
bogdanm	0:9b334a45a8ff	3494	}
bogdanm	0:9b334a45a8ff	3495	}
bogdanm	0:9b334a45a8ff	3496	else
bogdanm	0:9b334a45a8ff	3497	{
bogdanm	0:9b334a45a8ff	3498	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3499	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3500	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3501	{
bogdanm	0:9b334a45a8ff	3502	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3503	{
bogdanm	0:9b334a45a8ff	3504	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3505	}
bogdanm	0:9b334a45a8ff	3506	else
bogdanm	0:9b334a45a8ff	3507	{
bogdanm	0:9b334a45a8ff	3508	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3509	}
bogdanm	0:9b334a45a8ff	3510	}
mbed_official	83:a036322b8637	3511
bogdanm	0:9b334a45a8ff	3512	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3513	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3514
bogdanm	0:9b334a45a8ff	3515	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3516	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3517
bogdanm	0:9b334a45a8ff	3518	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3519	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official	83:a036322b8637	3520
bogdanm	0:9b334a45a8ff	3521	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3522
bogdanm	0:9b334a45a8ff	3523	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	3524
bogdanm	0:9b334a45a8ff	3525	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3526	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3527	{
bogdanm	0:9b334a45a8ff	3528	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3529	}
bogdanm	0:9b334a45a8ff	3530	else
bogdanm	0:9b334a45a8ff	3531	{
bogdanm	0:9b334a45a8ff	3532	HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3533	}
bogdanm	0:9b334a45a8ff	3534	}
bogdanm	0:9b334a45a8ff	3535	}
bogdanm	0:9b334a45a8ff	3536
bogdanm	0:9b334a45a8ff	3537	/**
bogdanm	0:9b334a45a8ff	3538	* @brief DMA I2C slave receive process complete callback.
bogdanm	0:9b334a45a8ff	3539	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3540	* @retval None
bogdanm	0:9b334a45a8ff	3541	*/
bogdanm	0:9b334a45a8ff	3542	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3543	{
bogdanm	0:9b334a45a8ff	3544	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3545
bogdanm	0:9b334a45a8ff	3546	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3547	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3548	{
bogdanm	0:9b334a45a8ff	3549	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3550	{
bogdanm	0:9b334a45a8ff	3551	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3552	}
bogdanm	0:9b334a45a8ff	3553	else
bogdanm	0:9b334a45a8ff	3554	{
bogdanm	0:9b334a45a8ff	3555	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3556	}
bogdanm	0:9b334a45a8ff	3557	}
bogdanm	0:9b334a45a8ff	3558
bogdanm	0:9b334a45a8ff	3559	/* Clear STOPF flag */
bogdanm	0:9b334a45a8ff	3560	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3561
bogdanm	0:9b334a45a8ff	3562	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3563	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm	0:9b334a45a8ff	3564	{
bogdanm	0:9b334a45a8ff	3565	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3566	}
bogdanm	0:9b334a45a8ff	3567
bogdanm	0:9b334a45a8ff	3568	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3569	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3570
bogdanm	0:9b334a45a8ff	3571	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	3572	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
mbed_official	83:a036322b8637	3573
bogdanm	0:9b334a45a8ff	3574	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3575
bogdanm	0:9b334a45a8ff	3576	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	3577
bogdanm	0:9b334a45a8ff	3578	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3579	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3580	{
bogdanm	0:9b334a45a8ff	3581	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3582	}
bogdanm	0:9b334a45a8ff	3583	else
bogdanm	0:9b334a45a8ff	3584	{
bogdanm	0:9b334a45a8ff	3585	HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3586	}
bogdanm	0:9b334a45a8ff	3587	}
bogdanm	0:9b334a45a8ff	3588
bogdanm	0:9b334a45a8ff	3589	/**
bogdanm	0:9b334a45a8ff	3590	* @brief DMA I2C Memory Write process complete callback
bogdanm	0:9b334a45a8ff	3591	* @param hdma : DMA handle
bogdanm	0:9b334a45a8ff	3592	* @retval None
bogdanm	0:9b334a45a8ff	3593	*/
bogdanm	0:9b334a45a8ff	3594	static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3595	{
bogdanm	0:9b334a45a8ff	3596	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	3597	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	3598
bogdanm	0:9b334a45a8ff	3599	/* Check if last DMA request was done with RELOAD */
bogdanm	0:9b334a45a8ff	3600	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3601	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3602	{
bogdanm	0:9b334a45a8ff	3603	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3604	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm	0:9b334a45a8ff	3605	{
bogdanm	0:9b334a45a8ff	3606	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3607	}
mbed_official	83:a036322b8637	3608
bogdanm	0:9b334a45a8ff	3609	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3610	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3611
bogdanm	0:9b334a45a8ff	3612	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3613	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3614	{
bogdanm	0:9b334a45a8ff	3615	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3616	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3617	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3618	{
bogdanm	0:9b334a45a8ff	3619	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3620	{
bogdanm	0:9b334a45a8ff	3621	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3622	}
bogdanm	0:9b334a45a8ff	3623	else
bogdanm	0:9b334a45a8ff	3624	{
bogdanm	0:9b334a45a8ff	3625	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3626	}
bogdanm	0:9b334a45a8ff	3627	}
mbed_official	83:a036322b8637	3628
bogdanm	0:9b334a45a8ff	3629	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3630	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3631
bogdanm	0:9b334a45a8ff	3632	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3633	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3634
bogdanm	0:9b334a45a8ff	3635	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3636
bogdanm	0:9b334a45a8ff	3637	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3638	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3639	}
bogdanm	0:9b334a45a8ff	3640	else
bogdanm	0:9b334a45a8ff	3641	{
bogdanm	0:9b334a45a8ff	3642	hi2c->pBuffPtr += hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3643	hi2c->XferCount -= hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3644	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	3645	{
bogdanm	0:9b334a45a8ff	3646	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	3647	}
bogdanm	0:9b334a45a8ff	3648	else
bogdanm	0:9b334a45a8ff	3649	{
bogdanm	0:9b334a45a8ff	3650	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	3651	}
mbed_official	83:a036322b8637	3652
bogdanm	0:9b334a45a8ff	3653	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official	83:a036322b8637	3654
bogdanm	0:9b334a45a8ff	3655	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	3656	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	3657
bogdanm	0:9b334a45a8ff	3658	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	3659	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3660	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3661	{
bogdanm	0:9b334a45a8ff	3662	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3663	}
bogdanm	0:9b334a45a8ff	3664	else
bogdanm	0:9b334a45a8ff	3665	{
bogdanm	0:9b334a45a8ff	3666	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3667	}
mbed_official	83:a036322b8637	3668
bogdanm	0:9b334a45a8ff	3669	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3670	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm	0:9b334a45a8ff	3671	{
bogdanm	0:9b334a45a8ff	3672	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3673	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3674	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3675	{
bogdanm	0:9b334a45a8ff	3676	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3677	{
bogdanm	0:9b334a45a8ff	3678	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3679	}
bogdanm	0:9b334a45a8ff	3680	else
bogdanm	0:9b334a45a8ff	3681	{
bogdanm	0:9b334a45a8ff	3682	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3683	}
bogdanm	0:9b334a45a8ff	3684	}
mbed_official	83:a036322b8637	3685
bogdanm	0:9b334a45a8ff	3686	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3687	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3688
bogdanm	0:9b334a45a8ff	3689	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3690	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3691
bogdanm	0:9b334a45a8ff	3692	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3693
bogdanm	0:9b334a45a8ff	3694	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3695	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3696	}
bogdanm	0:9b334a45a8ff	3697	else
bogdanm	0:9b334a45a8ff	3698	{
bogdanm	0:9b334a45a8ff	3699	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	3700	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3701	}
bogdanm	0:9b334a45a8ff	3702	}
bogdanm	0:9b334a45a8ff	3703	}
bogdanm	0:9b334a45a8ff	3704	else
bogdanm	0:9b334a45a8ff	3705	{
bogdanm	0:9b334a45a8ff	3706	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3707	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3708	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3709	{
bogdanm	0:9b334a45a8ff	3710	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3711	{
bogdanm	0:9b334a45a8ff	3712	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3713	}
bogdanm	0:9b334a45a8ff	3714	else
bogdanm	0:9b334a45a8ff	3715	{
bogdanm	0:9b334a45a8ff	3716	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3717	}
bogdanm	0:9b334a45a8ff	3718	}
mbed_official	83:a036322b8637	3719
bogdanm	0:9b334a45a8ff	3720	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3721	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3722
bogdanm	0:9b334a45a8ff	3723	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3724	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3725
bogdanm	0:9b334a45a8ff	3726	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3727	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
mbed_official	83:a036322b8637	3728
bogdanm	0:9b334a45a8ff	3729	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3730
bogdanm	0:9b334a45a8ff	3731	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	3732
bogdanm	0:9b334a45a8ff	3733	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3734	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3735	{
bogdanm	0:9b334a45a8ff	3736	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3737	}
bogdanm	0:9b334a45a8ff	3738	else
bogdanm	0:9b334a45a8ff	3739	{
bogdanm	0:9b334a45a8ff	3740	HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3741	}
bogdanm	0:9b334a45a8ff	3742	}
bogdanm	0:9b334a45a8ff	3743	}
bogdanm	0:9b334a45a8ff	3744
bogdanm	0:9b334a45a8ff	3745	/**
bogdanm	0:9b334a45a8ff	3746	* @brief DMA I2C Memory Read process complete callback
bogdanm	0:9b334a45a8ff	3747	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3748	* @retval None
bogdanm	0:9b334a45a8ff	3749	*/
bogdanm	0:9b334a45a8ff	3750	static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3751	{
bogdanm	0:9b334a45a8ff	3752	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	3753	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	3754
bogdanm	0:9b334a45a8ff	3755	/* Check if last DMA request was done with RELOAD */
bogdanm	0:9b334a45a8ff	3756	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3757	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3758	{
bogdanm	0:9b334a45a8ff	3759	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3760	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm	0:9b334a45a8ff	3761	{
bogdanm	0:9b334a45a8ff	3762	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3763	}
mbed_official	83:a036322b8637	3764
bogdanm	0:9b334a45a8ff	3765	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3766	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official	83:a036322b8637	3767
bogdanm	0:9b334a45a8ff	3768	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3769	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3770	{
bogdanm	0:9b334a45a8ff	3771	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3772	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3773	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3774	{
bogdanm	0:9b334a45a8ff	3775	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3776	{
bogdanm	0:9b334a45a8ff	3777	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3778	}
bogdanm	0:9b334a45a8ff	3779	else
bogdanm	0:9b334a45a8ff	3780	{
bogdanm	0:9b334a45a8ff	3781	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3782	}
bogdanm	0:9b334a45a8ff	3783	}
mbed_official	83:a036322b8637	3784
bogdanm	0:9b334a45a8ff	3785	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3786	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3787
bogdanm	0:9b334a45a8ff	3788	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3789	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3790
bogdanm	0:9b334a45a8ff	3791	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3792
bogdanm	0:9b334a45a8ff	3793	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3794	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3795	}
bogdanm	0:9b334a45a8ff	3796	else
bogdanm	0:9b334a45a8ff	3797	{
bogdanm	0:9b334a45a8ff	3798	hi2c->pBuffPtr += hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3799	hi2c->XferCount -= hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3800	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	3801	{
bogdanm	0:9b334a45a8ff	3802	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	3803	}
bogdanm	0:9b334a45a8ff	3804	else
bogdanm	0:9b334a45a8ff	3805	{
bogdanm	0:9b334a45a8ff	3806	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	3807	}
mbed_official	83:a036322b8637	3808
bogdanm	0:9b334a45a8ff	3809	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official	83:a036322b8637	3810
bogdanm	0:9b334a45a8ff	3811	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	3812	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	3813
bogdanm	0:9b334a45a8ff	3814	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	3815	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3816	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3817	{
bogdanm	0:9b334a45a8ff	3818	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3819	}
bogdanm	0:9b334a45a8ff	3820	else
bogdanm	0:9b334a45a8ff	3821	{
bogdanm	0:9b334a45a8ff	3822	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3823	}
mbed_official	83:a036322b8637	3824
bogdanm	0:9b334a45a8ff	3825	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	3826	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	3827	{
bogdanm	0:9b334a45a8ff	3828	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3829	}
bogdanm	0:9b334a45a8ff	3830
bogdanm	0:9b334a45a8ff	3831	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3832	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3833	{
bogdanm	0:9b334a45a8ff	3834	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3835	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3836	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3837	{
bogdanm	0:9b334a45a8ff	3838	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3839	{
bogdanm	0:9b334a45a8ff	3840	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3841	}
bogdanm	0:9b334a45a8ff	3842	else
bogdanm	0:9b334a45a8ff	3843	{
bogdanm	0:9b334a45a8ff	3844	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3845	}
bogdanm	0:9b334a45a8ff	3846	}
mbed_official	83:a036322b8637	3847
bogdanm	0:9b334a45a8ff	3848	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3849	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	3850
bogdanm	0:9b334a45a8ff	3851	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3852	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3853
bogdanm	0:9b334a45a8ff	3854	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3855
bogdanm	0:9b334a45a8ff	3856	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3857	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3858	}
bogdanm	0:9b334a45a8ff	3859	else
bogdanm	0:9b334a45a8ff	3860	{
bogdanm	0:9b334a45a8ff	3861	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	3862	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3863	}
bogdanm	0:9b334a45a8ff	3864	}
bogdanm	0:9b334a45a8ff	3865	}
bogdanm	0:9b334a45a8ff	3866	else
bogdanm	0:9b334a45a8ff	3867	{
bogdanm	0:9b334a45a8ff	3868	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3869	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3870	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3871	{
bogdanm	0:9b334a45a8ff	3872	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3873	{
bogdanm	0:9b334a45a8ff	3874	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3875	}
bogdanm	0:9b334a45a8ff	3876	else
bogdanm	0:9b334a45a8ff	3877	{
bogdanm	0:9b334a45a8ff	3878	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3879	}
bogdanm	0:9b334a45a8ff	3880	}
mbed_official	83:a036322b8637	3881
bogdanm	0:9b334a45a8ff	3882	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3883	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3884
bogdanm	0:9b334a45a8ff	3885	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3886	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	3887
bogdanm	0:9b334a45a8ff	3888	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3889	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official	83:a036322b8637	3890
bogdanm	0:9b334a45a8ff	3891	hi2c->XferCount = 0;
mbed_official	83:a036322b8637	3892
bogdanm	0:9b334a45a8ff	3893	hi2c->State = HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	3894
bogdanm	0:9b334a45a8ff	3895	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3896	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3897	{
bogdanm	0:9b334a45a8ff	3898	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3899	}
bogdanm	0:9b334a45a8ff	3900	else
bogdanm	0:9b334a45a8ff	3901	{
bogdanm	0:9b334a45a8ff	3902	HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3903	}
bogdanm	0:9b334a45a8ff	3904	}
bogdanm	0:9b334a45a8ff	3905	}
bogdanm	0:9b334a45a8ff	3906
bogdanm	0:9b334a45a8ff	3907	/**
bogdanm	0:9b334a45a8ff	3908	* @brief DMA I2C communication error callback.
bogdanm	0:9b334a45a8ff	3909	* @param hdma : DMA handle
bogdanm	0:9b334a45a8ff	3910	* @retval None
bogdanm	0:9b334a45a8ff	3911	*/
bogdanm	0:9b334a45a8ff	3912	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3913	{
bogdanm	0:9b334a45a8ff	3914	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	3915
bogdanm	0:9b334a45a8ff	3916	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	3917	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	3918
bogdanm	0:9b334a45a8ff	3919	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3920
bogdanm	0:9b334a45a8ff	3921	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3922
bogdanm	0:9b334a45a8ff	3923	hi2c->ErrorCode \|= HAL_I2C_ERROR_DMA;
bogdanm	0:9b334a45a8ff	3924
bogdanm	0:9b334a45a8ff	3925	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3926	}
bogdanm	0:9b334a45a8ff	3927
bogdanm	0:9b334a45a8ff	3928	/**
bogdanm	0:9b334a45a8ff	3929	* @brief This function handles I2C Communication Timeout.
bogdanm	0:9b334a45a8ff	3930	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3931	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3932	* @param Flag: specifies the I2C flag to check.
bogdanm	0:9b334a45a8ff	3933	* @param Status: The new Flag status (SET or RESET).
bogdanm	0:9b334a45a8ff	3934	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3935	* @retval HAL status
bogdanm	0:9b334a45a8ff	3936	*/
bogdanm	0:9b334a45a8ff	3937	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3938	{
bogdanm	0:9b334a45a8ff	3939	uint32_t tickstart = HAL_GetTick();
mbed_official	83:a036322b8637	3940
bogdanm	0:9b334a45a8ff	3941	/* Wait until flag is set */
bogdanm	0:9b334a45a8ff	3942	if(Status == RESET)
bogdanm	0:9b334a45a8ff	3943	{
bogdanm	0:9b334a45a8ff	3944	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
bogdanm	0:9b334a45a8ff	3945	{
bogdanm	0:9b334a45a8ff	3946	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3947	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	3948	{
bogdanm	0:9b334a45a8ff	3949	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3950	{
bogdanm	0:9b334a45a8ff	3951	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3952	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3953	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3954	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3955	}
bogdanm	0:9b334a45a8ff	3956	}
bogdanm	0:9b334a45a8ff	3957	}
bogdanm	0:9b334a45a8ff	3958	}
bogdanm	0:9b334a45a8ff	3959	else
bogdanm	0:9b334a45a8ff	3960	{
bogdanm	0:9b334a45a8ff	3961	while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
bogdanm	0:9b334a45a8ff	3962	{
bogdanm	0:9b334a45a8ff	3963	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3964	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	3965	{
bogdanm	0:9b334a45a8ff	3966	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3967	{
bogdanm	0:9b334a45a8ff	3968	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3969	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3970	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3971	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3972	}
bogdanm	0:9b334a45a8ff	3973	}
bogdanm	0:9b334a45a8ff	3974	}
bogdanm	0:9b334a45a8ff	3975	}
bogdanm	0:9b334a45a8ff	3976	return HAL_OK;
bogdanm	0:9b334a45a8ff	3977	}
bogdanm	0:9b334a45a8ff	3978
bogdanm	0:9b334a45a8ff	3979	/**
bogdanm	0:9b334a45a8ff	3980	* @brief This function handles I2C Communication Timeout for specific usage of TXIS flag.
bogdanm	0:9b334a45a8ff	3981	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3982	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3983	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3984	* @retval HAL status
bogdanm	0:9b334a45a8ff	3985	*/
bogdanm	0:9b334a45a8ff	3986	static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3987	{
bogdanm	0:9b334a45a8ff	3988	uint32_t tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	3989
bogdanm	0:9b334a45a8ff	3990	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
bogdanm	0:9b334a45a8ff	3991	{
bogdanm	0:9b334a45a8ff	3992	/* Check if a NACK is detected */
bogdanm	0:9b334a45a8ff	3993	if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3994	{
bogdanm	0:9b334a45a8ff	3995	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3996	}
mbed_official	83:a036322b8637	3997
bogdanm	0:9b334a45a8ff	3998	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3999	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	4000	{
bogdanm	0:9b334a45a8ff	4001	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	4002	{
bogdanm	0:9b334a45a8ff	4003	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	4004	hi2c->State= HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	4005
bogdanm	0:9b334a45a8ff	4006	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	4007	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	4008
bogdanm	0:9b334a45a8ff	4009	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	4010	}
bogdanm	0:9b334a45a8ff	4011	}
bogdanm	0:9b334a45a8ff	4012	}
bogdanm	0:9b334a45a8ff	4013	return HAL_OK;
bogdanm	0:9b334a45a8ff	4014	}
bogdanm	0:9b334a45a8ff	4015
bogdanm	0:9b334a45a8ff	4016	/**
bogdanm	0:9b334a45a8ff	4017	* @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
bogdanm	0:9b334a45a8ff	4018	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	4019	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	4020	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	4021	* @retval HAL status
bogdanm	0:9b334a45a8ff	4022	*/
bogdanm	0:9b334a45a8ff	4023	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	4024	{
bogdanm	0:9b334a45a8ff	4025	uint32_t tickstart = 0x00;
bogdanm	0:9b334a45a8ff	4026	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	4027
bogdanm	0:9b334a45a8ff	4028	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
bogdanm	0:9b334a45a8ff	4029	{
bogdanm	0:9b334a45a8ff	4030	/* Check if a NACK is detected */
bogdanm	0:9b334a45a8ff	4031	if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	4032	{
bogdanm	0:9b334a45a8ff	4033	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	4034	}
mbed_official	83:a036322b8637	4035
bogdanm	0:9b334a45a8ff	4036	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	4037	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	4038	{
bogdanm	0:9b334a45a8ff	4039	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	4040	hi2c->State= HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	4041
bogdanm	0:9b334a45a8ff	4042	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	4043	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	4044
bogdanm	0:9b334a45a8ff	4045	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	4046	}
bogdanm	0:9b334a45a8ff	4047	}
bogdanm	0:9b334a45a8ff	4048	return HAL_OK;
bogdanm	0:9b334a45a8ff	4049	}
bogdanm	0:9b334a45a8ff	4050
bogdanm	0:9b334a45a8ff	4051	/**
bogdanm	0:9b334a45a8ff	4052	* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
bogdanm	0:9b334a45a8ff	4053	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	4054	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	4055	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	4056	* @retval HAL status
bogdanm	0:9b334a45a8ff	4057	*/
bogdanm	0:9b334a45a8ff	4058	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	4059	{
bogdanm	0:9b334a45a8ff	4060	uint32_t tickstart = 0x00;
bogdanm	0:9b334a45a8ff	4061	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	4062
bogdanm	0:9b334a45a8ff	4063	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
bogdanm	0:9b334a45a8ff	4064	{
mbed_official	83:a036322b8637	4065	/* Check if a NACK is detected */
mbed_official	83:a036322b8637	4066	if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
mbed_official	83:a036322b8637	4067	{
mbed_official	83:a036322b8637	4068	return HAL_ERROR;
mbed_official	83:a036322b8637	4069	}
mbed_official	83:a036322b8637	4070
bogdanm	0:9b334a45a8ff	4071	/* Check if a STOPF is detected */
bogdanm	0:9b334a45a8ff	4072	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	4073	{
bogdanm	0:9b334a45a8ff	4074	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	4075	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	4076
bogdanm	0:9b334a45a8ff	4077	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	4078	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	4079
bogdanm	0:9b334a45a8ff	4080	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	4081	hi2c->State= HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	4082
bogdanm	0:9b334a45a8ff	4083	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	4084	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	4085
bogdanm	0:9b334a45a8ff	4086	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	4087	}
mbed_official	83:a036322b8637	4088
bogdanm	0:9b334a45a8ff	4089	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	4090	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	4091	{
bogdanm	0:9b334a45a8ff	4092	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	4093	hi2c->State= HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	4094
bogdanm	0:9b334a45a8ff	4095	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	4096	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	4097
bogdanm	0:9b334a45a8ff	4098	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	4099	}
bogdanm	0:9b334a45a8ff	4100	}
bogdanm	0:9b334a45a8ff	4101	return HAL_OK;
bogdanm	0:9b334a45a8ff	4102	}
bogdanm	0:9b334a45a8ff	4103
bogdanm	0:9b334a45a8ff	4104	/**
bogdanm	0:9b334a45a8ff	4105	* @brief This function handles Acknowledge failed detection during an I2C Communication.
bogdanm	0:9b334a45a8ff	4106	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	4107	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	4108	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	4109	* @retval HAL status
bogdanm	0:9b334a45a8ff	4110	*/
bogdanm	0:9b334a45a8ff	4111	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	4112	{
bogdanm	0:9b334a45a8ff	4113	uint32_t tickstart = 0x00;
bogdanm	0:9b334a45a8ff	4114	tickstart = HAL_GetTick();
mbed_official	83:a036322b8637	4115
bogdanm	0:9b334a45a8ff	4116	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm	0:9b334a45a8ff	4117	{
bogdanm	0:9b334a45a8ff	4118	/* Wait until STOP Flag is reset */
bogdanm	0:9b334a45a8ff	4119	/* AutoEnd should be initiate after AF */
bogdanm	0:9b334a45a8ff	4120	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
bogdanm	0:9b334a45a8ff	4121	{
bogdanm	0:9b334a45a8ff	4122	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	4123	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	4124	{
mbed_official	83:a036322b8637	4125	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	4126	{
bogdanm	0:9b334a45a8ff	4127	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	4128	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	4129	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	4130	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	4131	}
bogdanm	0:9b334a45a8ff	4132	}
bogdanm	0:9b334a45a8ff	4133	}
mbed_official	83:a036322b8637	4134
bogdanm	0:9b334a45a8ff	4135	/* Clear NACKF Flag */
bogdanm	0:9b334a45a8ff	4136	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official	83:a036322b8637	4137
bogdanm	0:9b334a45a8ff	4138	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	4139	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official	83:a036322b8637	4140
mbed_official	83:a036322b8637	4141	/* Flush TX register if not empty */
mbed_official	83:a036322b8637	4142	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
mbed_official	83:a036322b8637	4143	{
mbed_official	83:a036322b8637	4144	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
mbed_official	83:a036322b8637	4145	}
mbed_official	83:a036322b8637	4146
bogdanm	0:9b334a45a8ff	4147	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	4148	I2C_RESET_CR2(hi2c);
mbed_official	83:a036322b8637	4149
bogdanm	0:9b334a45a8ff	4150	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	4151	hi2c->State= HAL_I2C_STATE_READY;
mbed_official	83:a036322b8637	4152
bogdanm	0:9b334a45a8ff	4153	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	4154	__HAL_UNLOCK(hi2c);
mbed_official	83:a036322b8637	4155
bogdanm	0:9b334a45a8ff	4156	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	4157	}
bogdanm	0:9b334a45a8ff	4158	return HAL_OK;
bogdanm	0:9b334a45a8ff	4159	}
bogdanm	0:9b334a45a8ff	4160
bogdanm	0:9b334a45a8ff	4161	/**
bogdanm	0:9b334a45a8ff	4162	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
bogdanm	0:9b334a45a8ff	4163	* @param hi2c: I2C handle.
bogdanm	0:9b334a45a8ff	4164	* @param DevAddress: specifies the slave address to be programmed.
bogdanm	0:9b334a45a8ff	4165	* @param Size: specifies the number of bytes to be programmed.
bogdanm	0:9b334a45a8ff	4166	* This parameter must be a value between 0 and 255.
bogdanm	0:9b334a45a8ff	4167	* @param Mode: new state of the I2C START condition generation.
bogdanm	0:9b334a45a8ff	4168	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	4169	* @arg I2C_RELOAD_MODE: Enable Reload mode .
bogdanm	0:9b334a45a8ff	4170	* @arg I2C_AUTOEND_MODE: Enable Automatic end mode.
bogdanm	0:9b334a45a8ff	4171	* @arg I2C_SOFTEND_MODE: Enable Software end mode.
bogdanm	0:9b334a45a8ff	4172	* @param Request: new state of the I2C START condition generation.
bogdanm	0:9b334a45a8ff	4173	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	4174	* @arg I2C_NO_STARTSTOP: Don't Generate stop and start condition.
bogdanm	0:9b334a45a8ff	4175	* @arg I2C_GENERATE_STOP: Generate stop condition (Size should be set to 0).
bogdanm	0:9b334a45a8ff	4176	* @arg I2C_GENERATE_START_READ: Generate Restart for read request.
bogdanm	0:9b334a45a8ff	4177	* @arg I2C_GENERATE_START_WRITE: Generate Restart for write request.
bogdanm	0:9b334a45a8ff	4178	* @retval None
bogdanm	0:9b334a45a8ff	4179	*/
bogdanm	0:9b334a45a8ff	4180	static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
bogdanm	0:9b334a45a8ff	4181	{
bogdanm	0:9b334a45a8ff	4182	uint32_t tmpreg = 0;
bogdanm	0:9b334a45a8ff	4183
bogdanm	0:9b334a45a8ff	4184	/* Check the parameters */
bogdanm	0:9b334a45a8ff	4185	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm	0:9b334a45a8ff	4186	assert_param(IS_TRANSFER_MODE(Mode));
bogdanm	0:9b334a45a8ff	4187	assert_param(IS_TRANSFER_REQUEST(Request));
mbed_official	83:a036322b8637	4188
bogdanm	0:9b334a45a8ff	4189	/* Get the CR2 register value */
bogdanm	0:9b334a45a8ff	4190	tmpreg = hi2c->Instance->CR2;
bogdanm	0:9b334a45a8ff	4191
bogdanm	0:9b334a45a8ff	4192	/* clear tmpreg specific bits */
bogdanm	0:9b334a45a8ff	4193	tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD \| I2C_CR2_NBYTES \| I2C_CR2_RELOAD \| I2C_CR2_AUTOEND \| I2C_CR2_RD_WRN \| I2C_CR2_START \| I2C_CR2_STOP));
bogdanm	0:9b334a45a8ff	4194
bogdanm	0:9b334a45a8ff	4195	/* update tmpreg */
bogdanm	0:9b334a45a8ff	4196	tmpreg \|= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) \| (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) \| \
mbed_official	83:a036322b8637	4197	(uint32_t)Mode \| (uint32_t)Request);
bogdanm	0:9b334a45a8ff	4198
bogdanm	0:9b334a45a8ff	4199	/* update CR2 register */
bogdanm	0:9b334a45a8ff	4200	hi2c->Instance->CR2 = tmpreg;
bogdanm	0:9b334a45a8ff	4201	}
bogdanm	0:9b334a45a8ff	4202
bogdanm	0:9b334a45a8ff	4203	/**
bogdanm	0:9b334a45a8ff	4204	* @}
bogdanm	0:9b334a45a8ff	4205	*/
bogdanm	0:9b334a45a8ff	4206
bogdanm	0:9b334a45a8ff	4207	/**
bogdanm	0:9b334a45a8ff	4208	* @}
bogdanm	0:9b334a45a8ff	4209	*/
bogdanm	0:9b334a45a8ff	4210
bogdanm	0:9b334a45a8ff	4211	#endif /* HAL_I2C_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	4212	/**
bogdanm	0:9b334a45a8ff	4213	* @}
bogdanm	0:9b334a45a8ff	4214	*/
bogdanm	0:9b334a45a8ff	4215
bogdanm	0:9b334a45a8ff	4216	/**
bogdanm	0:9b334a45a8ff	4217	* @}
bogdanm	0:9b334a45a8ff	4218	*/
bogdanm	0:9b334a45a8ff	4219
bogdanm	0:9b334a45a8ff	4220	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	10 Sep 2016
Imports:	1
Forks:	0
Commits:	148
Dependents:	0
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_i2c.c@83:a036322b8637, 2016-03-07 (annotated)

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