mbed-dev - added prescaler for 16 bit pwm in LPC1347 target

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added prescaler for 16 bit pwm in LPC1347 target

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_i2c.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff
Child:: 83:a036322b8637

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f7xx_hal_i2c.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.0.1
bogdanm	0:9b334a45a8ff	6	* @date 25-June-2015
bogdanm	0:9b334a45a8ff	7	* @brief I2C HAL module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
bogdanm	0:9b334a45a8ff	10	* + Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	11	* + IO operation functions
bogdanm	0:9b334a45a8ff	12	* + Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	13	*
bogdanm	0:9b334a45a8ff	14	@verbatim
bogdanm	0:9b334a45a8ff	15	==============================================================================
bogdanm	0:9b334a45a8ff	16	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	17	==============================================================================
bogdanm	0:9b334a45a8ff	18	[..]
bogdanm	0:9b334a45a8ff	19	The I2C HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	20
bogdanm	0:9b334a45a8ff	21	(#) Declare a I2C_HandleTypeDef handle structure, for example:
bogdanm	0:9b334a45a8ff	22	I2C_HandleTypeDef hi2c;
bogdanm	0:9b334a45a8ff	23
bogdanm	0:9b334a45a8ff	24	(#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit ()API:
bogdanm	0:9b334a45a8ff	25	(##) Enable the I2Cx interface clock
bogdanm	0:9b334a45a8ff	26	(##) I2C pins configuration
bogdanm	0:9b334a45a8ff	27	(+++) Enable the clock for the I2C GPIOs
bogdanm	0:9b334a45a8ff	28	(+++) Configure I2C pins as alternate function open-drain
bogdanm	0:9b334a45a8ff	29	(##) NVIC configuration if you need to use interrupt process
bogdanm	0:9b334a45a8ff	30	(+++) Configure the I2Cx interrupt priority
bogdanm	0:9b334a45a8ff	31	(+++) Enable the NVIC I2C IRQ Channel
bogdanm	0:9b334a45a8ff	32	(##) DMA Configuration if you need to use DMA process
bogdanm	0:9b334a45a8ff	33	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
bogdanm	0:9b334a45a8ff	34	(+++) Enable the DMAx interface clock using
bogdanm	0:9b334a45a8ff	35	(+++) Configure the DMA handle parameters
bogdanm	0:9b334a45a8ff	36	(+++) Configure the DMA Tx or Rx Stream
bogdanm	0:9b334a45a8ff	37	(+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
bogdanm	0:9b334a45a8ff	38	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream
bogdanm	0:9b334a45a8ff	39
bogdanm	0:9b334a45a8ff	40	(#) Configure the Communication Clock Timing, Own Address1, Master Addressing Mode, Dual Addressing mode,
bogdanm	0:9b334a45a8ff	41	Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
bogdanm	0:9b334a45a8ff	42
bogdanm	0:9b334a45a8ff	43	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
bogdanm	0:9b334a45a8ff	44	(GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API.
bogdanm	0:9b334a45a8ff	45
bogdanm	0:9b334a45a8ff	46	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
bogdanm	0:9b334a45a8ff	49
bogdanm	0:9b334a45a8ff	50	* Polling mode IO operation *
bogdanm	0:9b334a45a8ff	51	=================================
bogdanm	0:9b334a45a8ff	52	[..]
bogdanm	0:9b334a45a8ff	53	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
bogdanm	0:9b334a45a8ff	54	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
bogdanm	0:9b334a45a8ff	55	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
bogdanm	0:9b334a45a8ff	56	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
bogdanm	0:9b334a45a8ff	57
bogdanm	0:9b334a45a8ff	58	* Polling mode IO MEM operation *
bogdanm	0:9b334a45a8ff	59	=====================================
bogdanm	0:9b334a45a8ff	60	[..]
bogdanm	0:9b334a45a8ff	61	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
bogdanm	0:9b334a45a8ff	62	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
bogdanm	0:9b334a45a8ff	63
bogdanm	0:9b334a45a8ff	64
bogdanm	0:9b334a45a8ff	65	* Interrupt mode IO operation *
bogdanm	0:9b334a45a8ff	66	===================================
bogdanm	0:9b334a45a8ff	67	[..]
bogdanm	0:9b334a45a8ff	68	(+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
bogdanm	0:9b334a45a8ff	69	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	70	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
bogdanm	0:9b334a45a8ff	71	(+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
bogdanm	0:9b334a45a8ff	72	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	73	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
bogdanm	0:9b334a45a8ff	74	(+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
bogdanm	0:9b334a45a8ff	75	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	76	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
bogdanm	0:9b334a45a8ff	77	(+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
bogdanm	0:9b334a45a8ff	78	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	79	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
bogdanm	0:9b334a45a8ff	80	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	81	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	82
bogdanm	0:9b334a45a8ff	83	* Interrupt mode IO MEM operation *
bogdanm	0:9b334a45a8ff	84	=======================================
bogdanm	0:9b334a45a8ff	85	[..]
bogdanm	0:9b334a45a8ff	86	(+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
bogdanm	0:9b334a45a8ff	87	HAL_I2C_Mem_Write_IT()
bogdanm	0:9b334a45a8ff	88	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	89	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
bogdanm	0:9b334a45a8ff	90	(+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
bogdanm	0:9b334a45a8ff	91	HAL_I2C_Mem_Read_IT()
bogdanm	0:9b334a45a8ff	92	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	93	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
bogdanm	0:9b334a45a8ff	94	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	95	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	96
bogdanm	0:9b334a45a8ff	97	* DMA mode IO operation *
bogdanm	0:9b334a45a8ff	98	==============================
bogdanm	0:9b334a45a8ff	99	[..]
bogdanm	0:9b334a45a8ff	100	(+) Transmit in master mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	101	HAL_I2C_Master_Transmit_DMA()
bogdanm	0:9b334a45a8ff	102	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	103	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
bogdanm	0:9b334a45a8ff	104	(+) Receive in master mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	105	HAL_I2C_Master_Receive_DMA()
bogdanm	0:9b334a45a8ff	106	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	107	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
bogdanm	0:9b334a45a8ff	108	(+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	109	HAL_I2C_Slave_Transmit_DMA()
bogdanm	0:9b334a45a8ff	110	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	111	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
bogdanm	0:9b334a45a8ff	112	(+) Receive in slave mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	113	HAL_I2C_Slave_Receive_DMA()
bogdanm	0:9b334a45a8ff	114	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	115	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
bogdanm	0:9b334a45a8ff	116	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	117	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	118
bogdanm	0:9b334a45a8ff	119	* DMA mode IO MEM operation *
bogdanm	0:9b334a45a8ff	120	=================================
bogdanm	0:9b334a45a8ff	121	[..]
bogdanm	0:9b334a45a8ff	122	(+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
bogdanm	0:9b334a45a8ff	123	HAL_I2C_Mem_Write_DMA()
bogdanm	0:9b334a45a8ff	124	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	125	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
bogdanm	0:9b334a45a8ff	126	(+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
bogdanm	0:9b334a45a8ff	127	HAL_I2C_Mem_Read_DMA()
bogdanm	0:9b334a45a8ff	128	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	129	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
bogdanm	0:9b334a45a8ff	130	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	131	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	132
bogdanm	0:9b334a45a8ff	133
bogdanm	0:9b334a45a8ff	134	* I2C HAL driver macros list *
bogdanm	0:9b334a45a8ff	135	==================================
bogdanm	0:9b334a45a8ff	136	[..]
bogdanm	0:9b334a45a8ff	137	Below the list of most used macros in I2C HAL driver.
bogdanm	0:9b334a45a8ff	138
bogdanm	0:9b334a45a8ff	139	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
bogdanm	0:9b334a45a8ff	140	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
bogdanm	0:9b334a45a8ff	141	(+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
bogdanm	0:9b334a45a8ff	142	(+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
bogdanm	0:9b334a45a8ff	143	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
bogdanm	0:9b334a45a8ff	144	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
bogdanm	0:9b334a45a8ff	145
bogdanm	0:9b334a45a8ff	146	[..]
bogdanm	0:9b334a45a8ff	147	(@) You can refer to the I2C HAL driver header file for more useful macros
bogdanm	0:9b334a45a8ff	148
bogdanm	0:9b334a45a8ff	149	@endverbatim
bogdanm	0:9b334a45a8ff	150	******************************************************************************
bogdanm	0:9b334a45a8ff	151	* @attention
bogdanm	0:9b334a45a8ff	152	*
bogdanm	0:9b334a45a8ff	153	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	154	*
bogdanm	0:9b334a45a8ff	155	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	156	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	157	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	158	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	159	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	160	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	161	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	162	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	163	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	164	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	165	*
bogdanm	0:9b334a45a8ff	166	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	167	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	168	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	169	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	170	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	171	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	172	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	173	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	174	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	175	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	176	*
bogdanm	0:9b334a45a8ff	177	******************************************************************************
bogdanm	0:9b334a45a8ff	178	*/
bogdanm	0:9b334a45a8ff	179
bogdanm	0:9b334a45a8ff	180	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	181	#include "stm32f7xx_hal.h"
bogdanm	0:9b334a45a8ff	182
bogdanm	0:9b334a45a8ff	183	/** @addtogroup STM32F7xx_HAL_Driver
bogdanm	0:9b334a45a8ff	184	* @{
bogdanm	0:9b334a45a8ff	185	*/
bogdanm	0:9b334a45a8ff	186
bogdanm	0:9b334a45a8ff	187	/** @defgroup I2C I2C
bogdanm	0:9b334a45a8ff	188	* @brief I2C HAL module driver
bogdanm	0:9b334a45a8ff	189	* @{
bogdanm	0:9b334a45a8ff	190	*/
bogdanm	0:9b334a45a8ff	191
bogdanm	0:9b334a45a8ff	192	#ifdef HAL_I2C_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	193
bogdanm	0:9b334a45a8ff	194	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	195	/* Private constants ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	196	/** @addtogroup I2C_Private_Constants I2C Private Constants
bogdanm	0:9b334a45a8ff	197	* @{
bogdanm	0:9b334a45a8ff	198	*/
bogdanm	0:9b334a45a8ff	199	#define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /<! I2C TIMING clear register Mask /
bogdanm	0:9b334a45a8ff	200	#define I2C_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
bogdanm	0:9b334a45a8ff	201	#define I2C_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	202	#define I2C_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	203	#define I2C_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	204	#define I2C_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	205	#define I2C_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	206	#define I2C_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	207	#define I2C_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	208	#define I2C_TIMEOUT_FLAG ((uint32_t)25) /* 25 ms */
bogdanm	0:9b334a45a8ff	209	/**
bogdanm	0:9b334a45a8ff	210	* @}
bogdanm	0:9b334a45a8ff	211	*/
bogdanm	0:9b334a45a8ff	212
bogdanm	0:9b334a45a8ff	213	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	214	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	215	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	216	/** @addtogroup I2C_Private_Functions I2C Private Functions
bogdanm	0:9b334a45a8ff	217	* @{
bogdanm	0:9b334a45a8ff	218	*/
bogdanm	0:9b334a45a8ff	219	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	220	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	221	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	222	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	223	static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	224	static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	225	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	226
bogdanm	0:9b334a45a8ff	227	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	228	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	229	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	230	static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	231	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	232	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	233	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	234
bogdanm	0:9b334a45a8ff	235	static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	236	static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	237
bogdanm	0:9b334a45a8ff	238	static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	239	static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	240
bogdanm	0:9b334a45a8ff	241	static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
bogdanm	0:9b334a45a8ff	242	/**
bogdanm	0:9b334a45a8ff	243	* @}
bogdanm	0:9b334a45a8ff	244	*/
bogdanm	0:9b334a45a8ff	245
bogdanm	0:9b334a45a8ff	246	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	247
bogdanm	0:9b334a45a8ff	248	/** @defgroup I2C_Exported_Functions I2C Exported Functions
bogdanm	0:9b334a45a8ff	249	* @{
bogdanm	0:9b334a45a8ff	250	*/
bogdanm	0:9b334a45a8ff	251
bogdanm	0:9b334a45a8ff	252	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	253	* @brief Initialization and Configuration functions
bogdanm	0:9b334a45a8ff	254	*
bogdanm	0:9b334a45a8ff	255	@verbatim
bogdanm	0:9b334a45a8ff	256	===============================================================================
bogdanm	0:9b334a45a8ff	257	##### Initialization and de-initialization functions #####
bogdanm	0:9b334a45a8ff	258	===============================================================================
bogdanm	0:9b334a45a8ff	259	[..] This subsection provides a set of functions allowing to initialize and
bogdanm	0:9b334a45a8ff	260	de-initialize the I2Cx peripheral:
bogdanm	0:9b334a45a8ff	261
bogdanm	0:9b334a45a8ff	262	(+) User must Implement HAL_I2C_MspInit() function in which he configures
bogdanm	0:9b334a45a8ff	263	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
bogdanm	0:9b334a45a8ff	264
bogdanm	0:9b334a45a8ff	265	(+) Call the function HAL_I2C_Init() to configure the selected device with
bogdanm	0:9b334a45a8ff	266	the selected configuration:
bogdanm	0:9b334a45a8ff	267	(++) Clock Timing
bogdanm	0:9b334a45a8ff	268	(++) Own Address 1
bogdanm	0:9b334a45a8ff	269	(++) Addressing mode (Master, Slave)
bogdanm	0:9b334a45a8ff	270	(++) Dual Addressing mode
bogdanm	0:9b334a45a8ff	271	(++) Own Address 2
bogdanm	0:9b334a45a8ff	272	(++) Own Address 2 Mask
bogdanm	0:9b334a45a8ff	273	(++) General call mode
bogdanm	0:9b334a45a8ff	274	(++) Nostretch mode
bogdanm	0:9b334a45a8ff	275
bogdanm	0:9b334a45a8ff	276	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
bogdanm	0:9b334a45a8ff	277	of the selected I2Cx peripheral.
bogdanm	0:9b334a45a8ff	278
bogdanm	0:9b334a45a8ff	279	@endverbatim
bogdanm	0:9b334a45a8ff	280	* @{
bogdanm	0:9b334a45a8ff	281	*/
bogdanm	0:9b334a45a8ff	282
bogdanm	0:9b334a45a8ff	283	/**
bogdanm	0:9b334a45a8ff	284	* @brief Initializes the I2C according to the specified parameters
bogdanm	0:9b334a45a8ff	285	* in the I2C_InitTypeDef and create the associated handle.
bogdanm	0:9b334a45a8ff	286	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	287	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	288	* @retval HAL status
bogdanm	0:9b334a45a8ff	289	*/
bogdanm	0:9b334a45a8ff	290	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	291	{
bogdanm	0:9b334a45a8ff	292	/* Check the I2C handle allocation */
bogdanm	0:9b334a45a8ff	293	if(hi2c == NULL)
bogdanm	0:9b334a45a8ff	294	{
bogdanm	0:9b334a45a8ff	295	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	296	}
bogdanm	0:9b334a45a8ff	297
bogdanm	0:9b334a45a8ff	298	/* Check the parameters */
bogdanm	0:9b334a45a8ff	299	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm	0:9b334a45a8ff	300	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
bogdanm	0:9b334a45a8ff	301	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
bogdanm	0:9b334a45a8ff	302	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
bogdanm	0:9b334a45a8ff	303	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
bogdanm	0:9b334a45a8ff	304	assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
bogdanm	0:9b334a45a8ff	305	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
bogdanm	0:9b334a45a8ff	306	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
bogdanm	0:9b334a45a8ff	307
bogdanm	0:9b334a45a8ff	308	if(hi2c->State == HAL_I2C_STATE_RESET)
bogdanm	0:9b334a45a8ff	309	{
bogdanm	0:9b334a45a8ff	310	/* Allocate lock resource and initialize it */
bogdanm	0:9b334a45a8ff	311	hi2c->Lock = HAL_UNLOCKED;
bogdanm	0:9b334a45a8ff	312	/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
bogdanm	0:9b334a45a8ff	313	HAL_I2C_MspInit(hi2c);
bogdanm	0:9b334a45a8ff	314	}
bogdanm	0:9b334a45a8ff	315
bogdanm	0:9b334a45a8ff	316	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	317
bogdanm	0:9b334a45a8ff	318	/* Disable the selected I2C peripheral */
bogdanm	0:9b334a45a8ff	319	__HAL_I2C_DISABLE(hi2c);
bogdanm	0:9b334a45a8ff	320
bogdanm	0:9b334a45a8ff	321	/---------------------------- I2Cx TIMINGR Configuration ------------------/
bogdanm	0:9b334a45a8ff	322	/* Configure I2Cx: Frequency range */
bogdanm	0:9b334a45a8ff	323	hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
bogdanm	0:9b334a45a8ff	324
bogdanm	0:9b334a45a8ff	325	/---------------------------- I2Cx OAR1 Configuration ---------------------/
bogdanm	0:9b334a45a8ff	326	/* Configure I2Cx: Own Address1 and ack own address1 mode */
bogdanm	0:9b334a45a8ff	327	hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
bogdanm	0:9b334a45a8ff	328	if(hi2c->Init.OwnAddress1 != 0)
bogdanm	0:9b334a45a8ff	329	{
bogdanm	0:9b334a45a8ff	330	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm	0:9b334a45a8ff	331	{
bogdanm	0:9b334a45a8ff	332	hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN \| hi2c->Init.OwnAddress1);
bogdanm	0:9b334a45a8ff	333	}
bogdanm	0:9b334a45a8ff	334	else /* I2C_ADDRESSINGMODE_10BIT */
bogdanm	0:9b334a45a8ff	335	{
bogdanm	0:9b334a45a8ff	336	hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN \| I2C_OAR1_OA1MODE \| hi2c->Init.OwnAddress1);
bogdanm	0:9b334a45a8ff	337	}
bogdanm	0:9b334a45a8ff	338	}
bogdanm	0:9b334a45a8ff	339
bogdanm	0:9b334a45a8ff	340	/---------------------------- I2Cx CR2 Configuration ----------------------/
bogdanm	0:9b334a45a8ff	341	/* Configure I2Cx: Addressing Master mode */
bogdanm	0:9b334a45a8ff	342	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm	0:9b334a45a8ff	343	{
bogdanm	0:9b334a45a8ff	344	hi2c->Instance->CR2 = (I2C_CR2_ADD10);
bogdanm	0:9b334a45a8ff	345	}
bogdanm	0:9b334a45a8ff	346	/* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
bogdanm	0:9b334a45a8ff	347	hi2c->Instance->CR2 \|= (I2C_CR2_AUTOEND \| I2C_CR2_NACK);
bogdanm	0:9b334a45a8ff	348
bogdanm	0:9b334a45a8ff	349	/---------------------------- I2Cx OAR2 Configuration ---------------------/
bogdanm	0:9b334a45a8ff	350	/* Configure I2Cx: Dual mode and Own Address2 */
bogdanm	0:9b334a45a8ff	351	hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2 \| (hi2c->Init.OwnAddress2Masks << 8));
bogdanm	0:9b334a45a8ff	352
bogdanm	0:9b334a45a8ff	353	/---------------------------- I2Cx CR1 Configuration ----------------------/
bogdanm	0:9b334a45a8ff	354	/* Configure I2Cx: Generalcall and NoStretch mode */
bogdanm	0:9b334a45a8ff	355	hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode);
bogdanm	0:9b334a45a8ff	356
bogdanm	0:9b334a45a8ff	357	/* Enable the selected I2C peripheral */
bogdanm	0:9b334a45a8ff	358	__HAL_I2C_ENABLE(hi2c);
bogdanm	0:9b334a45a8ff	359
bogdanm	0:9b334a45a8ff	360	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	361	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	362
bogdanm	0:9b334a45a8ff	363	return HAL_OK;
bogdanm	0:9b334a45a8ff	364	}
bogdanm	0:9b334a45a8ff	365
bogdanm	0:9b334a45a8ff	366	/**
bogdanm	0:9b334a45a8ff	367	* @brief DeInitializes the I2C peripheral.
bogdanm	0:9b334a45a8ff	368	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	369	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	370	* @retval HAL status
bogdanm	0:9b334a45a8ff	371	*/
bogdanm	0:9b334a45a8ff	372	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	373	{
bogdanm	0:9b334a45a8ff	374	/* Check the I2C handle allocation */
bogdanm	0:9b334a45a8ff	375	if(hi2c == NULL)
bogdanm	0:9b334a45a8ff	376	{
bogdanm	0:9b334a45a8ff	377	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	378	}
bogdanm	0:9b334a45a8ff	379
bogdanm	0:9b334a45a8ff	380	/* Check the parameters */
bogdanm	0:9b334a45a8ff	381	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm	0:9b334a45a8ff	382
bogdanm	0:9b334a45a8ff	383	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	384
bogdanm	0:9b334a45a8ff	385	/* Disable the I2C Peripheral Clock */
bogdanm	0:9b334a45a8ff	386	__HAL_I2C_DISABLE(hi2c);
bogdanm	0:9b334a45a8ff	387
bogdanm	0:9b334a45a8ff	388	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
bogdanm	0:9b334a45a8ff	389	HAL_I2C_MspDeInit(hi2c);
bogdanm	0:9b334a45a8ff	390
bogdanm	0:9b334a45a8ff	391	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	392
bogdanm	0:9b334a45a8ff	393	hi2c->State = HAL_I2C_STATE_RESET;
bogdanm	0:9b334a45a8ff	394
bogdanm	0:9b334a45a8ff	395	/* Release Lock */
bogdanm	0:9b334a45a8ff	396	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	397
bogdanm	0:9b334a45a8ff	398	return HAL_OK;
bogdanm	0:9b334a45a8ff	399	}
bogdanm	0:9b334a45a8ff	400
bogdanm	0:9b334a45a8ff	401	/**
bogdanm	0:9b334a45a8ff	402	* @brief I2C MSP Init.
bogdanm	0:9b334a45a8ff	403	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	404	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	405	* @retval None
bogdanm	0:9b334a45a8ff	406	*/
bogdanm	0:9b334a45a8ff	407	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	408	{
bogdanm	0:9b334a45a8ff	409	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	410	the HAL_I2C_MspInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	411	*/
bogdanm	0:9b334a45a8ff	412	}
bogdanm	0:9b334a45a8ff	413
bogdanm	0:9b334a45a8ff	414	/**
bogdanm	0:9b334a45a8ff	415	* @brief I2C MSP DeInit
bogdanm	0:9b334a45a8ff	416	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	417	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	418	* @retval None
bogdanm	0:9b334a45a8ff	419	*/
bogdanm	0:9b334a45a8ff	420	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	421	{
bogdanm	0:9b334a45a8ff	422	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	423	the HAL_I2C_MspDeInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	424	*/
bogdanm	0:9b334a45a8ff	425	}
bogdanm	0:9b334a45a8ff	426
bogdanm	0:9b334a45a8ff	427	/**
bogdanm	0:9b334a45a8ff	428	* @}
bogdanm	0:9b334a45a8ff	429	*/
bogdanm	0:9b334a45a8ff	430
bogdanm	0:9b334a45a8ff	431	/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
bogdanm	0:9b334a45a8ff	432	* @brief Data transfers functions
bogdanm	0:9b334a45a8ff	433	*
bogdanm	0:9b334a45a8ff	434	@verbatim
bogdanm	0:9b334a45a8ff	435	===============================================================================
bogdanm	0:9b334a45a8ff	436	##### IO operation functions #####
bogdanm	0:9b334a45a8ff	437	===============================================================================
bogdanm	0:9b334a45a8ff	438	[..]
bogdanm	0:9b334a45a8ff	439	This subsection provides a set of functions allowing to manage the I2C data
bogdanm	0:9b334a45a8ff	440	transfers.
bogdanm	0:9b334a45a8ff	441
bogdanm	0:9b334a45a8ff	442	(#) There are two modes of transfer:
bogdanm	0:9b334a45a8ff	443	(++) Blocking mode : The communication is performed in the polling mode.
bogdanm	0:9b334a45a8ff	444	The status of all data processing is returned by the same function
bogdanm	0:9b334a45a8ff	445	after finishing transfer.
bogdanm	0:9b334a45a8ff	446	(++) No-Blocking mode : The communication is performed using Interrupts
bogdanm	0:9b334a45a8ff	447	or DMA. These functions return the status of the transfer startup.
bogdanm	0:9b334a45a8ff	448	The end of the data processing will be indicated through the
bogdanm	0:9b334a45a8ff	449	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
bogdanm	0:9b334a45a8ff	450	using DMA mode.
bogdanm	0:9b334a45a8ff	451
bogdanm	0:9b334a45a8ff	452	(#) Blocking mode functions are :
bogdanm	0:9b334a45a8ff	453	(++) HAL_I2C_Master_Transmit()
bogdanm	0:9b334a45a8ff	454	(++) HAL_I2C_Master_Receive()
bogdanm	0:9b334a45a8ff	455	(++) HAL_I2C_Slave_Transmit()
bogdanm	0:9b334a45a8ff	456	(++) HAL_I2C_Slave_Receive()
bogdanm	0:9b334a45a8ff	457	(++) HAL_I2C_Mem_Write()
bogdanm	0:9b334a45a8ff	458	(++) HAL_I2C_Mem_Read()
bogdanm	0:9b334a45a8ff	459	(++) HAL_I2C_IsDeviceReady()
bogdanm	0:9b334a45a8ff	460
bogdanm	0:9b334a45a8ff	461	(#) No-Blocking mode functions with Interrupt are :
bogdanm	0:9b334a45a8ff	462	(++) HAL_I2C_Master_Transmit_IT()
bogdanm	0:9b334a45a8ff	463	(++) HAL_I2C_Master_Receive_IT()
bogdanm	0:9b334a45a8ff	464	(++) HAL_I2C_Slave_Transmit_IT()
bogdanm	0:9b334a45a8ff	465	(++) HAL_I2C_Slave_Receive_IT()
bogdanm	0:9b334a45a8ff	466	(++) HAL_I2C_Mem_Write_IT()
bogdanm	0:9b334a45a8ff	467	(++) HAL_I2C_Mem_Read_IT()
bogdanm	0:9b334a45a8ff	468
bogdanm	0:9b334a45a8ff	469	(#) No-Blocking mode functions with DMA are :
bogdanm	0:9b334a45a8ff	470	(++) HAL_I2C_Master_Transmit_DMA()
bogdanm	0:9b334a45a8ff	471	(++) HAL_I2C_Master_Receive_DMA()
bogdanm	0:9b334a45a8ff	472	(++) HAL_I2C_Slave_Transmit_DMA()
bogdanm	0:9b334a45a8ff	473	(++) HAL_I2C_Slave_Receive_DMA()
bogdanm	0:9b334a45a8ff	474	(++) HAL_I2C_Mem_Write_DMA()
bogdanm	0:9b334a45a8ff	475	(++) HAL_I2C_Mem_Read_DMA()
bogdanm	0:9b334a45a8ff	476
bogdanm	0:9b334a45a8ff	477	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
bogdanm	0:9b334a45a8ff	478	(++) HAL_I2C_MemTxCpltCallback()
bogdanm	0:9b334a45a8ff	479	(++) HAL_I2C_MemRxCpltCallback()
bogdanm	0:9b334a45a8ff	480	(++) HAL_I2C_MasterTxCpltCallback()
bogdanm	0:9b334a45a8ff	481	(++) HAL_I2C_MasterRxCpltCallback()
bogdanm	0:9b334a45a8ff	482	(++) HAL_I2C_SlaveTxCpltCallback()
bogdanm	0:9b334a45a8ff	483	(++) HAL_I2C_SlaveRxCpltCallback()
bogdanm	0:9b334a45a8ff	484	(++) HAL_I2C_ErrorCallback()
bogdanm	0:9b334a45a8ff	485
bogdanm	0:9b334a45a8ff	486	@endverbatim
bogdanm	0:9b334a45a8ff	487	* @{
bogdanm	0:9b334a45a8ff	488	*/
bogdanm	0:9b334a45a8ff	489
bogdanm	0:9b334a45a8ff	490	/**
bogdanm	0:9b334a45a8ff	491	* @brief Transmits in master mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	492	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	493	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	494	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	495	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	496	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	497	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	498	* @retval HAL status
bogdanm	0:9b334a45a8ff	499	*/
bogdanm	0:9b334a45a8ff	500	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	501	{
bogdanm	0:9b334a45a8ff	502	uint32_t sizetmp = 0;
bogdanm	0:9b334a45a8ff	503
bogdanm	0:9b334a45a8ff	504	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	505	{
bogdanm	0:9b334a45a8ff	506	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	507	{
bogdanm	0:9b334a45a8ff	508	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	509	}
bogdanm	0:9b334a45a8ff	510
bogdanm	0:9b334a45a8ff	511	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	512	{
bogdanm	0:9b334a45a8ff	513	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	514	}
bogdanm	0:9b334a45a8ff	515
bogdanm	0:9b334a45a8ff	516	/* Process Locked */
bogdanm	0:9b334a45a8ff	517	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	518
bogdanm	0:9b334a45a8ff	519	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm	0:9b334a45a8ff	520	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	521
bogdanm	0:9b334a45a8ff	522	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	523	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	524	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	525	if(Size > 255)
bogdanm	0:9b334a45a8ff	526	{
bogdanm	0:9b334a45a8ff	527	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	528	sizetmp = 255;
bogdanm	0:9b334a45a8ff	529	}
bogdanm	0:9b334a45a8ff	530	else
bogdanm	0:9b334a45a8ff	531	{
bogdanm	0:9b334a45a8ff	532	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	533	sizetmp = Size;
bogdanm	0:9b334a45a8ff	534	}
bogdanm	0:9b334a45a8ff	535
bogdanm	0:9b334a45a8ff	536	do
bogdanm	0:9b334a45a8ff	537	{
bogdanm	0:9b334a45a8ff	538	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	539	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	540	{
bogdanm	0:9b334a45a8ff	541	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	542	{
bogdanm	0:9b334a45a8ff	543	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	544	}
bogdanm	0:9b334a45a8ff	545	else
bogdanm	0:9b334a45a8ff	546	{
bogdanm	0:9b334a45a8ff	547	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	548	}
bogdanm	0:9b334a45a8ff	549	}
bogdanm	0:9b334a45a8ff	550	/* Write data to TXDR */
bogdanm	0:9b334a45a8ff	551	hi2c->Instance->TXDR = (*pData++);
bogdanm	0:9b334a45a8ff	552	sizetmp--;
bogdanm	0:9b334a45a8ff	553	Size--;
bogdanm	0:9b334a45a8ff	554
bogdanm	0:9b334a45a8ff	555	if((sizetmp == 0)&&(Size!=0))
bogdanm	0:9b334a45a8ff	556	{
bogdanm	0:9b334a45a8ff	557	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	558	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	559	{
bogdanm	0:9b334a45a8ff	560	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	561	}
bogdanm	0:9b334a45a8ff	562
bogdanm	0:9b334a45a8ff	563	if(Size > 255)
bogdanm	0:9b334a45a8ff	564	{
bogdanm	0:9b334a45a8ff	565	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	566	sizetmp = 255;
bogdanm	0:9b334a45a8ff	567	}
bogdanm	0:9b334a45a8ff	568	else
bogdanm	0:9b334a45a8ff	569	{
bogdanm	0:9b334a45a8ff	570	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	571	sizetmp = Size;
bogdanm	0:9b334a45a8ff	572	}
bogdanm	0:9b334a45a8ff	573	}
bogdanm	0:9b334a45a8ff	574
bogdanm	0:9b334a45a8ff	575	}while(Size > 0);
bogdanm	0:9b334a45a8ff	576
bogdanm	0:9b334a45a8ff	577	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	578	/* Wait until STOPF flag is set */
bogdanm	0:9b334a45a8ff	579	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	580	{
bogdanm	0:9b334a45a8ff	581	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	582	{
bogdanm	0:9b334a45a8ff	583	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	584	}
bogdanm	0:9b334a45a8ff	585	else
bogdanm	0:9b334a45a8ff	586	{
bogdanm	0:9b334a45a8ff	587	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	588	}
bogdanm	0:9b334a45a8ff	589	}
bogdanm	0:9b334a45a8ff	590
bogdanm	0:9b334a45a8ff	591	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	592	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	593
bogdanm	0:9b334a45a8ff	594	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	595	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	596
bogdanm	0:9b334a45a8ff	597	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	598
bogdanm	0:9b334a45a8ff	599	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	600	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	601
bogdanm	0:9b334a45a8ff	602	return HAL_OK;
bogdanm	0:9b334a45a8ff	603	}
bogdanm	0:9b334a45a8ff	604	else
bogdanm	0:9b334a45a8ff	605	{
bogdanm	0:9b334a45a8ff	606	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	607	}
bogdanm	0:9b334a45a8ff	608	}
bogdanm	0:9b334a45a8ff	609
bogdanm	0:9b334a45a8ff	610	/**
bogdanm	0:9b334a45a8ff	611	* @brief Receives in master mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	612	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	613	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	614	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	615	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	616	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	617	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	618	* @retval HAL status
bogdanm	0:9b334a45a8ff	619	*/
bogdanm	0:9b334a45a8ff	620	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	621	{
bogdanm	0:9b334a45a8ff	622	uint32_t sizetmp = 0;
bogdanm	0:9b334a45a8ff	623
bogdanm	0:9b334a45a8ff	624	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	625	{
bogdanm	0:9b334a45a8ff	626	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	627	{
bogdanm	0:9b334a45a8ff	628	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	629	}
bogdanm	0:9b334a45a8ff	630
bogdanm	0:9b334a45a8ff	631	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	632	{
bogdanm	0:9b334a45a8ff	633	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	634	}
bogdanm	0:9b334a45a8ff	635
bogdanm	0:9b334a45a8ff	636	/* Process Locked */
bogdanm	0:9b334a45a8ff	637	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	638
bogdanm	0:9b334a45a8ff	639	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm	0:9b334a45a8ff	640	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	641
bogdanm	0:9b334a45a8ff	642	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	643	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	644	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	645	if(Size > 255)
bogdanm	0:9b334a45a8ff	646	{
bogdanm	0:9b334a45a8ff	647	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	648	sizetmp = 255;
bogdanm	0:9b334a45a8ff	649	}
bogdanm	0:9b334a45a8ff	650	else
bogdanm	0:9b334a45a8ff	651	{
bogdanm	0:9b334a45a8ff	652	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	653	sizetmp = Size;
bogdanm	0:9b334a45a8ff	654	}
bogdanm	0:9b334a45a8ff	655
bogdanm	0:9b334a45a8ff	656	do
bogdanm	0:9b334a45a8ff	657	{
bogdanm	0:9b334a45a8ff	658	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	659	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	660	{
bogdanm	0:9b334a45a8ff	661	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	662	}
bogdanm	0:9b334a45a8ff	663
bogdanm	0:9b334a45a8ff	664	/* Write data to RXDR */
bogdanm	0:9b334a45a8ff	665	(*pData++) =hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	666	sizetmp--;
bogdanm	0:9b334a45a8ff	667	Size--;
bogdanm	0:9b334a45a8ff	668
bogdanm	0:9b334a45a8ff	669	if((sizetmp == 0)&&(Size!=0))
bogdanm	0:9b334a45a8ff	670	{
bogdanm	0:9b334a45a8ff	671	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	672	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	673	{
bogdanm	0:9b334a45a8ff	674	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	675	}
bogdanm	0:9b334a45a8ff	676
bogdanm	0:9b334a45a8ff	677	if(Size > 255)
bogdanm	0:9b334a45a8ff	678	{
bogdanm	0:9b334a45a8ff	679	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	680	sizetmp = 255;
bogdanm	0:9b334a45a8ff	681	}
bogdanm	0:9b334a45a8ff	682	else
bogdanm	0:9b334a45a8ff	683	{
bogdanm	0:9b334a45a8ff	684	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	685	sizetmp = Size;
bogdanm	0:9b334a45a8ff	686	}
bogdanm	0:9b334a45a8ff	687	}
bogdanm	0:9b334a45a8ff	688
bogdanm	0:9b334a45a8ff	689	}while(Size > 0);
bogdanm	0:9b334a45a8ff	690
bogdanm	0:9b334a45a8ff	691	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	692	/* Wait until STOPF flag is set */
bogdanm	0:9b334a45a8ff	693	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	694	{
bogdanm	0:9b334a45a8ff	695	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	696	{
bogdanm	0:9b334a45a8ff	697	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	698	}
bogdanm	0:9b334a45a8ff	699	else
bogdanm	0:9b334a45a8ff	700	{
bogdanm	0:9b334a45a8ff	701	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	702	}
bogdanm	0:9b334a45a8ff	703	}
bogdanm	0:9b334a45a8ff	704
bogdanm	0:9b334a45a8ff	705	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	706	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	707
bogdanm	0:9b334a45a8ff	708	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	709	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	710
bogdanm	0:9b334a45a8ff	711	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	712
bogdanm	0:9b334a45a8ff	713	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	714	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	715
bogdanm	0:9b334a45a8ff	716	return HAL_OK;
bogdanm	0:9b334a45a8ff	717	}
bogdanm	0:9b334a45a8ff	718	else
bogdanm	0:9b334a45a8ff	719	{
bogdanm	0:9b334a45a8ff	720	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	721	}
bogdanm	0:9b334a45a8ff	722	}
bogdanm	0:9b334a45a8ff	723
bogdanm	0:9b334a45a8ff	724	/**
bogdanm	0:9b334a45a8ff	725	* @brief Transmits in slave mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	726	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	727	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	728	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	729	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	730	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	731	* @retval HAL status
bogdanm	0:9b334a45a8ff	732	*/
bogdanm	0:9b334a45a8ff	733	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	734	{
bogdanm	0:9b334a45a8ff	735	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	736	{
bogdanm	0:9b334a45a8ff	737	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	738	{
bogdanm	0:9b334a45a8ff	739	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	740	}
bogdanm	0:9b334a45a8ff	741
bogdanm	0:9b334a45a8ff	742	/* Process Locked */
bogdanm	0:9b334a45a8ff	743	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	744
bogdanm	0:9b334a45a8ff	745	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm	0:9b334a45a8ff	746	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	747
bogdanm	0:9b334a45a8ff	748	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	749	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	750
bogdanm	0:9b334a45a8ff	751	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	752	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	753	{
bogdanm	0:9b334a45a8ff	754	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	755	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	756	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	757	}
bogdanm	0:9b334a45a8ff	758
bogdanm	0:9b334a45a8ff	759	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	760	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	761
bogdanm	0:9b334a45a8ff	762	/* If 10bit addressing mode is selected */
bogdanm	0:9b334a45a8ff	763	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm	0:9b334a45a8ff	764	{
bogdanm	0:9b334a45a8ff	765	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	766	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	767	{
bogdanm	0:9b334a45a8ff	768	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	769	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	770	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	771	}
bogdanm	0:9b334a45a8ff	772
bogdanm	0:9b334a45a8ff	773	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	774	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	775	}
bogdanm	0:9b334a45a8ff	776
bogdanm	0:9b334a45a8ff	777	/* Wait until DIR flag is set Transmitter mode */
bogdanm	0:9b334a45a8ff	778	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	779	{
bogdanm	0:9b334a45a8ff	780	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	781	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	782	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	783	}
bogdanm	0:9b334a45a8ff	784
bogdanm	0:9b334a45a8ff	785	do
bogdanm	0:9b334a45a8ff	786	{
bogdanm	0:9b334a45a8ff	787	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	788	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	789	{
bogdanm	0:9b334a45a8ff	790	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	791	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	792
bogdanm	0:9b334a45a8ff	793	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	794	{
bogdanm	0:9b334a45a8ff	795	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	796	}
bogdanm	0:9b334a45a8ff	797	else
bogdanm	0:9b334a45a8ff	798	{
bogdanm	0:9b334a45a8ff	799	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	800	}
bogdanm	0:9b334a45a8ff	801	}
bogdanm	0:9b334a45a8ff	802
bogdanm	0:9b334a45a8ff	803	/* Read data from TXDR */
bogdanm	0:9b334a45a8ff	804	hi2c->Instance->TXDR = (*pData++);
bogdanm	0:9b334a45a8ff	805	Size--;
bogdanm	0:9b334a45a8ff	806	}while(Size > 0);
bogdanm	0:9b334a45a8ff	807
bogdanm	0:9b334a45a8ff	808	/* Wait until STOP flag is set */
bogdanm	0:9b334a45a8ff	809	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	810	{
bogdanm	0:9b334a45a8ff	811	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	812	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	813
bogdanm	0:9b334a45a8ff	814	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	815	{
bogdanm	0:9b334a45a8ff	816	/* Normal use case for Transmitter mode */
bogdanm	0:9b334a45a8ff	817	/* A NACK is generated to confirm the end of transfer */
bogdanm	0:9b334a45a8ff	818	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	819	}
bogdanm	0:9b334a45a8ff	820	else
bogdanm	0:9b334a45a8ff	821	{
bogdanm	0:9b334a45a8ff	822	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	823	}
bogdanm	0:9b334a45a8ff	824	}
bogdanm	0:9b334a45a8ff	825
bogdanm	0:9b334a45a8ff	826	/* Clear STOP flag */
bogdanm	0:9b334a45a8ff	827	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	828
bogdanm	0:9b334a45a8ff	829	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	830	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	831	{
bogdanm	0:9b334a45a8ff	832	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	833	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	834	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	835	}
bogdanm	0:9b334a45a8ff	836
bogdanm	0:9b334a45a8ff	837	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	838	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	839
bogdanm	0:9b334a45a8ff	840	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	841
bogdanm	0:9b334a45a8ff	842	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	843	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	844
bogdanm	0:9b334a45a8ff	845	return HAL_OK;
bogdanm	0:9b334a45a8ff	846	}
bogdanm	0:9b334a45a8ff	847	else
bogdanm	0:9b334a45a8ff	848	{
bogdanm	0:9b334a45a8ff	849	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	850	}
bogdanm	0:9b334a45a8ff	851	}
bogdanm	0:9b334a45a8ff	852
bogdanm	0:9b334a45a8ff	853	/**
bogdanm	0:9b334a45a8ff	854	* @brief Receive in slave mode an amount of data in blocking mode
bogdanm	0:9b334a45a8ff	855	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	856	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	857	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	858	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	859	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	860	* @retval HAL status
bogdanm	0:9b334a45a8ff	861	*/
bogdanm	0:9b334a45a8ff	862	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	863	{
bogdanm	0:9b334a45a8ff	864	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	865	{
bogdanm	0:9b334a45a8ff	866	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	867	{
bogdanm	0:9b334a45a8ff	868	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	869	}
bogdanm	0:9b334a45a8ff	870
bogdanm	0:9b334a45a8ff	871	/* Process Locked */
bogdanm	0:9b334a45a8ff	872	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	873
bogdanm	0:9b334a45a8ff	874	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm	0:9b334a45a8ff	875	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	876
bogdanm	0:9b334a45a8ff	877	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	878	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	879
bogdanm	0:9b334a45a8ff	880	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	881	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	882	{
bogdanm	0:9b334a45a8ff	883	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	884	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	885	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	886	}
bogdanm	0:9b334a45a8ff	887
bogdanm	0:9b334a45a8ff	888	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	889	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	890
bogdanm	0:9b334a45a8ff	891	/* Wait until DIR flag is reset Receiver mode */
bogdanm	0:9b334a45a8ff	892	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	893	{
bogdanm	0:9b334a45a8ff	894	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	895	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	896	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	897	}
bogdanm	0:9b334a45a8ff	898
bogdanm	0:9b334a45a8ff	899	while(Size > 0)
bogdanm	0:9b334a45a8ff	900	{
bogdanm	0:9b334a45a8ff	901	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	902	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	903	{
bogdanm	0:9b334a45a8ff	904	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	905	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	906	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
bogdanm	0:9b334a45a8ff	907	{
bogdanm	0:9b334a45a8ff	908	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	909	}
bogdanm	0:9b334a45a8ff	910	else
bogdanm	0:9b334a45a8ff	911	{
bogdanm	0:9b334a45a8ff	912	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	913	}
bogdanm	0:9b334a45a8ff	914	}
bogdanm	0:9b334a45a8ff	915
bogdanm	0:9b334a45a8ff	916	/* Read data from RXDR */
bogdanm	0:9b334a45a8ff	917	(*pData++) = hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	918	Size--;
bogdanm	0:9b334a45a8ff	919	}
bogdanm	0:9b334a45a8ff	920
bogdanm	0:9b334a45a8ff	921	/* Wait until STOP flag is set */
bogdanm	0:9b334a45a8ff	922	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	923	{
bogdanm	0:9b334a45a8ff	924	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	925	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	926
bogdanm	0:9b334a45a8ff	927	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	928	{
bogdanm	0:9b334a45a8ff	929	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	930	}
bogdanm	0:9b334a45a8ff	931	else
bogdanm	0:9b334a45a8ff	932	{
bogdanm	0:9b334a45a8ff	933	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	934	}
bogdanm	0:9b334a45a8ff	935	}
bogdanm	0:9b334a45a8ff	936
bogdanm	0:9b334a45a8ff	937	/* Clear STOP flag */
bogdanm	0:9b334a45a8ff	938	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	939
bogdanm	0:9b334a45a8ff	940	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	941	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	942	{
bogdanm	0:9b334a45a8ff	943	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	944	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	945	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	946	}
bogdanm	0:9b334a45a8ff	947
bogdanm	0:9b334a45a8ff	948
bogdanm	0:9b334a45a8ff	949	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	950	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	951
bogdanm	0:9b334a45a8ff	952	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	953
bogdanm	0:9b334a45a8ff	954	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	955	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	956
bogdanm	0:9b334a45a8ff	957	return HAL_OK;
bogdanm	0:9b334a45a8ff	958	}
bogdanm	0:9b334a45a8ff	959	else
bogdanm	0:9b334a45a8ff	960	{
bogdanm	0:9b334a45a8ff	961	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	962	}
bogdanm	0:9b334a45a8ff	963	}
bogdanm	0:9b334a45a8ff	964
bogdanm	0:9b334a45a8ff	965	/**
bogdanm	0:9b334a45a8ff	966	* @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	967	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	968	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	969	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	970	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	971	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	972	* @retval HAL status
bogdanm	0:9b334a45a8ff	973	*/
bogdanm	0:9b334a45a8ff	974	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	975	{
bogdanm	0:9b334a45a8ff	976	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	977	{
bogdanm	0:9b334a45a8ff	978	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	979	{
bogdanm	0:9b334a45a8ff	980	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	981	}
bogdanm	0:9b334a45a8ff	982
bogdanm	0:9b334a45a8ff	983	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	984	{
bogdanm	0:9b334a45a8ff	985	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	986	}
bogdanm	0:9b334a45a8ff	987
bogdanm	0:9b334a45a8ff	988	/* Process Locked */
bogdanm	0:9b334a45a8ff	989	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	990
bogdanm	0:9b334a45a8ff	991	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm	0:9b334a45a8ff	992	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	993
bogdanm	0:9b334a45a8ff	994	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	995	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	996	if(Size > 255)
bogdanm	0:9b334a45a8ff	997	{
bogdanm	0:9b334a45a8ff	998	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	999	}
bogdanm	0:9b334a45a8ff	1000	else
bogdanm	0:9b334a45a8ff	1001	{
bogdanm	0:9b334a45a8ff	1002	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1003	}
bogdanm	0:9b334a45a8ff	1004
bogdanm	0:9b334a45a8ff	1005	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1006	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1007	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1008	{
bogdanm	0:9b334a45a8ff	1009	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	1010	}
bogdanm	0:9b334a45a8ff	1011	else
bogdanm	0:9b334a45a8ff	1012	{
bogdanm	0:9b334a45a8ff	1013	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	1014	}
bogdanm	0:9b334a45a8ff	1015
bogdanm	0:9b334a45a8ff	1016	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1017	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1018
bogdanm	0:9b334a45a8ff	1019	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1020	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1021	process unlock */
bogdanm	0:9b334a45a8ff	1022
bogdanm	0:9b334a45a8ff	1023
bogdanm	0:9b334a45a8ff	1024	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	1025	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1026	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1027	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_TXI );
bogdanm	0:9b334a45a8ff	1028
bogdanm	0:9b334a45a8ff	1029	return HAL_OK;
bogdanm	0:9b334a45a8ff	1030	}
bogdanm	0:9b334a45a8ff	1031	else
bogdanm	0:9b334a45a8ff	1032	{
bogdanm	0:9b334a45a8ff	1033	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1034	}
bogdanm	0:9b334a45a8ff	1035	}
bogdanm	0:9b334a45a8ff	1036
bogdanm	0:9b334a45a8ff	1037	/**
bogdanm	0:9b334a45a8ff	1038	* @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1039	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1040	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1041	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1042	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1043	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1044	* @retval HAL status
bogdanm	0:9b334a45a8ff	1045	*/
bogdanm	0:9b334a45a8ff	1046	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1047	{
bogdanm	0:9b334a45a8ff	1048	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1049	{
bogdanm	0:9b334a45a8ff	1050	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1051	{
bogdanm	0:9b334a45a8ff	1052	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1053	}
bogdanm	0:9b334a45a8ff	1054
bogdanm	0:9b334a45a8ff	1055	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1056	{
bogdanm	0:9b334a45a8ff	1057	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1058	}
bogdanm	0:9b334a45a8ff	1059
bogdanm	0:9b334a45a8ff	1060	/* Process Locked */
bogdanm	0:9b334a45a8ff	1061	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1062
bogdanm	0:9b334a45a8ff	1063	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm	0:9b334a45a8ff	1064	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1065
bogdanm	0:9b334a45a8ff	1066	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1067	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1068	if(Size > 255)
bogdanm	0:9b334a45a8ff	1069	{
bogdanm	0:9b334a45a8ff	1070	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1071	}
bogdanm	0:9b334a45a8ff	1072	else
bogdanm	0:9b334a45a8ff	1073	{
bogdanm	0:9b334a45a8ff	1074	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1075	}
bogdanm	0:9b334a45a8ff	1076
bogdanm	0:9b334a45a8ff	1077	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1078	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1079	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1080	{
bogdanm	0:9b334a45a8ff	1081	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1082	}
bogdanm	0:9b334a45a8ff	1083	else
bogdanm	0:9b334a45a8ff	1084	{
bogdanm	0:9b334a45a8ff	1085	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1086	}
bogdanm	0:9b334a45a8ff	1087
bogdanm	0:9b334a45a8ff	1088	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1089	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1090
bogdanm	0:9b334a45a8ff	1091	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1092	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1093	process unlock */
bogdanm	0:9b334a45a8ff	1094
bogdanm	0:9b334a45a8ff	1095	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm	0:9b334a45a8ff	1096	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1097	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1098	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_RXI );
bogdanm	0:9b334a45a8ff	1099
bogdanm	0:9b334a45a8ff	1100	return HAL_OK;
bogdanm	0:9b334a45a8ff	1101	}
bogdanm	0:9b334a45a8ff	1102	else
bogdanm	0:9b334a45a8ff	1103	{
bogdanm	0:9b334a45a8ff	1104	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1105	}
bogdanm	0:9b334a45a8ff	1106	}
bogdanm	0:9b334a45a8ff	1107
bogdanm	0:9b334a45a8ff	1108	/**
bogdanm	0:9b334a45a8ff	1109	* @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1110	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1111	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1112	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1113	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1114	* @retval HAL status
bogdanm	0:9b334a45a8ff	1115	*/
bogdanm	0:9b334a45a8ff	1116	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1117	{
bogdanm	0:9b334a45a8ff	1118	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1119	{
bogdanm	0:9b334a45a8ff	1120	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1121	{
bogdanm	0:9b334a45a8ff	1122	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1123	}
bogdanm	0:9b334a45a8ff	1124
bogdanm	0:9b334a45a8ff	1125	/* Process Locked */
bogdanm	0:9b334a45a8ff	1126	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1127
bogdanm	0:9b334a45a8ff	1128	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1129	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1130
bogdanm	0:9b334a45a8ff	1131	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1132	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1133
bogdanm	0:9b334a45a8ff	1134	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1135	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1136	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1137
bogdanm	0:9b334a45a8ff	1138	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1139	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1140
bogdanm	0:9b334a45a8ff	1141	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1142	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1143	process unlock */
bogdanm	0:9b334a45a8ff	1144
bogdanm	0:9b334a45a8ff	1145	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	1146	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1147	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1148	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_TXI );
bogdanm	0:9b334a45a8ff	1149
bogdanm	0:9b334a45a8ff	1150	return HAL_OK;
bogdanm	0:9b334a45a8ff	1151	}
bogdanm	0:9b334a45a8ff	1152	else
bogdanm	0:9b334a45a8ff	1153	{
bogdanm	0:9b334a45a8ff	1154	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1155	}
bogdanm	0:9b334a45a8ff	1156	}
bogdanm	0:9b334a45a8ff	1157
bogdanm	0:9b334a45a8ff	1158	/**
bogdanm	0:9b334a45a8ff	1159	* @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1160	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1161	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1162	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1163	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1164	* @retval HAL status
bogdanm	0:9b334a45a8ff	1165	*/
bogdanm	0:9b334a45a8ff	1166	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1167	{
bogdanm	0:9b334a45a8ff	1168	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1169	{
bogdanm	0:9b334a45a8ff	1170	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1171	{
bogdanm	0:9b334a45a8ff	1172	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1173	}
bogdanm	0:9b334a45a8ff	1174
bogdanm	0:9b334a45a8ff	1175	/* Process Locked */
bogdanm	0:9b334a45a8ff	1176	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1177
bogdanm	0:9b334a45a8ff	1178	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1179	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1180
bogdanm	0:9b334a45a8ff	1181	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1182	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1183
bogdanm	0:9b334a45a8ff	1184	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1185	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1186	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1187
bogdanm	0:9b334a45a8ff	1188	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1189	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1190
bogdanm	0:9b334a45a8ff	1191	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1192	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1193	process unlock */
bogdanm	0:9b334a45a8ff	1194
bogdanm	0:9b334a45a8ff	1195	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm	0:9b334a45a8ff	1196	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1197	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1198	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI);
bogdanm	0:9b334a45a8ff	1199
bogdanm	0:9b334a45a8ff	1200	return HAL_OK;
bogdanm	0:9b334a45a8ff	1201	}
bogdanm	0:9b334a45a8ff	1202	else
bogdanm	0:9b334a45a8ff	1203	{
bogdanm	0:9b334a45a8ff	1204	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1205	}
bogdanm	0:9b334a45a8ff	1206	}
bogdanm	0:9b334a45a8ff	1207
bogdanm	0:9b334a45a8ff	1208	/**
bogdanm	0:9b334a45a8ff	1209	* @brief Transmit in master mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1210	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1211	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1212	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1213	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1214	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1215	* @retval HAL status
bogdanm	0:9b334a45a8ff	1216	*/
bogdanm	0:9b334a45a8ff	1217	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1218	{
bogdanm	0:9b334a45a8ff	1219	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1220	{
bogdanm	0:9b334a45a8ff	1221	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1222	{
bogdanm	0:9b334a45a8ff	1223	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1224	}
bogdanm	0:9b334a45a8ff	1225
bogdanm	0:9b334a45a8ff	1226	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1227	{
bogdanm	0:9b334a45a8ff	1228	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1229	}
bogdanm	0:9b334a45a8ff	1230
bogdanm	0:9b334a45a8ff	1231	/* Process Locked */
bogdanm	0:9b334a45a8ff	1232	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1233
bogdanm	0:9b334a45a8ff	1234	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm	0:9b334a45a8ff	1235	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1236
bogdanm	0:9b334a45a8ff	1237	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1238	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1239	if(Size > 255)
bogdanm	0:9b334a45a8ff	1240	{
bogdanm	0:9b334a45a8ff	1241	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1242	}
bogdanm	0:9b334a45a8ff	1243	else
bogdanm	0:9b334a45a8ff	1244	{
bogdanm	0:9b334a45a8ff	1245	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1246	}
bogdanm	0:9b334a45a8ff	1247
bogdanm	0:9b334a45a8ff	1248	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1249	hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
bogdanm	0:9b334a45a8ff	1250
bogdanm	0:9b334a45a8ff	1251	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1252	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1253
bogdanm	0:9b334a45a8ff	1254	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1255	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	1256
bogdanm	0:9b334a45a8ff	1257	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1258	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1259	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1260	{
bogdanm	0:9b334a45a8ff	1261	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	1262	}
bogdanm	0:9b334a45a8ff	1263	else
bogdanm	0:9b334a45a8ff	1264	{
bogdanm	0:9b334a45a8ff	1265	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	1266	}
bogdanm	0:9b334a45a8ff	1267
bogdanm	0:9b334a45a8ff	1268	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	1269	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm	0:9b334a45a8ff	1270	{
bogdanm	0:9b334a45a8ff	1271	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1272	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1273
bogdanm	0:9b334a45a8ff	1274	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1275	{
bogdanm	0:9b334a45a8ff	1276	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1277	}
bogdanm	0:9b334a45a8ff	1278	else
bogdanm	0:9b334a45a8ff	1279	{
bogdanm	0:9b334a45a8ff	1280	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1281	}
bogdanm	0:9b334a45a8ff	1282	}
bogdanm	0:9b334a45a8ff	1283
bogdanm	0:9b334a45a8ff	1284
bogdanm	0:9b334a45a8ff	1285	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1286	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	1287
bogdanm	0:9b334a45a8ff	1288	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1289	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1290
bogdanm	0:9b334a45a8ff	1291	return HAL_OK;
bogdanm	0:9b334a45a8ff	1292	}
bogdanm	0:9b334a45a8ff	1293	else
bogdanm	0:9b334a45a8ff	1294	{
bogdanm	0:9b334a45a8ff	1295	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1296	}
bogdanm	0:9b334a45a8ff	1297	}
bogdanm	0:9b334a45a8ff	1298
bogdanm	0:9b334a45a8ff	1299	/**
bogdanm	0:9b334a45a8ff	1300	* @brief Receive in master mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1301	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1302	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1303	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1304	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1305	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1306	* @retval HAL status
bogdanm	0:9b334a45a8ff	1307	*/
bogdanm	0:9b334a45a8ff	1308	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1309	{
bogdanm	0:9b334a45a8ff	1310	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1311	{
bogdanm	0:9b334a45a8ff	1312	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1313	{
bogdanm	0:9b334a45a8ff	1314	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1315	}
bogdanm	0:9b334a45a8ff	1316
bogdanm	0:9b334a45a8ff	1317	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1318	{
bogdanm	0:9b334a45a8ff	1319	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1320	}
bogdanm	0:9b334a45a8ff	1321
bogdanm	0:9b334a45a8ff	1322	/* Process Locked */
bogdanm	0:9b334a45a8ff	1323	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1324
bogdanm	0:9b334a45a8ff	1325	hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm	0:9b334a45a8ff	1326	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1327
bogdanm	0:9b334a45a8ff	1328	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1329	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1330	if(Size > 255)
bogdanm	0:9b334a45a8ff	1331	{
bogdanm	0:9b334a45a8ff	1332	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1333	}
bogdanm	0:9b334a45a8ff	1334	else
bogdanm	0:9b334a45a8ff	1335	{
bogdanm	0:9b334a45a8ff	1336	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1337	}
bogdanm	0:9b334a45a8ff	1338
bogdanm	0:9b334a45a8ff	1339	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1340	hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
bogdanm	0:9b334a45a8ff	1341
bogdanm	0:9b334a45a8ff	1342	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1343	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1344
bogdanm	0:9b334a45a8ff	1345	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1346	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	1347
bogdanm	0:9b334a45a8ff	1348	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1349	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1350	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1351	{
bogdanm	0:9b334a45a8ff	1352	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1353	}
bogdanm	0:9b334a45a8ff	1354	else
bogdanm	0:9b334a45a8ff	1355	{
bogdanm	0:9b334a45a8ff	1356	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1357	}
bogdanm	0:9b334a45a8ff	1358
bogdanm	0:9b334a45a8ff	1359	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	1360	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1361	{
bogdanm	0:9b334a45a8ff	1362	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1363	}
bogdanm	0:9b334a45a8ff	1364
bogdanm	0:9b334a45a8ff	1365
bogdanm	0:9b334a45a8ff	1366	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1367	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	1368
bogdanm	0:9b334a45a8ff	1369	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1370	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1371
bogdanm	0:9b334a45a8ff	1372	return HAL_OK;
bogdanm	0:9b334a45a8ff	1373	}
bogdanm	0:9b334a45a8ff	1374	else
bogdanm	0:9b334a45a8ff	1375	{
bogdanm	0:9b334a45a8ff	1376	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1377	}
bogdanm	0:9b334a45a8ff	1378	}
bogdanm	0:9b334a45a8ff	1379
bogdanm	0:9b334a45a8ff	1380	/**
bogdanm	0:9b334a45a8ff	1381	* @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1382	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1383	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1384	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1385	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1386	* @retval HAL status
bogdanm	0:9b334a45a8ff	1387	*/
bogdanm	0:9b334a45a8ff	1388	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1389	{
bogdanm	0:9b334a45a8ff	1390	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1391	{
bogdanm	0:9b334a45a8ff	1392	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1393	{
bogdanm	0:9b334a45a8ff	1394	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1395	}
bogdanm	0:9b334a45a8ff	1396	/* Process Locked */
bogdanm	0:9b334a45a8ff	1397	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1398
bogdanm	0:9b334a45a8ff	1399	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1400	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1401
bogdanm	0:9b334a45a8ff	1402	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1403	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1404	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1405
bogdanm	0:9b334a45a8ff	1406	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1407	hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
bogdanm	0:9b334a45a8ff	1408
bogdanm	0:9b334a45a8ff	1409	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1410	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1411
bogdanm	0:9b334a45a8ff	1412	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1413	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	1414
bogdanm	0:9b334a45a8ff	1415	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1416	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1417
bogdanm	0:9b334a45a8ff	1418	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1419	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm	0:9b334a45a8ff	1420	{
bogdanm	0:9b334a45a8ff	1421	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1422	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1423	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1424	}
bogdanm	0:9b334a45a8ff	1425
bogdanm	0:9b334a45a8ff	1426	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1427	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	1428
bogdanm	0:9b334a45a8ff	1429	/* If 10bits addressing mode is selected */
bogdanm	0:9b334a45a8ff	1430	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm	0:9b334a45a8ff	1431	{
bogdanm	0:9b334a45a8ff	1432	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1433	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm	0:9b334a45a8ff	1434	{
bogdanm	0:9b334a45a8ff	1435	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1436	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1437	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1438	}
bogdanm	0:9b334a45a8ff	1439
bogdanm	0:9b334a45a8ff	1440	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1441	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	1442	}
bogdanm	0:9b334a45a8ff	1443
bogdanm	0:9b334a45a8ff	1444	/* Wait until DIR flag is set Transmitter mode */
bogdanm	0:9b334a45a8ff	1445	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm	0:9b334a45a8ff	1446	{
bogdanm	0:9b334a45a8ff	1447	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1448	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1449	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1450	}
bogdanm	0:9b334a45a8ff	1451
bogdanm	0:9b334a45a8ff	1452	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1453	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	1454
bogdanm	0:9b334a45a8ff	1455	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1456	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1457
bogdanm	0:9b334a45a8ff	1458	return HAL_OK;
bogdanm	0:9b334a45a8ff	1459	}
bogdanm	0:9b334a45a8ff	1460	else
bogdanm	0:9b334a45a8ff	1461	{
bogdanm	0:9b334a45a8ff	1462	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1463	}
bogdanm	0:9b334a45a8ff	1464	}
bogdanm	0:9b334a45a8ff	1465
bogdanm	0:9b334a45a8ff	1466	/**
bogdanm	0:9b334a45a8ff	1467	* @brief Receive in slave mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1468	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1469	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1470	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1471	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1472	* @retval HAL status
bogdanm	0:9b334a45a8ff	1473	*/
bogdanm	0:9b334a45a8ff	1474	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1475	{
bogdanm	0:9b334a45a8ff	1476	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1477	{
bogdanm	0:9b334a45a8ff	1478	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1479	{
bogdanm	0:9b334a45a8ff	1480	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1481	}
bogdanm	0:9b334a45a8ff	1482	/* Process Locked */
bogdanm	0:9b334a45a8ff	1483	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1484
bogdanm	0:9b334a45a8ff	1485	hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1486	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1487
bogdanm	0:9b334a45a8ff	1488	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1489	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1490	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1491
bogdanm	0:9b334a45a8ff	1492	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1493	hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
bogdanm	0:9b334a45a8ff	1494
bogdanm	0:9b334a45a8ff	1495	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1496	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1497
bogdanm	0:9b334a45a8ff	1498	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1499	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, Size);
bogdanm	0:9b334a45a8ff	1500
bogdanm	0:9b334a45a8ff	1501	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1502	hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1503
bogdanm	0:9b334a45a8ff	1504	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1505	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm	0:9b334a45a8ff	1506	{
bogdanm	0:9b334a45a8ff	1507	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1508	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1509	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1510	}
bogdanm	0:9b334a45a8ff	1511
bogdanm	0:9b334a45a8ff	1512	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1513	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	1514
bogdanm	0:9b334a45a8ff	1515	/* Wait until DIR flag is set Receiver mode */
bogdanm	0:9b334a45a8ff	1516	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, I2C_TIMEOUT_DIR) != HAL_OK)
bogdanm	0:9b334a45a8ff	1517	{
bogdanm	0:9b334a45a8ff	1518	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1519	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	1520	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1521	}
bogdanm	0:9b334a45a8ff	1522
bogdanm	0:9b334a45a8ff	1523	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1524	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	1525
bogdanm	0:9b334a45a8ff	1526	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1527	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1528
bogdanm	0:9b334a45a8ff	1529	return HAL_OK;
bogdanm	0:9b334a45a8ff	1530	}
bogdanm	0:9b334a45a8ff	1531	else
bogdanm	0:9b334a45a8ff	1532	{
bogdanm	0:9b334a45a8ff	1533	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1534	}
bogdanm	0:9b334a45a8ff	1535	}
bogdanm	0:9b334a45a8ff	1536	/**
bogdanm	0:9b334a45a8ff	1537	* @brief Write an amount of data in blocking mode to a specific memory address
bogdanm	0:9b334a45a8ff	1538	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1539	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1540	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1541	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1542	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1543	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1544	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1545	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1546	* @retval HAL status
bogdanm	0:9b334a45a8ff	1547	*/
bogdanm	0:9b334a45a8ff	1548	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1549	{
bogdanm	0:9b334a45a8ff	1550	uint32_t Sizetmp = 0;
bogdanm	0:9b334a45a8ff	1551
bogdanm	0:9b334a45a8ff	1552	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1553	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1554
bogdanm	0:9b334a45a8ff	1555	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1556	{
bogdanm	0:9b334a45a8ff	1557	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1558	{
bogdanm	0:9b334a45a8ff	1559	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1560	}
bogdanm	0:9b334a45a8ff	1561
bogdanm	0:9b334a45a8ff	1562	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1563	{
bogdanm	0:9b334a45a8ff	1564	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1565	}
bogdanm	0:9b334a45a8ff	1566
bogdanm	0:9b334a45a8ff	1567	/* Process Locked */
bogdanm	0:9b334a45a8ff	1568	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1569
bogdanm	0:9b334a45a8ff	1570	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	1571	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1572
bogdanm	0:9b334a45a8ff	1573	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1574	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1575	{
bogdanm	0:9b334a45a8ff	1576	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1577	{
bogdanm	0:9b334a45a8ff	1578	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1579	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1580	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1581	}
bogdanm	0:9b334a45a8ff	1582	else
bogdanm	0:9b334a45a8ff	1583	{
bogdanm	0:9b334a45a8ff	1584	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1585	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1586	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1587	}
bogdanm	0:9b334a45a8ff	1588	}
bogdanm	0:9b334a45a8ff	1589
bogdanm	0:9b334a45a8ff	1590	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	1591	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	1592	if(Size > 255)
bogdanm	0:9b334a45a8ff	1593	{
bogdanm	0:9b334a45a8ff	1594	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1595	Sizetmp = 255;
bogdanm	0:9b334a45a8ff	1596	}
bogdanm	0:9b334a45a8ff	1597	else
bogdanm	0:9b334a45a8ff	1598	{
bogdanm	0:9b334a45a8ff	1599	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1600	Sizetmp = Size;
bogdanm	0:9b334a45a8ff	1601	}
bogdanm	0:9b334a45a8ff	1602
bogdanm	0:9b334a45a8ff	1603	do
bogdanm	0:9b334a45a8ff	1604	{
bogdanm	0:9b334a45a8ff	1605	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	1606	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1607	{
bogdanm	0:9b334a45a8ff	1608	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1609	{
bogdanm	0:9b334a45a8ff	1610	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1611	}
bogdanm	0:9b334a45a8ff	1612	else
bogdanm	0:9b334a45a8ff	1613	{
bogdanm	0:9b334a45a8ff	1614	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1615	}
bogdanm	0:9b334a45a8ff	1616	}
bogdanm	0:9b334a45a8ff	1617
bogdanm	0:9b334a45a8ff	1618	/* Write data to DR */
bogdanm	0:9b334a45a8ff	1619	hi2c->Instance->TXDR = (*pData++);
bogdanm	0:9b334a45a8ff	1620	Sizetmp--;
bogdanm	0:9b334a45a8ff	1621	Size--;
bogdanm	0:9b334a45a8ff	1622
bogdanm	0:9b334a45a8ff	1623	if((Sizetmp == 0)&&(Size!=0))
bogdanm	0:9b334a45a8ff	1624	{
bogdanm	0:9b334a45a8ff	1625	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	1626	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1627	{
bogdanm	0:9b334a45a8ff	1628	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1629	}
bogdanm	0:9b334a45a8ff	1630
bogdanm	0:9b334a45a8ff	1631
bogdanm	0:9b334a45a8ff	1632	if(Size > 255)
bogdanm	0:9b334a45a8ff	1633	{
bogdanm	0:9b334a45a8ff	1634	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1635	Sizetmp = 255;
bogdanm	0:9b334a45a8ff	1636	}
bogdanm	0:9b334a45a8ff	1637	else
bogdanm	0:9b334a45a8ff	1638	{
bogdanm	0:9b334a45a8ff	1639	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1640	Sizetmp = Size;
bogdanm	0:9b334a45a8ff	1641	}
bogdanm	0:9b334a45a8ff	1642	}
bogdanm	0:9b334a45a8ff	1643
bogdanm	0:9b334a45a8ff	1644	}while(Size > 0);
bogdanm	0:9b334a45a8ff	1645
bogdanm	0:9b334a45a8ff	1646	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	1647	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	1648	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	1649	{
bogdanm	0:9b334a45a8ff	1650	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1651	{
bogdanm	0:9b334a45a8ff	1652	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1653	}
bogdanm	0:9b334a45a8ff	1654	else
bogdanm	0:9b334a45a8ff	1655	{
bogdanm	0:9b334a45a8ff	1656	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1657	}
bogdanm	0:9b334a45a8ff	1658	}
bogdanm	0:9b334a45a8ff	1659
bogdanm	0:9b334a45a8ff	1660	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	1661	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	1662
bogdanm	0:9b334a45a8ff	1663	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	1664	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	1665
bogdanm	0:9b334a45a8ff	1666	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	1667
bogdanm	0:9b334a45a8ff	1668	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1669	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1670
bogdanm	0:9b334a45a8ff	1671	return HAL_OK;
bogdanm	0:9b334a45a8ff	1672	}
bogdanm	0:9b334a45a8ff	1673	else
bogdanm	0:9b334a45a8ff	1674	{
bogdanm	0:9b334a45a8ff	1675	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1676	}
bogdanm	0:9b334a45a8ff	1677	}
bogdanm	0:9b334a45a8ff	1678
bogdanm	0:9b334a45a8ff	1679	/**
bogdanm	0:9b334a45a8ff	1680	* @brief Read an amount of data in blocking mode from a specific memory address
bogdanm	0:9b334a45a8ff	1681	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1682	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1683	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1684	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1685	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1686	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1687	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1688	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1689	* @retval HAL status
bogdanm	0:9b334a45a8ff	1690	*/
bogdanm	0:9b334a45a8ff	1691	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1692	{
bogdanm	0:9b334a45a8ff	1693	uint32_t Sizetmp = 0;
bogdanm	0:9b334a45a8ff	1694
bogdanm	0:9b334a45a8ff	1695	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1696	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1697
bogdanm	0:9b334a45a8ff	1698	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1699	{
bogdanm	0:9b334a45a8ff	1700	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1701	{
bogdanm	0:9b334a45a8ff	1702	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1703	}
bogdanm	0:9b334a45a8ff	1704
bogdanm	0:9b334a45a8ff	1705	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1706	{
bogdanm	0:9b334a45a8ff	1707	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1708	}
bogdanm	0:9b334a45a8ff	1709
bogdanm	0:9b334a45a8ff	1710	/* Process Locked */
bogdanm	0:9b334a45a8ff	1711	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1712
bogdanm	0:9b334a45a8ff	1713	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	1714	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1715
bogdanm	0:9b334a45a8ff	1716	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1717	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1718	{
bogdanm	0:9b334a45a8ff	1719	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1720	{
bogdanm	0:9b334a45a8ff	1721	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1722	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1723	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1724	}
bogdanm	0:9b334a45a8ff	1725	else
bogdanm	0:9b334a45a8ff	1726	{
bogdanm	0:9b334a45a8ff	1727	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1728	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1729	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1730	}
bogdanm	0:9b334a45a8ff	1731	}
bogdanm	0:9b334a45a8ff	1732
bogdanm	0:9b334a45a8ff	1733	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1734	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1735	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	1736	if(Size > 255)
bogdanm	0:9b334a45a8ff	1737	{
bogdanm	0:9b334a45a8ff	1738	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1739	Sizetmp = 255;
bogdanm	0:9b334a45a8ff	1740	}
bogdanm	0:9b334a45a8ff	1741	else
bogdanm	0:9b334a45a8ff	1742	{
bogdanm	0:9b334a45a8ff	1743	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1744	Sizetmp = Size;
bogdanm	0:9b334a45a8ff	1745	}
bogdanm	0:9b334a45a8ff	1746
bogdanm	0:9b334a45a8ff	1747	do
bogdanm	0:9b334a45a8ff	1748	{
bogdanm	0:9b334a45a8ff	1749	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	1750	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1751	{
bogdanm	0:9b334a45a8ff	1752	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1753	}
bogdanm	0:9b334a45a8ff	1754
bogdanm	0:9b334a45a8ff	1755	/* Read data from RXDR */
bogdanm	0:9b334a45a8ff	1756	(*pData++) = hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	1757
bogdanm	0:9b334a45a8ff	1758	/* Decrement the Size counter */
bogdanm	0:9b334a45a8ff	1759	Sizetmp--;
bogdanm	0:9b334a45a8ff	1760	Size--;
bogdanm	0:9b334a45a8ff	1761
bogdanm	0:9b334a45a8ff	1762	if((Sizetmp == 0)&&(Size!=0))
bogdanm	0:9b334a45a8ff	1763	{
bogdanm	0:9b334a45a8ff	1764	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	1765	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1766	{
bogdanm	0:9b334a45a8ff	1767	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1768	}
bogdanm	0:9b334a45a8ff	1769
bogdanm	0:9b334a45a8ff	1770	if(Size > 255)
bogdanm	0:9b334a45a8ff	1771	{
bogdanm	0:9b334a45a8ff	1772	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1773	Sizetmp = 255;
bogdanm	0:9b334a45a8ff	1774	}
bogdanm	0:9b334a45a8ff	1775	else
bogdanm	0:9b334a45a8ff	1776	{
bogdanm	0:9b334a45a8ff	1777	I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1778	Sizetmp = Size;
bogdanm	0:9b334a45a8ff	1779	}
bogdanm	0:9b334a45a8ff	1780	}
bogdanm	0:9b334a45a8ff	1781
bogdanm	0:9b334a45a8ff	1782	}while(Size > 0);
bogdanm	0:9b334a45a8ff	1783
bogdanm	0:9b334a45a8ff	1784	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	1785	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	1786	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	1787	{
bogdanm	0:9b334a45a8ff	1788	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1789	{
bogdanm	0:9b334a45a8ff	1790	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1791	}
bogdanm	0:9b334a45a8ff	1792	else
bogdanm	0:9b334a45a8ff	1793	{
bogdanm	0:9b334a45a8ff	1794	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1795	}
bogdanm	0:9b334a45a8ff	1796	}
bogdanm	0:9b334a45a8ff	1797
bogdanm	0:9b334a45a8ff	1798	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	1799	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	1800
bogdanm	0:9b334a45a8ff	1801	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	1802	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	1803
bogdanm	0:9b334a45a8ff	1804	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	1805
bogdanm	0:9b334a45a8ff	1806	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1807	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1808
bogdanm	0:9b334a45a8ff	1809	return HAL_OK;
bogdanm	0:9b334a45a8ff	1810	}
bogdanm	0:9b334a45a8ff	1811	else
bogdanm	0:9b334a45a8ff	1812	{
bogdanm	0:9b334a45a8ff	1813	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1814	}
bogdanm	0:9b334a45a8ff	1815	}
bogdanm	0:9b334a45a8ff	1816	/**
bogdanm	0:9b334a45a8ff	1817	* @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
bogdanm	0:9b334a45a8ff	1818	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1819	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1820	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1821	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1822	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1823	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1824	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1825	* @retval HAL status
bogdanm	0:9b334a45a8ff	1826	*/
bogdanm	0:9b334a45a8ff	1827	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1828	{
bogdanm	0:9b334a45a8ff	1829	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1830	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1831
bogdanm	0:9b334a45a8ff	1832	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1833	{
bogdanm	0:9b334a45a8ff	1834	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1835	{
bogdanm	0:9b334a45a8ff	1836	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1837	}
bogdanm	0:9b334a45a8ff	1838
bogdanm	0:9b334a45a8ff	1839	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1840	{
bogdanm	0:9b334a45a8ff	1841	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1842	}
bogdanm	0:9b334a45a8ff	1843
bogdanm	0:9b334a45a8ff	1844	/* Process Locked */
bogdanm	0:9b334a45a8ff	1845	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1846
bogdanm	0:9b334a45a8ff	1847	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	1848	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1849
bogdanm	0:9b334a45a8ff	1850	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1851	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1852	if(Size > 255)
bogdanm	0:9b334a45a8ff	1853	{
bogdanm	0:9b334a45a8ff	1854	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1855	}
bogdanm	0:9b334a45a8ff	1856	else
bogdanm	0:9b334a45a8ff	1857	{
bogdanm	0:9b334a45a8ff	1858	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1859	}
bogdanm	0:9b334a45a8ff	1860
bogdanm	0:9b334a45a8ff	1861	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1862	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1863	{
bogdanm	0:9b334a45a8ff	1864	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1865	{
bogdanm	0:9b334a45a8ff	1866	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1867	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1868	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1869	}
bogdanm	0:9b334a45a8ff	1870	else
bogdanm	0:9b334a45a8ff	1871	{
bogdanm	0:9b334a45a8ff	1872	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1873	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1874	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1875	}
bogdanm	0:9b334a45a8ff	1876	}
bogdanm	0:9b334a45a8ff	1877
bogdanm	0:9b334a45a8ff	1878	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	1879	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	1880	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1881	{
bogdanm	0:9b334a45a8ff	1882	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1883	}
bogdanm	0:9b334a45a8ff	1884	else
bogdanm	0:9b334a45a8ff	1885	{
bogdanm	0:9b334a45a8ff	1886	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	1887	}
bogdanm	0:9b334a45a8ff	1888
bogdanm	0:9b334a45a8ff	1889	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1890	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1891
bogdanm	0:9b334a45a8ff	1892	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1893	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1894	process unlock */
bogdanm	0:9b334a45a8ff	1895
bogdanm	0:9b334a45a8ff	1896	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	1897	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1898	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1899	__HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_TXI );
bogdanm	0:9b334a45a8ff	1900
bogdanm	0:9b334a45a8ff	1901	return HAL_OK;
bogdanm	0:9b334a45a8ff	1902	}
bogdanm	0:9b334a45a8ff	1903	else
bogdanm	0:9b334a45a8ff	1904	{
bogdanm	0:9b334a45a8ff	1905	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1906	}
bogdanm	0:9b334a45a8ff	1907	}
bogdanm	0:9b334a45a8ff	1908
bogdanm	0:9b334a45a8ff	1909	/**
bogdanm	0:9b334a45a8ff	1910	* @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
bogdanm	0:9b334a45a8ff	1911	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1912	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	1913	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1914	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1915	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1916	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1917	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1918	* @retval HAL status
bogdanm	0:9b334a45a8ff	1919	*/
bogdanm	0:9b334a45a8ff	1920	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1921	{
bogdanm	0:9b334a45a8ff	1922	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1923	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1924
bogdanm	0:9b334a45a8ff	1925	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1926	{
bogdanm	0:9b334a45a8ff	1927	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1928	{
bogdanm	0:9b334a45a8ff	1929	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1930	}
bogdanm	0:9b334a45a8ff	1931
bogdanm	0:9b334a45a8ff	1932	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1933	{
bogdanm	0:9b334a45a8ff	1934	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1935	}
bogdanm	0:9b334a45a8ff	1936
bogdanm	0:9b334a45a8ff	1937	/* Process Locked */
bogdanm	0:9b334a45a8ff	1938	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1939
bogdanm	0:9b334a45a8ff	1940	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	1941
bogdanm	0:9b334a45a8ff	1942	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1943	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1944	if(Size > 255)
bogdanm	0:9b334a45a8ff	1945	{
bogdanm	0:9b334a45a8ff	1946	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	1947	}
bogdanm	0:9b334a45a8ff	1948	else
bogdanm	0:9b334a45a8ff	1949	{
bogdanm	0:9b334a45a8ff	1950	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1951	}
bogdanm	0:9b334a45a8ff	1952
bogdanm	0:9b334a45a8ff	1953	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1954	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1955	{
bogdanm	0:9b334a45a8ff	1956	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1957	{
bogdanm	0:9b334a45a8ff	1958	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1959	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1960	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1961	}
bogdanm	0:9b334a45a8ff	1962	else
bogdanm	0:9b334a45a8ff	1963	{
bogdanm	0:9b334a45a8ff	1964	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1965	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1966	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1967	}
bogdanm	0:9b334a45a8ff	1968	}
bogdanm	0:9b334a45a8ff	1969
bogdanm	0:9b334a45a8ff	1970	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	1971	/* Size > 255, need to set RELOAD bit */
bogdanm	0:9b334a45a8ff	1972	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	1973	{
bogdanm	0:9b334a45a8ff	1974	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1975	}
bogdanm	0:9b334a45a8ff	1976	else
bogdanm	0:9b334a45a8ff	1977	{
bogdanm	0:9b334a45a8ff	1978	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	1979	}
bogdanm	0:9b334a45a8ff	1980
bogdanm	0:9b334a45a8ff	1981	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1982	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1983
bogdanm	0:9b334a45a8ff	1984	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1985	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1986	process unlock */
bogdanm	0:9b334a45a8ff	1987
bogdanm	0:9b334a45a8ff	1988	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm	0:9b334a45a8ff	1989	/* possible to enable all of these */
bogdanm	0:9b334a45a8ff	1990	/* I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI */
bogdanm	0:9b334a45a8ff	1991	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_RXI );
bogdanm	0:9b334a45a8ff	1992
bogdanm	0:9b334a45a8ff	1993	return HAL_OK;
bogdanm	0:9b334a45a8ff	1994	}
bogdanm	0:9b334a45a8ff	1995	else
bogdanm	0:9b334a45a8ff	1996	{
bogdanm	0:9b334a45a8ff	1997	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1998	}
bogdanm	0:9b334a45a8ff	1999	}
bogdanm	0:9b334a45a8ff	2000	/**
bogdanm	0:9b334a45a8ff	2001	* @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
bogdanm	0:9b334a45a8ff	2002	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2003	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2004	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2005	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	2006	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	2007	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	2008	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	2009	* @retval HAL status
bogdanm	0:9b334a45a8ff	2010	*/
bogdanm	0:9b334a45a8ff	2011	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	2012	{
bogdanm	0:9b334a45a8ff	2013	/* Check the parameters */
bogdanm	0:9b334a45a8ff	2014	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	2015
bogdanm	0:9b334a45a8ff	2016	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2017	{
bogdanm	0:9b334a45a8ff	2018	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	2019	{
bogdanm	0:9b334a45a8ff	2020	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2021	}
bogdanm	0:9b334a45a8ff	2022
bogdanm	0:9b334a45a8ff	2023	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2024	{
bogdanm	0:9b334a45a8ff	2025	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2026	}
bogdanm	0:9b334a45a8ff	2027
bogdanm	0:9b334a45a8ff	2028	/* Process Locked */
bogdanm	0:9b334a45a8ff	2029	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2030
bogdanm	0:9b334a45a8ff	2031	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	2032	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	2033
bogdanm	0:9b334a45a8ff	2034	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	2035	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	2036	if(Size > 255)
bogdanm	0:9b334a45a8ff	2037	{
bogdanm	0:9b334a45a8ff	2038	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	2039	}
bogdanm	0:9b334a45a8ff	2040	else
bogdanm	0:9b334a45a8ff	2041	{
bogdanm	0:9b334a45a8ff	2042	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	2043	}
bogdanm	0:9b334a45a8ff	2044
bogdanm	0:9b334a45a8ff	2045	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	2046	hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
bogdanm	0:9b334a45a8ff	2047
bogdanm	0:9b334a45a8ff	2048	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	2049	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	2050
bogdanm	0:9b334a45a8ff	2051	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	2052	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	2053
bogdanm	0:9b334a45a8ff	2054	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	2055	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2056	{
bogdanm	0:9b334a45a8ff	2057	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2058	{
bogdanm	0:9b334a45a8ff	2059	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2060	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2061	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2062	}
bogdanm	0:9b334a45a8ff	2063	else
bogdanm	0:9b334a45a8ff	2064	{
bogdanm	0:9b334a45a8ff	2065	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2066	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2067	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2068	}
bogdanm	0:9b334a45a8ff	2069	}
bogdanm	0:9b334a45a8ff	2070
bogdanm	0:9b334a45a8ff	2071	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	2072	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	2073	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	2074	{
bogdanm	0:9b334a45a8ff	2075	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2076	}
bogdanm	0:9b334a45a8ff	2077	else
bogdanm	0:9b334a45a8ff	2078	{
bogdanm	0:9b334a45a8ff	2079	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2080	}
bogdanm	0:9b334a45a8ff	2081
bogdanm	0:9b334a45a8ff	2082	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	2083	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm	0:9b334a45a8ff	2084	{
bogdanm	0:9b334a45a8ff	2085	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2086	{
bogdanm	0:9b334a45a8ff	2087	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2088	}
bogdanm	0:9b334a45a8ff	2089	else
bogdanm	0:9b334a45a8ff	2090	{
bogdanm	0:9b334a45a8ff	2091	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2092	}
bogdanm	0:9b334a45a8ff	2093	}
bogdanm	0:9b334a45a8ff	2094
bogdanm	0:9b334a45a8ff	2095	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	2096	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	2097
bogdanm	0:9b334a45a8ff	2098	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2099	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2100
bogdanm	0:9b334a45a8ff	2101	return HAL_OK;
bogdanm	0:9b334a45a8ff	2102	}
bogdanm	0:9b334a45a8ff	2103	else
bogdanm	0:9b334a45a8ff	2104	{
bogdanm	0:9b334a45a8ff	2105	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2106	}
bogdanm	0:9b334a45a8ff	2107	}
bogdanm	0:9b334a45a8ff	2108
bogdanm	0:9b334a45a8ff	2109	/**
bogdanm	0:9b334a45a8ff	2110	* @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
bogdanm	0:9b334a45a8ff	2111	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2112	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2113	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2114	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	2115	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	2116	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	2117	* @param Size: Amount of data to be read
bogdanm	0:9b334a45a8ff	2118	* @retval HAL status
bogdanm	0:9b334a45a8ff	2119	*/
bogdanm	0:9b334a45a8ff	2120	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	2121	{
bogdanm	0:9b334a45a8ff	2122	/* Check the parameters */
bogdanm	0:9b334a45a8ff	2123	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	2124
bogdanm	0:9b334a45a8ff	2125	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2126	{
bogdanm	0:9b334a45a8ff	2127	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	2128	{
bogdanm	0:9b334a45a8ff	2129	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2130	}
bogdanm	0:9b334a45a8ff	2131
bogdanm	0:9b334a45a8ff	2132	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2133	{
bogdanm	0:9b334a45a8ff	2134	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2135	}
bogdanm	0:9b334a45a8ff	2136
bogdanm	0:9b334a45a8ff	2137	/* Process Locked */
bogdanm	0:9b334a45a8ff	2138	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2139
bogdanm	0:9b334a45a8ff	2140	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	2141
bogdanm	0:9b334a45a8ff	2142	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	2143	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	2144	if(Size > 255)
bogdanm	0:9b334a45a8ff	2145	{
bogdanm	0:9b334a45a8ff	2146	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	2147	}
bogdanm	0:9b334a45a8ff	2148	else
bogdanm	0:9b334a45a8ff	2149	{
bogdanm	0:9b334a45a8ff	2150	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	2151	}
bogdanm	0:9b334a45a8ff	2152
bogdanm	0:9b334a45a8ff	2153	/* Set the I2C DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	2154	hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
bogdanm	0:9b334a45a8ff	2155
bogdanm	0:9b334a45a8ff	2156	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	2157	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	2158
bogdanm	0:9b334a45a8ff	2159	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	2160	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	2161
bogdanm	0:9b334a45a8ff	2162	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	2163	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2164	{
bogdanm	0:9b334a45a8ff	2165	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2166	{
bogdanm	0:9b334a45a8ff	2167	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2168	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2169	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2170	}
bogdanm	0:9b334a45a8ff	2171	else
bogdanm	0:9b334a45a8ff	2172	{
bogdanm	0:9b334a45a8ff	2173	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2174	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2175	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2176	}
bogdanm	0:9b334a45a8ff	2177	}
bogdanm	0:9b334a45a8ff	2178
bogdanm	0:9b334a45a8ff	2179	/* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm	0:9b334a45a8ff	2180	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	2181	{
bogdanm	0:9b334a45a8ff	2182	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	2183	}
bogdanm	0:9b334a45a8ff	2184	else
bogdanm	0:9b334a45a8ff	2185	{
bogdanm	0:9b334a45a8ff	2186	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm	0:9b334a45a8ff	2187	}
bogdanm	0:9b334a45a8ff	2188
bogdanm	0:9b334a45a8ff	2189	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	2190	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	2191	{
bogdanm	0:9b334a45a8ff	2192	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2193	}
bogdanm	0:9b334a45a8ff	2194
bogdanm	0:9b334a45a8ff	2195	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	2196	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	2197
bogdanm	0:9b334a45a8ff	2198	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2199	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2200
bogdanm	0:9b334a45a8ff	2201	return HAL_OK;
bogdanm	0:9b334a45a8ff	2202	}
bogdanm	0:9b334a45a8ff	2203	else
bogdanm	0:9b334a45a8ff	2204	{
bogdanm	0:9b334a45a8ff	2205	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2206	}
bogdanm	0:9b334a45a8ff	2207	}
bogdanm	0:9b334a45a8ff	2208
bogdanm	0:9b334a45a8ff	2209	/**
bogdanm	0:9b334a45a8ff	2210	* @brief Checks if target device is ready for communication.
bogdanm	0:9b334a45a8ff	2211	* @note This function is used with Memory devices
bogdanm	0:9b334a45a8ff	2212	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2213	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2214	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2215	* @param Trials: Number of trials
bogdanm	0:9b334a45a8ff	2216	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	2217	* @retval HAL status
bogdanm	0:9b334a45a8ff	2218	*/
bogdanm	0:9b334a45a8ff	2219	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	2220	{
bogdanm	0:9b334a45a8ff	2221	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	2222
bogdanm	0:9b334a45a8ff	2223	__IO uint32_t I2C_Trials = 0;
bogdanm	0:9b334a45a8ff	2224
bogdanm	0:9b334a45a8ff	2225	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2226	{
bogdanm	0:9b334a45a8ff	2227	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2228	{
bogdanm	0:9b334a45a8ff	2229	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2230	}
bogdanm	0:9b334a45a8ff	2231
bogdanm	0:9b334a45a8ff	2232	/* Process Locked */
bogdanm	0:9b334a45a8ff	2233	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2234
bogdanm	0:9b334a45a8ff	2235	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	2236	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	2237
bogdanm	0:9b334a45a8ff	2238	do
bogdanm	0:9b334a45a8ff	2239	{
bogdanm	0:9b334a45a8ff	2240	/* Generate Start */
bogdanm	0:9b334a45a8ff	2241	hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode,DevAddress);
bogdanm	0:9b334a45a8ff	2242
bogdanm	0:9b334a45a8ff	2243	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	2244	/* Wait until STOPF flag is set or a NACK flag is set*/
bogdanm	0:9b334a45a8ff	2245	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	2246	while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT))
bogdanm	0:9b334a45a8ff	2247	{
bogdanm	0:9b334a45a8ff	2248	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	2249	{
bogdanm	0:9b334a45a8ff	2250	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	2251	{
bogdanm	0:9b334a45a8ff	2252	/* Device is ready */
bogdanm	0:9b334a45a8ff	2253	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2254	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2255	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2256	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2257	}
bogdanm	0:9b334a45a8ff	2258	}
bogdanm	0:9b334a45a8ff	2259	}
bogdanm	0:9b334a45a8ff	2260
bogdanm	0:9b334a45a8ff	2261	/* Check if the NACKF flag has not been set */
bogdanm	0:9b334a45a8ff	2262	if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET)
bogdanm	0:9b334a45a8ff	2263	{
bogdanm	0:9b334a45a8ff	2264	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	2265	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2266	{
bogdanm	0:9b334a45a8ff	2267	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2268	}
bogdanm	0:9b334a45a8ff	2269
bogdanm	0:9b334a45a8ff	2270	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2271	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2272
bogdanm	0:9b334a45a8ff	2273	/* Device is ready */
bogdanm	0:9b334a45a8ff	2274	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2275
bogdanm	0:9b334a45a8ff	2276	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2277	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2278
bogdanm	0:9b334a45a8ff	2279	return HAL_OK;
bogdanm	0:9b334a45a8ff	2280	}
bogdanm	0:9b334a45a8ff	2281	else
bogdanm	0:9b334a45a8ff	2282	{
bogdanm	0:9b334a45a8ff	2283	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	2284	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2285	{
bogdanm	0:9b334a45a8ff	2286	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2287	}
bogdanm	0:9b334a45a8ff	2288
bogdanm	0:9b334a45a8ff	2289	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2290	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2291
bogdanm	0:9b334a45a8ff	2292	/* Clear STOP Flag, auto generated with autoend*/
bogdanm	0:9b334a45a8ff	2293	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2294	}
bogdanm	0:9b334a45a8ff	2295
bogdanm	0:9b334a45a8ff	2296	/* Check if the maximum allowed number of trials has been reached */
bogdanm	0:9b334a45a8ff	2297	if (I2C_Trials++ == Trials)
bogdanm	0:9b334a45a8ff	2298	{
bogdanm	0:9b334a45a8ff	2299	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2300	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
bogdanm	0:9b334a45a8ff	2301
bogdanm	0:9b334a45a8ff	2302	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	2303	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2304	{
bogdanm	0:9b334a45a8ff	2305	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2306	}
bogdanm	0:9b334a45a8ff	2307
bogdanm	0:9b334a45a8ff	2308	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2309	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2310	}
bogdanm	0:9b334a45a8ff	2311	}while(I2C_Trials < Trials);
bogdanm	0:9b334a45a8ff	2312
bogdanm	0:9b334a45a8ff	2313	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2314
bogdanm	0:9b334a45a8ff	2315	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2316	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2317
bogdanm	0:9b334a45a8ff	2318	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2319	}
bogdanm	0:9b334a45a8ff	2320	else
bogdanm	0:9b334a45a8ff	2321	{
bogdanm	0:9b334a45a8ff	2322	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2323	}
bogdanm	0:9b334a45a8ff	2324	}
bogdanm	0:9b334a45a8ff	2325	/**
bogdanm	0:9b334a45a8ff	2326	* @}
bogdanm	0:9b334a45a8ff	2327	*/
bogdanm	0:9b334a45a8ff	2328
bogdanm	0:9b334a45a8ff	2329	/** @defgroup IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
bogdanm	0:9b334a45a8ff	2330	* @{
bogdanm	0:9b334a45a8ff	2331	*/
bogdanm	0:9b334a45a8ff	2332
bogdanm	0:9b334a45a8ff	2333	/**
bogdanm	0:9b334a45a8ff	2334	* @brief This function handles I2C event interrupt request.
bogdanm	0:9b334a45a8ff	2335	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2336	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2337	* @retval None
bogdanm	0:9b334a45a8ff	2338	*/
bogdanm	0:9b334a45a8ff	2339	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2340	{
bogdanm	0:9b334a45a8ff	2341	/* I2C in mode Transmitter ---------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2342	if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_TXI \| I2C_IT_ADDRI)) == SET))
bogdanm	0:9b334a45a8ff	2343	{
bogdanm	0:9b334a45a8ff	2344	/* Slave mode selected */
bogdanm	0:9b334a45a8ff	2345	if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX)
bogdanm	0:9b334a45a8ff	2346	{
bogdanm	0:9b334a45a8ff	2347	I2C_SlaveTransmit_ISR(hi2c);
bogdanm	0:9b334a45a8ff	2348	}
bogdanm	0:9b334a45a8ff	2349	}
bogdanm	0:9b334a45a8ff	2350
bogdanm	0:9b334a45a8ff	2351	if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI \| I2C_IT_STOPI \| I2C_IT_NACKI \| I2C_IT_TXI)) == SET))
bogdanm	0:9b334a45a8ff	2352	{
bogdanm	0:9b334a45a8ff	2353	/* Master mode selected */
bogdanm	0:9b334a45a8ff	2354	if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) \|\| (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX))
bogdanm	0:9b334a45a8ff	2355	{
bogdanm	0:9b334a45a8ff	2356	I2C_MasterTransmit_ISR(hi2c);
bogdanm	0:9b334a45a8ff	2357	}
bogdanm	0:9b334a45a8ff	2358	}
bogdanm	0:9b334a45a8ff	2359
bogdanm	0:9b334a45a8ff	2360	/* I2C in mode Receiver ----------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2361	if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_RXI \| I2C_IT_ADDRI)) == SET))
bogdanm	0:9b334a45a8ff	2362	{
bogdanm	0:9b334a45a8ff	2363	/* Slave mode selected */
bogdanm	0:9b334a45a8ff	2364	if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX)
bogdanm	0:9b334a45a8ff	2365	{
bogdanm	0:9b334a45a8ff	2366	I2C_SlaveReceive_ISR(hi2c);
bogdanm	0:9b334a45a8ff	2367	}
bogdanm	0:9b334a45a8ff	2368	}
bogdanm	0:9b334a45a8ff	2369	if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) \|\| (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_RXI)) == SET))
bogdanm	0:9b334a45a8ff	2370	{
bogdanm	0:9b334a45a8ff	2371	/* Master mode selected */
bogdanm	0:9b334a45a8ff	2372	if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX) \|\| (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX))
bogdanm	0:9b334a45a8ff	2373	{
bogdanm	0:9b334a45a8ff	2374	I2C_MasterReceive_ISR(hi2c);
bogdanm	0:9b334a45a8ff	2375	}
bogdanm	0:9b334a45a8ff	2376	}
bogdanm	0:9b334a45a8ff	2377	}
bogdanm	0:9b334a45a8ff	2378
bogdanm	0:9b334a45a8ff	2379	/**
bogdanm	0:9b334a45a8ff	2380	* @brief This function handles I2C error interrupt request.
bogdanm	0:9b334a45a8ff	2381	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2382	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2383	* @retval None
bogdanm	0:9b334a45a8ff	2384	*/
bogdanm	0:9b334a45a8ff	2385	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2386	{
bogdanm	0:9b334a45a8ff	2387	/* I2C Bus error interrupt occurred ------------------------------------*/
bogdanm	0:9b334a45a8ff	2388	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm	0:9b334a45a8ff	2389	{
bogdanm	0:9b334a45a8ff	2390	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
bogdanm	0:9b334a45a8ff	2391
bogdanm	0:9b334a45a8ff	2392	/* Clear BERR flag */
bogdanm	0:9b334a45a8ff	2393	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
bogdanm	0:9b334a45a8ff	2394	}
bogdanm	0:9b334a45a8ff	2395
bogdanm	0:9b334a45a8ff	2396	/* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
bogdanm	0:9b334a45a8ff	2397	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm	0:9b334a45a8ff	2398	{
bogdanm	0:9b334a45a8ff	2399	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
bogdanm	0:9b334a45a8ff	2400
bogdanm	0:9b334a45a8ff	2401	/* Clear OVR flag */
bogdanm	0:9b334a45a8ff	2402	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
bogdanm	0:9b334a45a8ff	2403	}
bogdanm	0:9b334a45a8ff	2404
bogdanm	0:9b334a45a8ff	2405	/* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
bogdanm	0:9b334a45a8ff	2406	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm	0:9b334a45a8ff	2407	{
bogdanm	0:9b334a45a8ff	2408	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
bogdanm	0:9b334a45a8ff	2409
bogdanm	0:9b334a45a8ff	2410	/* Clear ARLO flag */
bogdanm	0:9b334a45a8ff	2411	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
bogdanm	0:9b334a45a8ff	2412	}
bogdanm	0:9b334a45a8ff	2413
bogdanm	0:9b334a45a8ff	2414	/* Call the Error Callback in case of Error detected */
bogdanm	0:9b334a45a8ff	2415	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	2416	{
bogdanm	0:9b334a45a8ff	2417	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2418
bogdanm	0:9b334a45a8ff	2419	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2420	}
bogdanm	0:9b334a45a8ff	2421	}
bogdanm	0:9b334a45a8ff	2422
bogdanm	0:9b334a45a8ff	2423	/**
bogdanm	0:9b334a45a8ff	2424	* @brief Master Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2425	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2426	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2427	* @retval None
bogdanm	0:9b334a45a8ff	2428	*/
bogdanm	0:9b334a45a8ff	2429	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2430	{
bogdanm	0:9b334a45a8ff	2431	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2432	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2433	*/
bogdanm	0:9b334a45a8ff	2434	}
bogdanm	0:9b334a45a8ff	2435
bogdanm	0:9b334a45a8ff	2436	/**
bogdanm	0:9b334a45a8ff	2437	* @brief Master Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2438	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2439	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2440	* @retval None
bogdanm	0:9b334a45a8ff	2441	*/
bogdanm	0:9b334a45a8ff	2442	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2443	{
bogdanm	0:9b334a45a8ff	2444	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2445	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2446	*/
bogdanm	0:9b334a45a8ff	2447	}
bogdanm	0:9b334a45a8ff	2448
bogdanm	0:9b334a45a8ff	2449	/** @brief Slave Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2450	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2451	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2452	* @retval None
bogdanm	0:9b334a45a8ff	2453	*/
bogdanm	0:9b334a45a8ff	2454	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2455	{
bogdanm	0:9b334a45a8ff	2456	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2457	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2458	*/
bogdanm	0:9b334a45a8ff	2459	}
bogdanm	0:9b334a45a8ff	2460
bogdanm	0:9b334a45a8ff	2461	/**
bogdanm	0:9b334a45a8ff	2462	* @brief Slave Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2463	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2464	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2465	* @retval None
bogdanm	0:9b334a45a8ff	2466	*/
bogdanm	0:9b334a45a8ff	2467	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2468	{
bogdanm	0:9b334a45a8ff	2469	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2470	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2471	*/
bogdanm	0:9b334a45a8ff	2472	}
bogdanm	0:9b334a45a8ff	2473
bogdanm	0:9b334a45a8ff	2474	/**
bogdanm	0:9b334a45a8ff	2475	* @brief Memory Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2476	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2477	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2478	* @retval None
bogdanm	0:9b334a45a8ff	2479	*/
bogdanm	0:9b334a45a8ff	2480	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2481	{
bogdanm	0:9b334a45a8ff	2482	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2483	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2484	*/
bogdanm	0:9b334a45a8ff	2485	}
bogdanm	0:9b334a45a8ff	2486
bogdanm	0:9b334a45a8ff	2487	/**
bogdanm	0:9b334a45a8ff	2488	* @brief Memory Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2489	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2490	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2491	* @retval None
bogdanm	0:9b334a45a8ff	2492	*/
bogdanm	0:9b334a45a8ff	2493	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2494	{
bogdanm	0:9b334a45a8ff	2495	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2496	the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2497	*/
bogdanm	0:9b334a45a8ff	2498	}
bogdanm	0:9b334a45a8ff	2499
bogdanm	0:9b334a45a8ff	2500	/**
bogdanm	0:9b334a45a8ff	2501	* @brief I2C error callbacks.
bogdanm	0:9b334a45a8ff	2502	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2503	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2504	* @retval None
bogdanm	0:9b334a45a8ff	2505	*/
bogdanm	0:9b334a45a8ff	2506	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2507	{
bogdanm	0:9b334a45a8ff	2508	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2509	the HAL_I2C_ErrorCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	2510	*/
bogdanm	0:9b334a45a8ff	2511	}
bogdanm	0:9b334a45a8ff	2512
bogdanm	0:9b334a45a8ff	2513	/**
bogdanm	0:9b334a45a8ff	2514	* @}
bogdanm	0:9b334a45a8ff	2515	*/
bogdanm	0:9b334a45a8ff	2516
bogdanm	0:9b334a45a8ff	2517	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	2518	* @brief Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	2519	*
bogdanm	0:9b334a45a8ff	2520	@verbatim
bogdanm	0:9b334a45a8ff	2521	===============================================================================
bogdanm	0:9b334a45a8ff	2522	##### Peripheral State and Errors functions #####
bogdanm	0:9b334a45a8ff	2523	===============================================================================
bogdanm	0:9b334a45a8ff	2524	[..]
bogdanm	0:9b334a45a8ff	2525	This subsection permit to get in run-time the status of the peripheral
bogdanm	0:9b334a45a8ff	2526	and the data flow.
bogdanm	0:9b334a45a8ff	2527
bogdanm	0:9b334a45a8ff	2528	@endverbatim
bogdanm	0:9b334a45a8ff	2529	* @{
bogdanm	0:9b334a45a8ff	2530	*/
bogdanm	0:9b334a45a8ff	2531
bogdanm	0:9b334a45a8ff	2532	/**
bogdanm	0:9b334a45a8ff	2533	* @brief Returns the I2C state.
bogdanm	0:9b334a45a8ff	2534	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2535	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2536	* @retval HAL state
bogdanm	0:9b334a45a8ff	2537	*/
bogdanm	0:9b334a45a8ff	2538	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2539	{
bogdanm	0:9b334a45a8ff	2540	return hi2c->State;
bogdanm	0:9b334a45a8ff	2541	}
bogdanm	0:9b334a45a8ff	2542
bogdanm	0:9b334a45a8ff	2543	/**
bogdanm	0:9b334a45a8ff	2544	* @brief Return the I2C error code
bogdanm	0:9b334a45a8ff	2545	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2546	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2547	* @retval I2C Error Code
bogdanm	0:9b334a45a8ff	2548	*/
bogdanm	0:9b334a45a8ff	2549	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2550	{
bogdanm	0:9b334a45a8ff	2551	return hi2c->ErrorCode;
bogdanm	0:9b334a45a8ff	2552	}
bogdanm	0:9b334a45a8ff	2553
bogdanm	0:9b334a45a8ff	2554	/**
bogdanm	0:9b334a45a8ff	2555	* @}
bogdanm	0:9b334a45a8ff	2556	*/
bogdanm	0:9b334a45a8ff	2557
bogdanm	0:9b334a45a8ff	2558	/**
bogdanm	0:9b334a45a8ff	2559	* @}
bogdanm	0:9b334a45a8ff	2560	*/
bogdanm	0:9b334a45a8ff	2561
bogdanm	0:9b334a45a8ff	2562	/** @addtogroup I2C_Private_Functions
bogdanm	0:9b334a45a8ff	2563	* @{
bogdanm	0:9b334a45a8ff	2564	*/
bogdanm	0:9b334a45a8ff	2565
bogdanm	0:9b334a45a8ff	2566	/**
bogdanm	0:9b334a45a8ff	2567	* @brief Handle Interrupt Flags Master Transmit Mode
bogdanm	0:9b334a45a8ff	2568	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2569	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2570	* @retval HAL status
bogdanm	0:9b334a45a8ff	2571	*/
bogdanm	0:9b334a45a8ff	2572	static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2573	{
bogdanm	0:9b334a45a8ff	2574	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	2575
bogdanm	0:9b334a45a8ff	2576	/* Process Locked */
bogdanm	0:9b334a45a8ff	2577	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2578
bogdanm	0:9b334a45a8ff	2579	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET)
bogdanm	0:9b334a45a8ff	2580	{
bogdanm	0:9b334a45a8ff	2581	/* Write data to TXDR */
bogdanm	0:9b334a45a8ff	2582	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
bogdanm	0:9b334a45a8ff	2583	hi2c->XferSize--;
bogdanm	0:9b334a45a8ff	2584	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2585	}
bogdanm	0:9b334a45a8ff	2586	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET)
bogdanm	0:9b334a45a8ff	2587	{
bogdanm	0:9b334a45a8ff	2588	if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0))
bogdanm	0:9b334a45a8ff	2589	{
bogdanm	0:9b334a45a8ff	2590	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm	0:9b334a45a8ff	2591
bogdanm	0:9b334a45a8ff	2592	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	2593	{
bogdanm	0:9b334a45a8ff	2594	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2595	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	2596	}
bogdanm	0:9b334a45a8ff	2597	else
bogdanm	0:9b334a45a8ff	2598	{
bogdanm	0:9b334a45a8ff	2599	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2600	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	2601	}
bogdanm	0:9b334a45a8ff	2602	}
bogdanm	0:9b334a45a8ff	2603	else
bogdanm	0:9b334a45a8ff	2604	{
bogdanm	0:9b334a45a8ff	2605	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2606	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2607
bogdanm	0:9b334a45a8ff	2608	/* Wrong size Status regarding TCR flag event */
bogdanm	0:9b334a45a8ff	2609	hi2c->ErrorCode \|= HAL_I2C_ERROR_SIZE;
bogdanm	0:9b334a45a8ff	2610	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2611	}
bogdanm	0:9b334a45a8ff	2612	}
bogdanm	0:9b334a45a8ff	2613	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET)
bogdanm	0:9b334a45a8ff	2614	{
bogdanm	0:9b334a45a8ff	2615	if(hi2c->XferCount == 0)
bogdanm	0:9b334a45a8ff	2616	{
bogdanm	0:9b334a45a8ff	2617	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2618	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
bogdanm	0:9b334a45a8ff	2619	}
bogdanm	0:9b334a45a8ff	2620	else
bogdanm	0:9b334a45a8ff	2621	{
bogdanm	0:9b334a45a8ff	2622	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2623	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2624
bogdanm	0:9b334a45a8ff	2625	/* Wrong size Status regarding TCR flag event */
bogdanm	0:9b334a45a8ff	2626	hi2c->ErrorCode \|= HAL_I2C_ERROR_SIZE;
bogdanm	0:9b334a45a8ff	2627	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2628	}
bogdanm	0:9b334a45a8ff	2629	}
bogdanm	0:9b334a45a8ff	2630	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	2631	{
bogdanm	0:9b334a45a8ff	2632	/* Disable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	2633	__HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_TXI );
bogdanm	0:9b334a45a8ff	2634
bogdanm	0:9b334a45a8ff	2635	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2636	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2637
bogdanm	0:9b334a45a8ff	2638	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	2639	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	2640
bogdanm	0:9b334a45a8ff	2641	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2642
bogdanm	0:9b334a45a8ff	2643	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2644	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2645
bogdanm	0:9b334a45a8ff	2646	if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
bogdanm	0:9b334a45a8ff	2647	{
bogdanm	0:9b334a45a8ff	2648	HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2649	}
bogdanm	0:9b334a45a8ff	2650	else
bogdanm	0:9b334a45a8ff	2651	{
bogdanm	0:9b334a45a8ff	2652	HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2653	}
bogdanm	0:9b334a45a8ff	2654	}
bogdanm	0:9b334a45a8ff	2655	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm	0:9b334a45a8ff	2656	{
bogdanm	0:9b334a45a8ff	2657	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2658	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2659
bogdanm	0:9b334a45a8ff	2660	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2661	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2662
bogdanm	0:9b334a45a8ff	2663	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	2664	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2665	}
bogdanm	0:9b334a45a8ff	2666
bogdanm	0:9b334a45a8ff	2667	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2668	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2669
bogdanm	0:9b334a45a8ff	2670	return HAL_OK;
bogdanm	0:9b334a45a8ff	2671	}
bogdanm	0:9b334a45a8ff	2672
bogdanm	0:9b334a45a8ff	2673	/**
bogdanm	0:9b334a45a8ff	2674	* @brief Handle Interrupt Flags Master Receive Mode
bogdanm	0:9b334a45a8ff	2675	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2676	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2677	* @retval HAL status
bogdanm	0:9b334a45a8ff	2678	*/
bogdanm	0:9b334a45a8ff	2679	static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2680	{
bogdanm	0:9b334a45a8ff	2681	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	2682
bogdanm	0:9b334a45a8ff	2683	/* Process Locked */
bogdanm	0:9b334a45a8ff	2684	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2685
bogdanm	0:9b334a45a8ff	2686	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
bogdanm	0:9b334a45a8ff	2687	{
bogdanm	0:9b334a45a8ff	2688	/* Read data from RXDR */
bogdanm	0:9b334a45a8ff	2689	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	2690	hi2c->XferSize--;
bogdanm	0:9b334a45a8ff	2691	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2692	}
bogdanm	0:9b334a45a8ff	2693	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET)
bogdanm	0:9b334a45a8ff	2694	{
bogdanm	0:9b334a45a8ff	2695	if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0))
bogdanm	0:9b334a45a8ff	2696	{
bogdanm	0:9b334a45a8ff	2697	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm	0:9b334a45a8ff	2698
bogdanm	0:9b334a45a8ff	2699	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	2700	{
bogdanm	0:9b334a45a8ff	2701	I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2702	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	2703	}
bogdanm	0:9b334a45a8ff	2704	else
bogdanm	0:9b334a45a8ff	2705	{
bogdanm	0:9b334a45a8ff	2706	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	2707	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	2708	}
bogdanm	0:9b334a45a8ff	2709	}
bogdanm	0:9b334a45a8ff	2710	else
bogdanm	0:9b334a45a8ff	2711	{
bogdanm	0:9b334a45a8ff	2712	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2713	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2714
bogdanm	0:9b334a45a8ff	2715	/* Wrong size Status regarding TCR flag event */
bogdanm	0:9b334a45a8ff	2716	hi2c->ErrorCode \|= HAL_I2C_ERROR_SIZE;
bogdanm	0:9b334a45a8ff	2717	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2718	}
bogdanm	0:9b334a45a8ff	2719	}
bogdanm	0:9b334a45a8ff	2720	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET)
bogdanm	0:9b334a45a8ff	2721	{
bogdanm	0:9b334a45a8ff	2722	if(hi2c->XferCount == 0)
bogdanm	0:9b334a45a8ff	2723	{
bogdanm	0:9b334a45a8ff	2724	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2725	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
bogdanm	0:9b334a45a8ff	2726	}
bogdanm	0:9b334a45a8ff	2727	else
bogdanm	0:9b334a45a8ff	2728	{
bogdanm	0:9b334a45a8ff	2729	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2730	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2731
bogdanm	0:9b334a45a8ff	2732	/* Wrong size Status regarding TCR flag event */
bogdanm	0:9b334a45a8ff	2733	hi2c->ErrorCode \|= HAL_I2C_ERROR_SIZE;
bogdanm	0:9b334a45a8ff	2734	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2735	}
bogdanm	0:9b334a45a8ff	2736	}
bogdanm	0:9b334a45a8ff	2737	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	2738	{
bogdanm	0:9b334a45a8ff	2739	/* Disable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm	0:9b334a45a8ff	2740	__HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_RXI );
bogdanm	0:9b334a45a8ff	2741
bogdanm	0:9b334a45a8ff	2742	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2743	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2744
bogdanm	0:9b334a45a8ff	2745	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	2746	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	2747
bogdanm	0:9b334a45a8ff	2748	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2749
bogdanm	0:9b334a45a8ff	2750	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2751	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2752
bogdanm	0:9b334a45a8ff	2753	if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
bogdanm	0:9b334a45a8ff	2754	{
bogdanm	0:9b334a45a8ff	2755	HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2756	}
bogdanm	0:9b334a45a8ff	2757	else
bogdanm	0:9b334a45a8ff	2758	{
bogdanm	0:9b334a45a8ff	2759	HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2760	}
bogdanm	0:9b334a45a8ff	2761	}
bogdanm	0:9b334a45a8ff	2762	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm	0:9b334a45a8ff	2763	{
bogdanm	0:9b334a45a8ff	2764	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2765	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2766
bogdanm	0:9b334a45a8ff	2767	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2768	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2769
bogdanm	0:9b334a45a8ff	2770	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	2771	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2772	}
bogdanm	0:9b334a45a8ff	2773
bogdanm	0:9b334a45a8ff	2774	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2775	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2776
bogdanm	0:9b334a45a8ff	2777	return HAL_OK;
bogdanm	0:9b334a45a8ff	2778
bogdanm	0:9b334a45a8ff	2779	}
bogdanm	0:9b334a45a8ff	2780
bogdanm	0:9b334a45a8ff	2781	/**
bogdanm	0:9b334a45a8ff	2782	* @brief Handle Interrupt Flags Slave Transmit Mode
bogdanm	0:9b334a45a8ff	2783	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2784	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2785	* @retval HAL status
bogdanm	0:9b334a45a8ff	2786	*/
bogdanm	0:9b334a45a8ff	2787	static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2788	{
bogdanm	0:9b334a45a8ff	2789	/* Process locked */
bogdanm	0:9b334a45a8ff	2790	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2791
bogdanm	0:9b334a45a8ff	2792	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET)
bogdanm	0:9b334a45a8ff	2793	{
bogdanm	0:9b334a45a8ff	2794	/* Check that I2C transfer finished */
bogdanm	0:9b334a45a8ff	2795	/* if yes, normal usecase, a NACK is sent by the MASTER when Transfer is finished */
bogdanm	0:9b334a45a8ff	2796	/* Mean XferCount == 0*/
bogdanm	0:9b334a45a8ff	2797	/* So clear Flag NACKF only */
bogdanm	0:9b334a45a8ff	2798	if(hi2c->XferCount == 0)
bogdanm	0:9b334a45a8ff	2799	{
bogdanm	0:9b334a45a8ff	2800	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2801	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2802
bogdanm	0:9b334a45a8ff	2803	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2804	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2805	}
bogdanm	0:9b334a45a8ff	2806	else
bogdanm	0:9b334a45a8ff	2807	{
bogdanm	0:9b334a45a8ff	2808	/* if no, error usecase, a Non-Acknowledge of last Data is generated by the MASTER*/
bogdanm	0:9b334a45a8ff	2809	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2810	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2811
bogdanm	0:9b334a45a8ff	2812	/* Set ErrorCode corresponding to a Non-Acknowledge */
bogdanm	0:9b334a45a8ff	2813	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	2814
bogdanm	0:9b334a45a8ff	2815	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2816	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2817
bogdanm	0:9b334a45a8ff	2818	/* Call the Error callback to prevent upper layer */
bogdanm	0:9b334a45a8ff	2819	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2820	}
bogdanm	0:9b334a45a8ff	2821	}
bogdanm	0:9b334a45a8ff	2822	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
bogdanm	0:9b334a45a8ff	2823	{
bogdanm	0:9b334a45a8ff	2824	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	2825	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	2826	}
bogdanm	0:9b334a45a8ff	2827	/* Check first if STOPF is set */
bogdanm	0:9b334a45a8ff	2828	/* to prevent a Write Data in TX buffer */
bogdanm	0:9b334a45a8ff	2829	/* which is stuck in TXDR until next */
bogdanm	0:9b334a45a8ff	2830	/* communication with Master */
bogdanm	0:9b334a45a8ff	2831	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	2832	{
bogdanm	0:9b334a45a8ff	2833	/* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */
bogdanm	0:9b334a45a8ff	2834	__HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_TXI );
bogdanm	0:9b334a45a8ff	2835
bogdanm	0:9b334a45a8ff	2836	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	2837	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	2838
bogdanm	0:9b334a45a8ff	2839	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2840	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2841
bogdanm	0:9b334a45a8ff	2842	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2843
bogdanm	0:9b334a45a8ff	2844	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2845	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2846
bogdanm	0:9b334a45a8ff	2847	HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2848	}
bogdanm	0:9b334a45a8ff	2849	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET)
bogdanm	0:9b334a45a8ff	2850	{
bogdanm	0:9b334a45a8ff	2851	/* Write data to TXDR only if XferCount not reach "0" */
bogdanm	0:9b334a45a8ff	2852	/* A TXIS flag can be set, during STOP treatment */
bogdanm	0:9b334a45a8ff	2853	if(hi2c->XferCount > 0)
bogdanm	0:9b334a45a8ff	2854	{
bogdanm	0:9b334a45a8ff	2855	/* Write data to TXDR */
bogdanm	0:9b334a45a8ff	2856	hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
bogdanm	0:9b334a45a8ff	2857	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2858	}
bogdanm	0:9b334a45a8ff	2859	}
bogdanm	0:9b334a45a8ff	2860
bogdanm	0:9b334a45a8ff	2861	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2862	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2863
bogdanm	0:9b334a45a8ff	2864	return HAL_OK;
bogdanm	0:9b334a45a8ff	2865	}
bogdanm	0:9b334a45a8ff	2866
bogdanm	0:9b334a45a8ff	2867	/**
bogdanm	0:9b334a45a8ff	2868	* @brief Handle Interrupt Flags Slave Receive Mode
bogdanm	0:9b334a45a8ff	2869	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2870	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2871	* @retval HAL status
bogdanm	0:9b334a45a8ff	2872	*/
bogdanm	0:9b334a45a8ff	2873	static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2874	{
bogdanm	0:9b334a45a8ff	2875	/* Process Locked */
bogdanm	0:9b334a45a8ff	2876	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2877
bogdanm	0:9b334a45a8ff	2878	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET)
bogdanm	0:9b334a45a8ff	2879	{
bogdanm	0:9b334a45a8ff	2880	/* Clear NACK Flag */
bogdanm	0:9b334a45a8ff	2881	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2882
bogdanm	0:9b334a45a8ff	2883	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2884	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2885
bogdanm	0:9b334a45a8ff	2886	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	2887	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2888	}
bogdanm	0:9b334a45a8ff	2889	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
bogdanm	0:9b334a45a8ff	2890	{
bogdanm	0:9b334a45a8ff	2891	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	2892	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm	0:9b334a45a8ff	2893	}
bogdanm	0:9b334a45a8ff	2894	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
bogdanm	0:9b334a45a8ff	2895	{
bogdanm	0:9b334a45a8ff	2896	/* Read data from RXDR */
bogdanm	0:9b334a45a8ff	2897	(*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
bogdanm	0:9b334a45a8ff	2898	hi2c->XferSize--;
bogdanm	0:9b334a45a8ff	2899	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2900	}
bogdanm	0:9b334a45a8ff	2901	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	2902	{
bogdanm	0:9b334a45a8ff	2903	/* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */
bogdanm	0:9b334a45a8ff	2904	__HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI \| I2C_IT_TCI\| I2C_IT_STOPI\| I2C_IT_NACKI \| I2C_IT_ADDRI \| I2C_IT_RXI \| I2C_IT_RXI );
bogdanm	0:9b334a45a8ff	2905
bogdanm	0:9b334a45a8ff	2906	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	2907	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	2908
bogdanm	0:9b334a45a8ff	2909	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	2910	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	2911
bogdanm	0:9b334a45a8ff	2912	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2913
bogdanm	0:9b334a45a8ff	2914	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2915	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2916
bogdanm	0:9b334a45a8ff	2917	HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2918	}
bogdanm	0:9b334a45a8ff	2919
bogdanm	0:9b334a45a8ff	2920	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2921	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2922
bogdanm	0:9b334a45a8ff	2923	return HAL_OK;
bogdanm	0:9b334a45a8ff	2924	}
bogdanm	0:9b334a45a8ff	2925
bogdanm	0:9b334a45a8ff	2926	/**
bogdanm	0:9b334a45a8ff	2927	* @brief Master sends target device address followed by internal memory address for write request.
bogdanm	0:9b334a45a8ff	2928	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2929	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2930	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2931	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	2932	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	2933	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	2934	* @retval HAL status
bogdanm	0:9b334a45a8ff	2935	*/
bogdanm	0:9b334a45a8ff	2936	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	2937	{
bogdanm	0:9b334a45a8ff	2938	I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	2939
bogdanm	0:9b334a45a8ff	2940	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	2941	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2942	{
bogdanm	0:9b334a45a8ff	2943	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2944	{
bogdanm	0:9b334a45a8ff	2945	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2946	}
bogdanm	0:9b334a45a8ff	2947	else
bogdanm	0:9b334a45a8ff	2948	{
bogdanm	0:9b334a45a8ff	2949	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2950	}
bogdanm	0:9b334a45a8ff	2951	}
bogdanm	0:9b334a45a8ff	2952
bogdanm	0:9b334a45a8ff	2953	/* If Memory address size is 8Bit */
bogdanm	0:9b334a45a8ff	2954	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm	0:9b334a45a8ff	2955	{
bogdanm	0:9b334a45a8ff	2956	/* Send Memory Address */
bogdanm	0:9b334a45a8ff	2957	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	2958	}
bogdanm	0:9b334a45a8ff	2959	/* If Memory address size is 16Bit */
bogdanm	0:9b334a45a8ff	2960	else
bogdanm	0:9b334a45a8ff	2961	{
bogdanm	0:9b334a45a8ff	2962	/* Send MSB of Memory Address */
bogdanm	0:9b334a45a8ff	2963	hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm	0:9b334a45a8ff	2964
bogdanm	0:9b334a45a8ff	2965	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	2966	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2967	{
bogdanm	0:9b334a45a8ff	2968	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2969	{
bogdanm	0:9b334a45a8ff	2970	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2971	}
bogdanm	0:9b334a45a8ff	2972	else
bogdanm	0:9b334a45a8ff	2973	{
bogdanm	0:9b334a45a8ff	2974	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2975	}
bogdanm	0:9b334a45a8ff	2976	}
bogdanm	0:9b334a45a8ff	2977
bogdanm	0:9b334a45a8ff	2978	/* Send LSB of Memory Address */
bogdanm	0:9b334a45a8ff	2979	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	2980	}
bogdanm	0:9b334a45a8ff	2981
bogdanm	0:9b334a45a8ff	2982	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	2983	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2984	{
bogdanm	0:9b334a45a8ff	2985	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2986	}
bogdanm	0:9b334a45a8ff	2987
bogdanm	0:9b334a45a8ff	2988	return HAL_OK;
bogdanm	0:9b334a45a8ff	2989	}
bogdanm	0:9b334a45a8ff	2990
bogdanm	0:9b334a45a8ff	2991	/**
bogdanm	0:9b334a45a8ff	2992	* @brief Master sends target device address followed by internal memory address for read request.
bogdanm	0:9b334a45a8ff	2993	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2994	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2995	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2996	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	2997	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	2998	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	2999	* @retval HAL status
bogdanm	0:9b334a45a8ff	3000	*/
bogdanm	0:9b334a45a8ff	3001	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3002	{
bogdanm	0:9b334a45a8ff	3003	I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm	0:9b334a45a8ff	3004
bogdanm	0:9b334a45a8ff	3005	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3006	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3007	{
bogdanm	0:9b334a45a8ff	3008	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3009	{
bogdanm	0:9b334a45a8ff	3010	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3011	}
bogdanm	0:9b334a45a8ff	3012	else
bogdanm	0:9b334a45a8ff	3013	{
bogdanm	0:9b334a45a8ff	3014	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3015	}
bogdanm	0:9b334a45a8ff	3016	}
bogdanm	0:9b334a45a8ff	3017
bogdanm	0:9b334a45a8ff	3018	/* If Memory address size is 8Bit */
bogdanm	0:9b334a45a8ff	3019	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm	0:9b334a45a8ff	3020	{
bogdanm	0:9b334a45a8ff	3021	/* Send Memory Address */
bogdanm	0:9b334a45a8ff	3022	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3023	}
bogdanm	0:9b334a45a8ff	3024	/* If Memory address size is 16Bit */
bogdanm	0:9b334a45a8ff	3025	else
bogdanm	0:9b334a45a8ff	3026	{
bogdanm	0:9b334a45a8ff	3027	/* Send MSB of Memory Address */
bogdanm	0:9b334a45a8ff	3028	hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm	0:9b334a45a8ff	3029
bogdanm	0:9b334a45a8ff	3030	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3031	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3032	{
bogdanm	0:9b334a45a8ff	3033	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3034	{
bogdanm	0:9b334a45a8ff	3035	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3036	}
bogdanm	0:9b334a45a8ff	3037	else
bogdanm	0:9b334a45a8ff	3038	{
bogdanm	0:9b334a45a8ff	3039	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3040	}
bogdanm	0:9b334a45a8ff	3041	}
bogdanm	0:9b334a45a8ff	3042
bogdanm	0:9b334a45a8ff	3043	/* Send LSB of Memory Address */
bogdanm	0:9b334a45a8ff	3044	hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3045	}
bogdanm	0:9b334a45a8ff	3046
bogdanm	0:9b334a45a8ff	3047	/* Wait until TC flag is set */
bogdanm	0:9b334a45a8ff	3048	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3049	{
bogdanm	0:9b334a45a8ff	3050	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3051	}
bogdanm	0:9b334a45a8ff	3052
bogdanm	0:9b334a45a8ff	3053	return HAL_OK;
bogdanm	0:9b334a45a8ff	3054	}
bogdanm	0:9b334a45a8ff	3055
bogdanm	0:9b334a45a8ff	3056	/**
bogdanm	0:9b334a45a8ff	3057	* @brief DMA I2C master transmit process complete callback.
bogdanm	0:9b334a45a8ff	3058	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3059	* @retval None
bogdanm	0:9b334a45a8ff	3060	*/
bogdanm	0:9b334a45a8ff	3061	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3062	{
bogdanm	0:9b334a45a8ff	3063	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	3064	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3065
bogdanm	0:9b334a45a8ff	3066	/* Check if last DMA request was done with RELOAD */
bogdanm	0:9b334a45a8ff	3067	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3068	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3069	{
bogdanm	0:9b334a45a8ff	3070	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3071	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm	0:9b334a45a8ff	3072	{
bogdanm	0:9b334a45a8ff	3073	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3074	}
bogdanm	0:9b334a45a8ff	3075
bogdanm	0:9b334a45a8ff	3076	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3077	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3078
bogdanm	0:9b334a45a8ff	3079	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3080	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3081	{
bogdanm	0:9b334a45a8ff	3082	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3083	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3084	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3085	{
bogdanm	0:9b334a45a8ff	3086	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3087	{
bogdanm	0:9b334a45a8ff	3088	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3089	}
bogdanm	0:9b334a45a8ff	3090	else
bogdanm	0:9b334a45a8ff	3091	{
bogdanm	0:9b334a45a8ff	3092	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3093	}
bogdanm	0:9b334a45a8ff	3094	}
bogdanm	0:9b334a45a8ff	3095
bogdanm	0:9b334a45a8ff	3096	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3097	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3098
bogdanm	0:9b334a45a8ff	3099	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3100	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3101
bogdanm	0:9b334a45a8ff	3102	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3103
bogdanm	0:9b334a45a8ff	3104	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3105	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3106	}
bogdanm	0:9b334a45a8ff	3107	else
bogdanm	0:9b334a45a8ff	3108	{
bogdanm	0:9b334a45a8ff	3109	hi2c->pBuffPtr += hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3110	hi2c->XferCount -= hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3111	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	3112	{
bogdanm	0:9b334a45a8ff	3113	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	3114	}
bogdanm	0:9b334a45a8ff	3115	else
bogdanm	0:9b334a45a8ff	3116	{
bogdanm	0:9b334a45a8ff	3117	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	3118	}
bogdanm	0:9b334a45a8ff	3119
bogdanm	0:9b334a45a8ff	3120	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm	0:9b334a45a8ff	3121
bogdanm	0:9b334a45a8ff	3122	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	3123	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	3124
bogdanm	0:9b334a45a8ff	3125	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	3126	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3127	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3128	{
bogdanm	0:9b334a45a8ff	3129	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3130	}
bogdanm	0:9b334a45a8ff	3131	else
bogdanm	0:9b334a45a8ff	3132	{
bogdanm	0:9b334a45a8ff	3133	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3134	}
bogdanm	0:9b334a45a8ff	3135
bogdanm	0:9b334a45a8ff	3136	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3137	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm	0:9b334a45a8ff	3138	{
bogdanm	0:9b334a45a8ff	3139	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3140	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3141	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3142	{
bogdanm	0:9b334a45a8ff	3143	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3144	{
bogdanm	0:9b334a45a8ff	3145	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3146	}
bogdanm	0:9b334a45a8ff	3147	else
bogdanm	0:9b334a45a8ff	3148	{
bogdanm	0:9b334a45a8ff	3149	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3150	}
bogdanm	0:9b334a45a8ff	3151	}
bogdanm	0:9b334a45a8ff	3152
bogdanm	0:9b334a45a8ff	3153	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3154	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3155
bogdanm	0:9b334a45a8ff	3156	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3157	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3158
bogdanm	0:9b334a45a8ff	3159	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3160
bogdanm	0:9b334a45a8ff	3161	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3162	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3163	}
bogdanm	0:9b334a45a8ff	3164	else
bogdanm	0:9b334a45a8ff	3165	{
bogdanm	0:9b334a45a8ff	3166	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	3167	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3168	}
bogdanm	0:9b334a45a8ff	3169	}
bogdanm	0:9b334a45a8ff	3170	}
bogdanm	0:9b334a45a8ff	3171	else
bogdanm	0:9b334a45a8ff	3172	{
bogdanm	0:9b334a45a8ff	3173	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3174	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3175	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3176	{
bogdanm	0:9b334a45a8ff	3177	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3178	{
bogdanm	0:9b334a45a8ff	3179	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3180	}
bogdanm	0:9b334a45a8ff	3181	else
bogdanm	0:9b334a45a8ff	3182	{
bogdanm	0:9b334a45a8ff	3183	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3184	}
bogdanm	0:9b334a45a8ff	3185	}
bogdanm	0:9b334a45a8ff	3186
bogdanm	0:9b334a45a8ff	3187	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3188	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3189
bogdanm	0:9b334a45a8ff	3190	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3191	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3192
bogdanm	0:9b334a45a8ff	3193	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3194	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3195
bogdanm	0:9b334a45a8ff	3196	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3197
bogdanm	0:9b334a45a8ff	3198	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3199
bogdanm	0:9b334a45a8ff	3200	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3201	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3202	{
bogdanm	0:9b334a45a8ff	3203	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3204	}
bogdanm	0:9b334a45a8ff	3205	else
bogdanm	0:9b334a45a8ff	3206	{
bogdanm	0:9b334a45a8ff	3207	HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3208	}
bogdanm	0:9b334a45a8ff	3209	}
bogdanm	0:9b334a45a8ff	3210	}
bogdanm	0:9b334a45a8ff	3211
bogdanm	0:9b334a45a8ff	3212	/**
bogdanm	0:9b334a45a8ff	3213	* @brief DMA I2C slave transmit process complete callback.
bogdanm	0:9b334a45a8ff	3214	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3215	* @retval None
bogdanm	0:9b334a45a8ff	3216	*/
bogdanm	0:9b334a45a8ff	3217	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3218	{
bogdanm	0:9b334a45a8ff	3219	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3220
bogdanm	0:9b334a45a8ff	3221	/* Wait until STOP flag is set */
bogdanm	0:9b334a45a8ff	3222	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3223	{
bogdanm	0:9b334a45a8ff	3224	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3225	{
bogdanm	0:9b334a45a8ff	3226	/* Normal Use case, a AF is generated by master */
bogdanm	0:9b334a45a8ff	3227	/* to inform slave the end of transfer */
bogdanm	0:9b334a45a8ff	3228	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	3229	}
bogdanm	0:9b334a45a8ff	3230	else
bogdanm	0:9b334a45a8ff	3231	{
bogdanm	0:9b334a45a8ff	3232	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3233	}
bogdanm	0:9b334a45a8ff	3234	}
bogdanm	0:9b334a45a8ff	3235
bogdanm	0:9b334a45a8ff	3236	/* Clear STOP flag */
bogdanm	0:9b334a45a8ff	3237	__HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3238
bogdanm	0:9b334a45a8ff	3239	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3240	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm	0:9b334a45a8ff	3241	{
bogdanm	0:9b334a45a8ff	3242	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3243	}
bogdanm	0:9b334a45a8ff	3244
bogdanm	0:9b334a45a8ff	3245	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3246	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3247
bogdanm	0:9b334a45a8ff	3248	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3249
bogdanm	0:9b334a45a8ff	3250	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3251
bogdanm	0:9b334a45a8ff	3252	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3253	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3254	{
bogdanm	0:9b334a45a8ff	3255	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3256	}
bogdanm	0:9b334a45a8ff	3257	else
bogdanm	0:9b334a45a8ff	3258	{
bogdanm	0:9b334a45a8ff	3259	HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3260	}
bogdanm	0:9b334a45a8ff	3261	}
bogdanm	0:9b334a45a8ff	3262
bogdanm	0:9b334a45a8ff	3263	/**
bogdanm	0:9b334a45a8ff	3264	* @brief DMA I2C master receive process complete callback
bogdanm	0:9b334a45a8ff	3265	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3266	* @retval None
bogdanm	0:9b334a45a8ff	3267	*/
bogdanm	0:9b334a45a8ff	3268	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3269	{
bogdanm	0:9b334a45a8ff	3270	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3271	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	3272
bogdanm	0:9b334a45a8ff	3273	/* Check if last DMA request was done with RELOAD */
bogdanm	0:9b334a45a8ff	3274	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3275	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3276	{
bogdanm	0:9b334a45a8ff	3277	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3278	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm	0:9b334a45a8ff	3279	{
bogdanm	0:9b334a45a8ff	3280	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3281	}
bogdanm	0:9b334a45a8ff	3282
bogdanm	0:9b334a45a8ff	3283	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3284	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3285
bogdanm	0:9b334a45a8ff	3286	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3287	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3288	{
bogdanm	0:9b334a45a8ff	3289	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3290	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3291	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3292	{
bogdanm	0:9b334a45a8ff	3293	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3294	{
bogdanm	0:9b334a45a8ff	3295	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3296	}
bogdanm	0:9b334a45a8ff	3297	else
bogdanm	0:9b334a45a8ff	3298	{
bogdanm	0:9b334a45a8ff	3299	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3300	}
bogdanm	0:9b334a45a8ff	3301	}
bogdanm	0:9b334a45a8ff	3302
bogdanm	0:9b334a45a8ff	3303	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3304	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3305
bogdanm	0:9b334a45a8ff	3306	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3307	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3308
bogdanm	0:9b334a45a8ff	3309	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3310
bogdanm	0:9b334a45a8ff	3311	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3312	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3313	}
bogdanm	0:9b334a45a8ff	3314	else
bogdanm	0:9b334a45a8ff	3315	{
bogdanm	0:9b334a45a8ff	3316	hi2c->pBuffPtr += hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3317	hi2c->XferCount -= hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3318	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	3319	{
bogdanm	0:9b334a45a8ff	3320	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	3321	}
bogdanm	0:9b334a45a8ff	3322	else
bogdanm	0:9b334a45a8ff	3323	{
bogdanm	0:9b334a45a8ff	3324	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	3325	}
bogdanm	0:9b334a45a8ff	3326
bogdanm	0:9b334a45a8ff	3327	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm	0:9b334a45a8ff	3328
bogdanm	0:9b334a45a8ff	3329	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	3330	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	3331
bogdanm	0:9b334a45a8ff	3332	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	3333	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3334	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3335	{
bogdanm	0:9b334a45a8ff	3336	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3337	}
bogdanm	0:9b334a45a8ff	3338	else
bogdanm	0:9b334a45a8ff	3339	{
bogdanm	0:9b334a45a8ff	3340	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3341	}
bogdanm	0:9b334a45a8ff	3342
bogdanm	0:9b334a45a8ff	3343	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	3344	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	3345	{
bogdanm	0:9b334a45a8ff	3346	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3347	}
bogdanm	0:9b334a45a8ff	3348
bogdanm	0:9b334a45a8ff	3349	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3350	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3351	{
bogdanm	0:9b334a45a8ff	3352	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3353	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3354	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3355	{
bogdanm	0:9b334a45a8ff	3356	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3357	{
bogdanm	0:9b334a45a8ff	3358	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3359	}
bogdanm	0:9b334a45a8ff	3360	else
bogdanm	0:9b334a45a8ff	3361	{
bogdanm	0:9b334a45a8ff	3362	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3363	}
bogdanm	0:9b334a45a8ff	3364	}
bogdanm	0:9b334a45a8ff	3365
bogdanm	0:9b334a45a8ff	3366	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3367	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3368
bogdanm	0:9b334a45a8ff	3369	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3370	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3371
bogdanm	0:9b334a45a8ff	3372	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3373
bogdanm	0:9b334a45a8ff	3374	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3375
bogdanm	0:9b334a45a8ff	3376	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3377	}
bogdanm	0:9b334a45a8ff	3378	else
bogdanm	0:9b334a45a8ff	3379	{
bogdanm	0:9b334a45a8ff	3380	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	3381	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3382	}
bogdanm	0:9b334a45a8ff	3383	}
bogdanm	0:9b334a45a8ff	3384	}
bogdanm	0:9b334a45a8ff	3385	else
bogdanm	0:9b334a45a8ff	3386	{
bogdanm	0:9b334a45a8ff	3387	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3388	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3389	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3390	{
bogdanm	0:9b334a45a8ff	3391	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3392	{
bogdanm	0:9b334a45a8ff	3393	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3394	}
bogdanm	0:9b334a45a8ff	3395	else
bogdanm	0:9b334a45a8ff	3396	{
bogdanm	0:9b334a45a8ff	3397	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3398	}
bogdanm	0:9b334a45a8ff	3399	}
bogdanm	0:9b334a45a8ff	3400
bogdanm	0:9b334a45a8ff	3401	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3402	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3403
bogdanm	0:9b334a45a8ff	3404	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3405	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3406
bogdanm	0:9b334a45a8ff	3407	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3408	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3409
bogdanm	0:9b334a45a8ff	3410	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3411
bogdanm	0:9b334a45a8ff	3412	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3413
bogdanm	0:9b334a45a8ff	3414	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3415	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3416	{
bogdanm	0:9b334a45a8ff	3417	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3418	}
bogdanm	0:9b334a45a8ff	3419	else
bogdanm	0:9b334a45a8ff	3420	{
bogdanm	0:9b334a45a8ff	3421	HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3422	}
bogdanm	0:9b334a45a8ff	3423	}
bogdanm	0:9b334a45a8ff	3424	}
bogdanm	0:9b334a45a8ff	3425
bogdanm	0:9b334a45a8ff	3426	/**
bogdanm	0:9b334a45a8ff	3427	* @brief DMA I2C slave receive process complete callback.
bogdanm	0:9b334a45a8ff	3428	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3429	* @retval None
bogdanm	0:9b334a45a8ff	3430	*/
bogdanm	0:9b334a45a8ff	3431	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3432	{
bogdanm	0:9b334a45a8ff	3433	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3434
bogdanm	0:9b334a45a8ff	3435	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3436	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3437	{
bogdanm	0:9b334a45a8ff	3438	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3439	{
bogdanm	0:9b334a45a8ff	3440	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3441	}
bogdanm	0:9b334a45a8ff	3442	else
bogdanm	0:9b334a45a8ff	3443	{
bogdanm	0:9b334a45a8ff	3444	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3445	}
bogdanm	0:9b334a45a8ff	3446	}
bogdanm	0:9b334a45a8ff	3447
bogdanm	0:9b334a45a8ff	3448	/* Clear STOPF flag */
bogdanm	0:9b334a45a8ff	3449	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3450
bogdanm	0:9b334a45a8ff	3451	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3452	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm	0:9b334a45a8ff	3453	{
bogdanm	0:9b334a45a8ff	3454	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3455	}
bogdanm	0:9b334a45a8ff	3456
bogdanm	0:9b334a45a8ff	3457	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3458	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3459
bogdanm	0:9b334a45a8ff	3460	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	3461	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	3462
bogdanm	0:9b334a45a8ff	3463	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3464
bogdanm	0:9b334a45a8ff	3465	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3466
bogdanm	0:9b334a45a8ff	3467	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3468	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3469	{
bogdanm	0:9b334a45a8ff	3470	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3471	}
bogdanm	0:9b334a45a8ff	3472	else
bogdanm	0:9b334a45a8ff	3473	{
bogdanm	0:9b334a45a8ff	3474	HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3475	}
bogdanm	0:9b334a45a8ff	3476	}
bogdanm	0:9b334a45a8ff	3477
bogdanm	0:9b334a45a8ff	3478	/**
bogdanm	0:9b334a45a8ff	3479	* @brief DMA I2C Memory Write process complete callback
bogdanm	0:9b334a45a8ff	3480	* @param hdma : DMA handle
bogdanm	0:9b334a45a8ff	3481	* @retval None
bogdanm	0:9b334a45a8ff	3482	*/
bogdanm	0:9b334a45a8ff	3483	static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3484	{
bogdanm	0:9b334a45a8ff	3485	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	3486	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	3487
bogdanm	0:9b334a45a8ff	3488	/* Check if last DMA request was done with RELOAD */
bogdanm	0:9b334a45a8ff	3489	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3490	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3491	{
bogdanm	0:9b334a45a8ff	3492	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3493	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm	0:9b334a45a8ff	3494	{
bogdanm	0:9b334a45a8ff	3495	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3496	}
bogdanm	0:9b334a45a8ff	3497
bogdanm	0:9b334a45a8ff	3498	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3499	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3500
bogdanm	0:9b334a45a8ff	3501	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3502	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3503	{
bogdanm	0:9b334a45a8ff	3504	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3505	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3506	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3507	{
bogdanm	0:9b334a45a8ff	3508	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3509	{
bogdanm	0:9b334a45a8ff	3510	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3511	}
bogdanm	0:9b334a45a8ff	3512	else
bogdanm	0:9b334a45a8ff	3513	{
bogdanm	0:9b334a45a8ff	3514	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3515	}
bogdanm	0:9b334a45a8ff	3516	}
bogdanm	0:9b334a45a8ff	3517
bogdanm	0:9b334a45a8ff	3518	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3519	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3520
bogdanm	0:9b334a45a8ff	3521	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3522	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3523
bogdanm	0:9b334a45a8ff	3524	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3525
bogdanm	0:9b334a45a8ff	3526	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3527	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3528	}
bogdanm	0:9b334a45a8ff	3529	else
bogdanm	0:9b334a45a8ff	3530	{
bogdanm	0:9b334a45a8ff	3531	hi2c->pBuffPtr += hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3532	hi2c->XferCount -= hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3533	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	3534	{
bogdanm	0:9b334a45a8ff	3535	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	3536	}
bogdanm	0:9b334a45a8ff	3537	else
bogdanm	0:9b334a45a8ff	3538	{
bogdanm	0:9b334a45a8ff	3539	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	3540	}
bogdanm	0:9b334a45a8ff	3541
bogdanm	0:9b334a45a8ff	3542	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm	0:9b334a45a8ff	3543
bogdanm	0:9b334a45a8ff	3544	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	3545	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	3546
bogdanm	0:9b334a45a8ff	3547	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	3548	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3549	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3550	{
bogdanm	0:9b334a45a8ff	3551	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3552	}
bogdanm	0:9b334a45a8ff	3553	else
bogdanm	0:9b334a45a8ff	3554	{
bogdanm	0:9b334a45a8ff	3555	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3556	}
bogdanm	0:9b334a45a8ff	3557
bogdanm	0:9b334a45a8ff	3558	/* Wait until TXIS flag is set */
bogdanm	0:9b334a45a8ff	3559	if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm	0:9b334a45a8ff	3560	{
bogdanm	0:9b334a45a8ff	3561	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3562	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3563	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3564	{
bogdanm	0:9b334a45a8ff	3565	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3566	{
bogdanm	0:9b334a45a8ff	3567	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3568	}
bogdanm	0:9b334a45a8ff	3569	else
bogdanm	0:9b334a45a8ff	3570	{
bogdanm	0:9b334a45a8ff	3571	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3572	}
bogdanm	0:9b334a45a8ff	3573	}
bogdanm	0:9b334a45a8ff	3574
bogdanm	0:9b334a45a8ff	3575	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3576	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3577
bogdanm	0:9b334a45a8ff	3578	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3579	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3580
bogdanm	0:9b334a45a8ff	3581	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3582
bogdanm	0:9b334a45a8ff	3583	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3584	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3585	}
bogdanm	0:9b334a45a8ff	3586	else
bogdanm	0:9b334a45a8ff	3587	{
bogdanm	0:9b334a45a8ff	3588	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	3589	hi2c->Instance->CR1 \|= I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3590	}
bogdanm	0:9b334a45a8ff	3591	}
bogdanm	0:9b334a45a8ff	3592	}
bogdanm	0:9b334a45a8ff	3593	else
bogdanm	0:9b334a45a8ff	3594	{
bogdanm	0:9b334a45a8ff	3595	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3596	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3597	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3598	{
bogdanm	0:9b334a45a8ff	3599	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3600	{
bogdanm	0:9b334a45a8ff	3601	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3602	}
bogdanm	0:9b334a45a8ff	3603	else
bogdanm	0:9b334a45a8ff	3604	{
bogdanm	0:9b334a45a8ff	3605	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3606	}
bogdanm	0:9b334a45a8ff	3607	}
bogdanm	0:9b334a45a8ff	3608
bogdanm	0:9b334a45a8ff	3609	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3610	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3611
bogdanm	0:9b334a45a8ff	3612	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3613	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3614
bogdanm	0:9b334a45a8ff	3615	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3616	hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm	0:9b334a45a8ff	3617
bogdanm	0:9b334a45a8ff	3618	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3619
bogdanm	0:9b334a45a8ff	3620	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3621
bogdanm	0:9b334a45a8ff	3622	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3623	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3624	{
bogdanm	0:9b334a45a8ff	3625	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3626	}
bogdanm	0:9b334a45a8ff	3627	else
bogdanm	0:9b334a45a8ff	3628	{
bogdanm	0:9b334a45a8ff	3629	HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3630	}
bogdanm	0:9b334a45a8ff	3631	}
bogdanm	0:9b334a45a8ff	3632	}
bogdanm	0:9b334a45a8ff	3633
bogdanm	0:9b334a45a8ff	3634	/**
bogdanm	0:9b334a45a8ff	3635	* @brief DMA I2C Memory Read process complete callback
bogdanm	0:9b334a45a8ff	3636	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3637	* @retval None
bogdanm	0:9b334a45a8ff	3638	*/
bogdanm	0:9b334a45a8ff	3639	static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3640	{
bogdanm	0:9b334a45a8ff	3641	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	3642	uint16_t DevAddress;
bogdanm	0:9b334a45a8ff	3643
bogdanm	0:9b334a45a8ff	3644	/* Check if last DMA request was done with RELOAD */
bogdanm	0:9b334a45a8ff	3645	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3646	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3647	{
bogdanm	0:9b334a45a8ff	3648	/* Wait until TCR flag is set */
bogdanm	0:9b334a45a8ff	3649	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm	0:9b334a45a8ff	3650	{
bogdanm	0:9b334a45a8ff	3651	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3652	}
bogdanm	0:9b334a45a8ff	3653
bogdanm	0:9b334a45a8ff	3654	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3655	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3656
bogdanm	0:9b334a45a8ff	3657	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3658	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3659	{
bogdanm	0:9b334a45a8ff	3660	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3661	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3662	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3663	{
bogdanm	0:9b334a45a8ff	3664	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3665	{
bogdanm	0:9b334a45a8ff	3666	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3667	}
bogdanm	0:9b334a45a8ff	3668	else
bogdanm	0:9b334a45a8ff	3669	{
bogdanm	0:9b334a45a8ff	3670	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3671	}
bogdanm	0:9b334a45a8ff	3672	}
bogdanm	0:9b334a45a8ff	3673
bogdanm	0:9b334a45a8ff	3674	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3675	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3676
bogdanm	0:9b334a45a8ff	3677	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3678	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3679
bogdanm	0:9b334a45a8ff	3680	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3681
bogdanm	0:9b334a45a8ff	3682	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3683	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3684	}
bogdanm	0:9b334a45a8ff	3685	else
bogdanm	0:9b334a45a8ff	3686	{
bogdanm	0:9b334a45a8ff	3687	hi2c->pBuffPtr += hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3688	hi2c->XferCount -= hi2c->XferSize;
bogdanm	0:9b334a45a8ff	3689	if(hi2c->XferCount > 255)
bogdanm	0:9b334a45a8ff	3690	{
bogdanm	0:9b334a45a8ff	3691	hi2c->XferSize = 255;
bogdanm	0:9b334a45a8ff	3692	}
bogdanm	0:9b334a45a8ff	3693	else
bogdanm	0:9b334a45a8ff	3694	{
bogdanm	0:9b334a45a8ff	3695	hi2c->XferSize = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	3696	}
bogdanm	0:9b334a45a8ff	3697
bogdanm	0:9b334a45a8ff	3698	DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm	0:9b334a45a8ff	3699
bogdanm	0:9b334a45a8ff	3700	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	3701	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
bogdanm	0:9b334a45a8ff	3702
bogdanm	0:9b334a45a8ff	3703	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	3704	/* Set NBYTES to write and reload if size > 255 */
bogdanm	0:9b334a45a8ff	3705	if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm	0:9b334a45a8ff	3706	{
bogdanm	0:9b334a45a8ff	3707	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3708	}
bogdanm	0:9b334a45a8ff	3709	else
bogdanm	0:9b334a45a8ff	3710	{
bogdanm	0:9b334a45a8ff	3711	I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm	0:9b334a45a8ff	3712	}
bogdanm	0:9b334a45a8ff	3713
bogdanm	0:9b334a45a8ff	3714	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	3715	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm	0:9b334a45a8ff	3716	{
bogdanm	0:9b334a45a8ff	3717	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3718	}
bogdanm	0:9b334a45a8ff	3719
bogdanm	0:9b334a45a8ff	3720	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3721	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3722	{
bogdanm	0:9b334a45a8ff	3723	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3724	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3725	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3726	{
bogdanm	0:9b334a45a8ff	3727	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3728	{
bogdanm	0:9b334a45a8ff	3729	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3730	}
bogdanm	0:9b334a45a8ff	3731	else
bogdanm	0:9b334a45a8ff	3732	{
bogdanm	0:9b334a45a8ff	3733	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3734	}
bogdanm	0:9b334a45a8ff	3735	}
bogdanm	0:9b334a45a8ff	3736
bogdanm	0:9b334a45a8ff	3737	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3738	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3739
bogdanm	0:9b334a45a8ff	3740	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3741	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3742
bogdanm	0:9b334a45a8ff	3743	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3744
bogdanm	0:9b334a45a8ff	3745	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3746	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3747	}
bogdanm	0:9b334a45a8ff	3748	else
bogdanm	0:9b334a45a8ff	3749	{
bogdanm	0:9b334a45a8ff	3750	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	3751	hi2c->Instance->CR1 \|= I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3752	}
bogdanm	0:9b334a45a8ff	3753	}
bogdanm	0:9b334a45a8ff	3754	}
bogdanm	0:9b334a45a8ff	3755	else
bogdanm	0:9b334a45a8ff	3756	{
bogdanm	0:9b334a45a8ff	3757	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm	0:9b334a45a8ff	3758	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3759	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm	0:9b334a45a8ff	3760	{
bogdanm	0:9b334a45a8ff	3761	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3762	{
bogdanm	0:9b334a45a8ff	3763	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3764	}
bogdanm	0:9b334a45a8ff	3765	else
bogdanm	0:9b334a45a8ff	3766	{
bogdanm	0:9b334a45a8ff	3767	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3768	}
bogdanm	0:9b334a45a8ff	3769	}
bogdanm	0:9b334a45a8ff	3770
bogdanm	0:9b334a45a8ff	3771	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3772	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3773
bogdanm	0:9b334a45a8ff	3774	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3775	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3776
bogdanm	0:9b334a45a8ff	3777	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3778	hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm	0:9b334a45a8ff	3779
bogdanm	0:9b334a45a8ff	3780	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3781
bogdanm	0:9b334a45a8ff	3782	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3783
bogdanm	0:9b334a45a8ff	3784	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3785	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3786	{
bogdanm	0:9b334a45a8ff	3787	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3788	}
bogdanm	0:9b334a45a8ff	3789	else
bogdanm	0:9b334a45a8ff	3790	{
bogdanm	0:9b334a45a8ff	3791	HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3792	}
bogdanm	0:9b334a45a8ff	3793	}
bogdanm	0:9b334a45a8ff	3794	}
bogdanm	0:9b334a45a8ff	3795
bogdanm	0:9b334a45a8ff	3796	/**
bogdanm	0:9b334a45a8ff	3797	* @brief DMA I2C communication error callback.
bogdanm	0:9b334a45a8ff	3798	* @param hdma : DMA handle
bogdanm	0:9b334a45a8ff	3799	* @retval None
bogdanm	0:9b334a45a8ff	3800	*/
bogdanm	0:9b334a45a8ff	3801	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3802	{
bogdanm	0:9b334a45a8ff	3803	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	3804
bogdanm	0:9b334a45a8ff	3805	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	3806	hi2c->Instance->CR2 \|= I2C_CR2_NACK;
bogdanm	0:9b334a45a8ff	3807
bogdanm	0:9b334a45a8ff	3808	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3809
bogdanm	0:9b334a45a8ff	3810	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3811
bogdanm	0:9b334a45a8ff	3812	hi2c->ErrorCode \|= HAL_I2C_ERROR_DMA;
bogdanm	0:9b334a45a8ff	3813
bogdanm	0:9b334a45a8ff	3814	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3815	}
bogdanm	0:9b334a45a8ff	3816
bogdanm	0:9b334a45a8ff	3817	/**
bogdanm	0:9b334a45a8ff	3818	* @brief This function handles I2C Communication Timeout.
bogdanm	0:9b334a45a8ff	3819	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3820	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3821	* @param Flag: specifies the I2C flag to check.
bogdanm	0:9b334a45a8ff	3822	* @param Status: The new Flag status (SET or RESET).
bogdanm	0:9b334a45a8ff	3823	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3824	* @retval HAL status
bogdanm	0:9b334a45a8ff	3825	*/
bogdanm	0:9b334a45a8ff	3826	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3827	{
bogdanm	0:9b334a45a8ff	3828	uint32_t tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	3829
bogdanm	0:9b334a45a8ff	3830	/* Wait until flag is set */
bogdanm	0:9b334a45a8ff	3831	if(Status == RESET)
bogdanm	0:9b334a45a8ff	3832	{
bogdanm	0:9b334a45a8ff	3833	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
bogdanm	0:9b334a45a8ff	3834	{
bogdanm	0:9b334a45a8ff	3835	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3836	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	3837	{
bogdanm	0:9b334a45a8ff	3838	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3839	{
bogdanm	0:9b334a45a8ff	3840	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3841	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3842	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3843	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3844	}
bogdanm	0:9b334a45a8ff	3845	}
bogdanm	0:9b334a45a8ff	3846	}
bogdanm	0:9b334a45a8ff	3847	}
bogdanm	0:9b334a45a8ff	3848	else
bogdanm	0:9b334a45a8ff	3849	{
bogdanm	0:9b334a45a8ff	3850	while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
bogdanm	0:9b334a45a8ff	3851	{
bogdanm	0:9b334a45a8ff	3852	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3853	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	3854	{
bogdanm	0:9b334a45a8ff	3855	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3856	{
bogdanm	0:9b334a45a8ff	3857	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3858	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3859	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3860	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3861	}
bogdanm	0:9b334a45a8ff	3862	}
bogdanm	0:9b334a45a8ff	3863	}
bogdanm	0:9b334a45a8ff	3864	}
bogdanm	0:9b334a45a8ff	3865	return HAL_OK;
bogdanm	0:9b334a45a8ff	3866	}
bogdanm	0:9b334a45a8ff	3867
bogdanm	0:9b334a45a8ff	3868	/**
bogdanm	0:9b334a45a8ff	3869	* @brief This function handles I2C Communication Timeout for specific usage of TXIS flag.
bogdanm	0:9b334a45a8ff	3870	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3871	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3872	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3873	* @retval HAL status
bogdanm	0:9b334a45a8ff	3874	*/
bogdanm	0:9b334a45a8ff	3875	static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3876	{
bogdanm	0:9b334a45a8ff	3877	uint32_t tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	3878
bogdanm	0:9b334a45a8ff	3879	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
bogdanm	0:9b334a45a8ff	3880	{
bogdanm	0:9b334a45a8ff	3881	/* Check if a NACK is detected */
bogdanm	0:9b334a45a8ff	3882	if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3883	{
bogdanm	0:9b334a45a8ff	3884	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3885	}
bogdanm	0:9b334a45a8ff	3886
bogdanm	0:9b334a45a8ff	3887	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3888	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	3889	{
bogdanm	0:9b334a45a8ff	3890	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3891	{
bogdanm	0:9b334a45a8ff	3892	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3893	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3894
bogdanm	0:9b334a45a8ff	3895	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3896	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3897
bogdanm	0:9b334a45a8ff	3898	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3899	}
bogdanm	0:9b334a45a8ff	3900	}
bogdanm	0:9b334a45a8ff	3901	}
bogdanm	0:9b334a45a8ff	3902	return HAL_OK;
bogdanm	0:9b334a45a8ff	3903	}
bogdanm	0:9b334a45a8ff	3904
bogdanm	0:9b334a45a8ff	3905	/**
bogdanm	0:9b334a45a8ff	3906	* @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
bogdanm	0:9b334a45a8ff	3907	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3908	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3909	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3910	* @retval HAL status
bogdanm	0:9b334a45a8ff	3911	*/
bogdanm	0:9b334a45a8ff	3912	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3913	{
bogdanm	0:9b334a45a8ff	3914	uint32_t tickstart = 0x00;
bogdanm	0:9b334a45a8ff	3915	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	3916
bogdanm	0:9b334a45a8ff	3917	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
bogdanm	0:9b334a45a8ff	3918	{
bogdanm	0:9b334a45a8ff	3919	/* Check if a NACK is detected */
bogdanm	0:9b334a45a8ff	3920	if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3921	{
bogdanm	0:9b334a45a8ff	3922	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3923	}
bogdanm	0:9b334a45a8ff	3924
bogdanm	0:9b334a45a8ff	3925	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3926	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3927	{
bogdanm	0:9b334a45a8ff	3928	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3929	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3930
bogdanm	0:9b334a45a8ff	3931	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3932	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3933
bogdanm	0:9b334a45a8ff	3934	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3935	}
bogdanm	0:9b334a45a8ff	3936	}
bogdanm	0:9b334a45a8ff	3937	return HAL_OK;
bogdanm	0:9b334a45a8ff	3938	}
bogdanm	0:9b334a45a8ff	3939
bogdanm	0:9b334a45a8ff	3940	/**
bogdanm	0:9b334a45a8ff	3941	* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
bogdanm	0:9b334a45a8ff	3942	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3943	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3944	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3945	* @retval HAL status
bogdanm	0:9b334a45a8ff	3946	*/
bogdanm	0:9b334a45a8ff	3947	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3948	{
bogdanm	0:9b334a45a8ff	3949	uint32_t tickstart = 0x00;
bogdanm	0:9b334a45a8ff	3950	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	3951
bogdanm	0:9b334a45a8ff	3952	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
bogdanm	0:9b334a45a8ff	3953	{
bogdanm	0:9b334a45a8ff	3954	/* Check if a STOPF is detected */
bogdanm	0:9b334a45a8ff	3955	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm	0:9b334a45a8ff	3956	{
bogdanm	0:9b334a45a8ff	3957	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	3958	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	3959
bogdanm	0:9b334a45a8ff	3960	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	3961	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	3962
bogdanm	0:9b334a45a8ff	3963	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	3964	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3965
bogdanm	0:9b334a45a8ff	3966	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3967	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3968
bogdanm	0:9b334a45a8ff	3969	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3970	}
bogdanm	0:9b334a45a8ff	3971
bogdanm	0:9b334a45a8ff	3972	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3973	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3974	{
bogdanm	0:9b334a45a8ff	3975	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3976	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3977
bogdanm	0:9b334a45a8ff	3978	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3979	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3980
bogdanm	0:9b334a45a8ff	3981	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3982	}
bogdanm	0:9b334a45a8ff	3983	}
bogdanm	0:9b334a45a8ff	3984	return HAL_OK;
bogdanm	0:9b334a45a8ff	3985	}
bogdanm	0:9b334a45a8ff	3986
bogdanm	0:9b334a45a8ff	3987	/**
bogdanm	0:9b334a45a8ff	3988	* @brief This function handles Acknowledge failed detection during an I2C Communication.
bogdanm	0:9b334a45a8ff	3989	* @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3990	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	3991	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3992	* @retval HAL status
bogdanm	0:9b334a45a8ff	3993	*/
bogdanm	0:9b334a45a8ff	3994	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3995	{
bogdanm	0:9b334a45a8ff	3996	uint32_t tickstart = 0x00;
bogdanm	0:9b334a45a8ff	3997	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	3998
bogdanm	0:9b334a45a8ff	3999	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm	0:9b334a45a8ff	4000	{
bogdanm	0:9b334a45a8ff	4001	/* Generate stop if necessary only in case of I2C peripheral in MASTER mode */
bogdanm	0:9b334a45a8ff	4002	if((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) \|\| (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
bogdanm	0:9b334a45a8ff	4003	\|\| (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX))
bogdanm	0:9b334a45a8ff	4004	{
bogdanm	0:9b334a45a8ff	4005	/* No need to generate the STOP condition if AUTOEND mode is enabled */
bogdanm	0:9b334a45a8ff	4006	/* Generate the STOP condition only in case of SOFTEND mode is enabled */
bogdanm	0:9b334a45a8ff	4007	if((hi2c->Instance->CR2 & I2C_AUTOEND_MODE) != I2C_AUTOEND_MODE)
bogdanm	0:9b334a45a8ff	4008	{
bogdanm	0:9b334a45a8ff	4009	/* Generate Stop */
bogdanm	0:9b334a45a8ff	4010	hi2c->Instance->CR2 \|= I2C_CR2_STOP;
bogdanm	0:9b334a45a8ff	4011	}
bogdanm	0:9b334a45a8ff	4012	}
bogdanm	0:9b334a45a8ff	4013
bogdanm	0:9b334a45a8ff	4014	/* Wait until STOP Flag is reset */
bogdanm	0:9b334a45a8ff	4015	/* AutoEnd should be initiate after AF */
bogdanm	0:9b334a45a8ff	4016	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
bogdanm	0:9b334a45a8ff	4017	{
bogdanm	0:9b334a45a8ff	4018	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	4019	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	4020	{
bogdanm	0:9b334a45a8ff	4021	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	4022	{
bogdanm	0:9b334a45a8ff	4023	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	4024	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	4025	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	4026	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	4027	}
bogdanm	0:9b334a45a8ff	4028	}
bogdanm	0:9b334a45a8ff	4029	}
bogdanm	0:9b334a45a8ff	4030
bogdanm	0:9b334a45a8ff	4031	/* Clear NACKF Flag */
bogdanm	0:9b334a45a8ff	4032	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	4033
bogdanm	0:9b334a45a8ff	4034	/* Clear STOP Flag */
bogdanm	0:9b334a45a8ff	4035	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm	0:9b334a45a8ff	4036
bogdanm	0:9b334a45a8ff	4037	/* Clear Configuration Register 2 */
bogdanm	0:9b334a45a8ff	4038	I2C_RESET_CR2(hi2c);
bogdanm	0:9b334a45a8ff	4039
bogdanm	0:9b334a45a8ff	4040	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	4041	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	4042
bogdanm	0:9b334a45a8ff	4043	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	4044	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	4045
bogdanm	0:9b334a45a8ff	4046	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	4047	}
bogdanm	0:9b334a45a8ff	4048	return HAL_OK;
bogdanm	0:9b334a45a8ff	4049	}
bogdanm	0:9b334a45a8ff	4050
bogdanm	0:9b334a45a8ff	4051	/**
bogdanm	0:9b334a45a8ff	4052	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
bogdanm	0:9b334a45a8ff	4053	* @param hi2c: I2C handle.
bogdanm	0:9b334a45a8ff	4054	* @param DevAddress: specifies the slave address to be programmed.
bogdanm	0:9b334a45a8ff	4055	* @param Size: specifies the number of bytes to be programmed.
bogdanm	0:9b334a45a8ff	4056	* This parameter must be a value between 0 and 255.
bogdanm	0:9b334a45a8ff	4057	* @param Mode: new state of the I2C START condition generation.
bogdanm	0:9b334a45a8ff	4058	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	4059	* @arg I2C_RELOAD_MODE: Enable Reload mode .
bogdanm	0:9b334a45a8ff	4060	* @arg I2C_AUTOEND_MODE: Enable Automatic end mode.
bogdanm	0:9b334a45a8ff	4061	* @arg I2C_SOFTEND_MODE: Enable Software end mode.
bogdanm	0:9b334a45a8ff	4062	* @param Request: new state of the I2C START condition generation.
bogdanm	0:9b334a45a8ff	4063	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	4064	* @arg I2C_NO_STARTSTOP: Don't Generate stop and start condition.
bogdanm	0:9b334a45a8ff	4065	* @arg I2C_GENERATE_STOP: Generate stop condition (Size should be set to 0).
bogdanm	0:9b334a45a8ff	4066	* @arg I2C_GENERATE_START_READ: Generate Restart for read request.
bogdanm	0:9b334a45a8ff	4067	* @arg I2C_GENERATE_START_WRITE: Generate Restart for write request.
bogdanm	0:9b334a45a8ff	4068	* @retval None
bogdanm	0:9b334a45a8ff	4069	*/
bogdanm	0:9b334a45a8ff	4070	static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
bogdanm	0:9b334a45a8ff	4071	{
bogdanm	0:9b334a45a8ff	4072	uint32_t tmpreg = 0;
bogdanm	0:9b334a45a8ff	4073
bogdanm	0:9b334a45a8ff	4074	/* Check the parameters */
bogdanm	0:9b334a45a8ff	4075	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm	0:9b334a45a8ff	4076	assert_param(IS_TRANSFER_MODE(Mode));
bogdanm	0:9b334a45a8ff	4077	assert_param(IS_TRANSFER_REQUEST(Request));
bogdanm	0:9b334a45a8ff	4078
bogdanm	0:9b334a45a8ff	4079	/* Get the CR2 register value */
bogdanm	0:9b334a45a8ff	4080	tmpreg = hi2c->Instance->CR2;
bogdanm	0:9b334a45a8ff	4081
bogdanm	0:9b334a45a8ff	4082	/* clear tmpreg specific bits */
bogdanm	0:9b334a45a8ff	4083	tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD \| I2C_CR2_NBYTES \| I2C_CR2_RELOAD \| I2C_CR2_AUTOEND \| I2C_CR2_RD_WRN \| I2C_CR2_START \| I2C_CR2_STOP));
bogdanm	0:9b334a45a8ff	4084
bogdanm	0:9b334a45a8ff	4085	/* update tmpreg */
bogdanm	0:9b334a45a8ff	4086	tmpreg \|= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) \| (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) \| \
bogdanm	0:9b334a45a8ff	4087	(uint32_t)Mode \| (uint32_t)Request);
bogdanm	0:9b334a45a8ff	4088
bogdanm	0:9b334a45a8ff	4089	/* update CR2 register */
bogdanm	0:9b334a45a8ff	4090	hi2c->Instance->CR2 = tmpreg;
bogdanm	0:9b334a45a8ff	4091	}
bogdanm	0:9b334a45a8ff	4092
bogdanm	0:9b334a45a8ff	4093	/**
bogdanm	0:9b334a45a8ff	4094	* @}
bogdanm	0:9b334a45a8ff	4095	*/
bogdanm	0:9b334a45a8ff	4096
bogdanm	0:9b334a45a8ff	4097	/**
bogdanm	0:9b334a45a8ff	4098	* @}
bogdanm	0:9b334a45a8ff	4099	*/
bogdanm	0:9b334a45a8ff	4100
bogdanm	0:9b334a45a8ff	4101	#endif /* HAL_I2C_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	4102	/**
bogdanm	0:9b334a45a8ff	4103	* @}
bogdanm	0:9b334a45a8ff	4104	*/
bogdanm	0:9b334a45a8ff	4105
bogdanm	0:9b334a45a8ff	4106	/**
bogdanm	0:9b334a45a8ff	4107	* @}
bogdanm	0:9b334a45a8ff	4108	*/
bogdanm	0:9b334a45a8ff	4109
bogdanm	0:9b334a45a8ff	4110	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	10 Sep 2016
Imports:	1
Forks:	0
Commits:	148
Dependents:	0
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_i2c.c@0:9b334a45a8ff, 2015-10-01 (annotated)

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