Johannes Stratmann
added prescaler for 16 bit pwm in LPC1347 target
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mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_flash_ex.h@83:a036322b8637, 2016-03-07 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 07 10:00:14 2016 +0000
- Revision:
- 83:a036322b8637
- Parent:
- 0:9b334a45a8ff
- Child:
- 144:ef7eb2e8f9f7
Synchronized with git revision ee20d03969aa5c570152f88e8f3d8a4739eed40b
Full URL: https://github.com/mbedmicro/mbed/commit/ee20d03969aa5c570152f88e8f3d8a4739eed40b/
[STM32F7] Update STM32F7Cube_FW version
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f7xx_hal_flash_ex.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| mbed_official | 83:a036322b8637 | 5 | * @version V1.0.4 |
| mbed_official | 83:a036322b8637 | 6 | * @date 09-December-2015 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of FLASH HAL Extension module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F7xx_HAL_FLASH_EX_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F7xx_HAL_FLASH_EX_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f7xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup FLASHEx |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 58 | /** @defgroup FLASHEx_Exported_Types FLASH Exported Types |
| bogdanm | 0:9b334a45a8ff | 59 | * @{ |
| bogdanm | 0:9b334a45a8ff | 60 | */ |
| bogdanm | 0:9b334a45a8ff | 61 | |
| bogdanm | 0:9b334a45a8ff | 62 | /** |
| bogdanm | 0:9b334a45a8ff | 63 | * @brief FLASH Erase structure definition |
| bogdanm | 0:9b334a45a8ff | 64 | */ |
| bogdanm | 0:9b334a45a8ff | 65 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 66 | { |
| bogdanm | 0:9b334a45a8ff | 67 | uint32_t TypeErase; /*!< Mass erase or sector Erase. |
| bogdanm | 0:9b334a45a8ff | 68 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| bogdanm | 0:9b334a45a8ff | 69 | |
| bogdanm | 0:9b334a45a8ff | 70 | uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled |
| bogdanm | 0:9b334a45a8ff | 71 | This parameter must be a value of @ref FLASHEx_Sectors */ |
| bogdanm | 0:9b334a45a8ff | 72 | |
| bogdanm | 0:9b334a45a8ff | 73 | uint32_t NbSectors; /*!< Number of sectors to be erased. |
| bogdanm | 0:9b334a45a8ff | 74 | This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/ |
| bogdanm | 0:9b334a45a8ff | 75 | |
| bogdanm | 0:9b334a45a8ff | 76 | uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism |
| bogdanm | 0:9b334a45a8ff | 77 | This parameter must be a value of @ref FLASHEx_Voltage_Range */ |
| bogdanm | 0:9b334a45a8ff | 78 | |
| bogdanm | 0:9b334a45a8ff | 79 | } FLASH_EraseInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 80 | |
| bogdanm | 0:9b334a45a8ff | 81 | /** |
| bogdanm | 0:9b334a45a8ff | 82 | * @brief FLASH Option Bytes Program structure definition |
| bogdanm | 0:9b334a45a8ff | 83 | */ |
| bogdanm | 0:9b334a45a8ff | 84 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 85 | { |
| bogdanm | 0:9b334a45a8ff | 86 | uint32_t OptionType; /*!< Option byte to be configured. |
| bogdanm | 0:9b334a45a8ff | 87 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
| bogdanm | 0:9b334a45a8ff | 88 | |
| bogdanm | 0:9b334a45a8ff | 89 | uint32_t WRPState; /*!< Write protection activation or deactivation. |
| bogdanm | 0:9b334a45a8ff | 90 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
| bogdanm | 0:9b334a45a8ff | 91 | |
| mbed_official | 83:a036322b8637 | 92 | uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected. |
| bogdanm | 0:9b334a45a8ff | 93 | The value of this parameter depend on device used within the same series */ |
| bogdanm | 0:9b334a45a8ff | 94 | |
| bogdanm | 0:9b334a45a8ff | 95 | uint32_t RDPLevel; /*!< Set the read protection level. |
| bogdanm | 0:9b334a45a8ff | 96 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
| bogdanm | 0:9b334a45a8ff | 97 | |
| bogdanm | 0:9b334a45a8ff | 98 | uint32_t BORLevel; /*!< Set the BOR Level. |
| bogdanm | 0:9b334a45a8ff | 99 | This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */ |
| bogdanm | 0:9b334a45a8ff | 100 | |
| bogdanm | 0:9b334a45a8ff | 101 | uint32_t USERConfig; /*!< Program the FLASH User Option Byte: WWDG_SW / IWDG_SW / RST_STOP / RST_STDBY / |
| bogdanm | 0:9b334a45a8ff | 102 | IWDG_FREEZE_STOP / IWDG_FREEZE_SANDBY. */ |
| bogdanm | 0:9b334a45a8ff | 103 | |
| bogdanm | 0:9b334a45a8ff | 104 | uint32_t BootAddr0; /*!< Boot base address when Boot pin = 0. |
| bogdanm | 0:9b334a45a8ff | 105 | This parameter can be a value of @ref FLASHEx_Boot_Address */ |
| bogdanm | 0:9b334a45a8ff | 106 | |
| bogdanm | 0:9b334a45a8ff | 107 | uint32_t BootAddr1; /*!< Boot base address when Boot pin = 1. |
| bogdanm | 0:9b334a45a8ff | 108 | This parameter can be a value of @ref FLASHEx_Boot_Address */ |
| bogdanm | 0:9b334a45a8ff | 109 | |
| bogdanm | 0:9b334a45a8ff | 110 | } FLASH_OBProgramInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 111 | |
| bogdanm | 0:9b334a45a8ff | 112 | /** |
| bogdanm | 0:9b334a45a8ff | 113 | * @} |
| bogdanm | 0:9b334a45a8ff | 114 | */ |
| bogdanm | 0:9b334a45a8ff | 115 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 116 | |
| bogdanm | 0:9b334a45a8ff | 117 | /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants |
| bogdanm | 0:9b334a45a8ff | 118 | * @{ |
| bogdanm | 0:9b334a45a8ff | 119 | */ |
| bogdanm | 0:9b334a45a8ff | 120 | |
| bogdanm | 0:9b334a45a8ff | 121 | /** @defgroup FLASHEx_Type_Erase FLASH Type Erase |
| bogdanm | 0:9b334a45a8ff | 122 | * @{ |
| bogdanm | 0:9b334a45a8ff | 123 | */ |
| bogdanm | 0:9b334a45a8ff | 124 | #define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00) /*!< Sectors erase only */ |
| bogdanm | 0:9b334a45a8ff | 125 | #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!< Flash Mass erase activation */ |
| bogdanm | 0:9b334a45a8ff | 126 | /** |
| bogdanm | 0:9b334a45a8ff | 127 | * @} |
| bogdanm | 0:9b334a45a8ff | 128 | */ |
| bogdanm | 0:9b334a45a8ff | 129 | |
| bogdanm | 0:9b334a45a8ff | 130 | /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range |
| bogdanm | 0:9b334a45a8ff | 131 | * @{ |
| bogdanm | 0:9b334a45a8ff | 132 | */ |
| bogdanm | 0:9b334a45a8ff | 133 | #define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00) /*!< Device operating range: 1.8V to 2.1V */ |
| bogdanm | 0:9b334a45a8ff | 134 | #define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01) /*!< Device operating range: 2.1V to 2.7V */ |
| bogdanm | 0:9b334a45a8ff | 135 | #define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02) /*!< Device operating range: 2.7V to 3.6V */ |
| bogdanm | 0:9b334a45a8ff | 136 | #define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03) /*!< Device operating range: 2.7V to 3.6V + External Vpp */ |
| bogdanm | 0:9b334a45a8ff | 137 | /** |
| bogdanm | 0:9b334a45a8ff | 138 | * @} |
| bogdanm | 0:9b334a45a8ff | 139 | */ |
| bogdanm | 0:9b334a45a8ff | 140 | |
| bogdanm | 0:9b334a45a8ff | 141 | /** @defgroup FLASHEx_WRP_State FLASH WRP State |
| bogdanm | 0:9b334a45a8ff | 142 | * @{ |
| bogdanm | 0:9b334a45a8ff | 143 | */ |
| bogdanm | 0:9b334a45a8ff | 144 | #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!< Disable the write protection of the desired bank 1 sectors */ |
| bogdanm | 0:9b334a45a8ff | 145 | #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!< Enable the write protection of the desired bank 1 sectors */ |
| bogdanm | 0:9b334a45a8ff | 146 | /** |
| bogdanm | 0:9b334a45a8ff | 147 | * @} |
| bogdanm | 0:9b334a45a8ff | 148 | */ |
| bogdanm | 0:9b334a45a8ff | 149 | |
| bogdanm | 0:9b334a45a8ff | 150 | /** @defgroup FLASHEx_Option_Type FLASH Option Type |
| bogdanm | 0:9b334a45a8ff | 151 | * @{ |
| bogdanm | 0:9b334a45a8ff | 152 | */ |
| bogdanm | 0:9b334a45a8ff | 153 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 154 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 155 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 156 | #define OPTIONBYTE_BOR ((uint32_t)0x08) /*!< BOR option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 157 | #define OPTIONBYTE_BOOTADDR_0 ((uint32_t)0x10) /*!< Boot 0 Address configuration */ |
| bogdanm | 0:9b334a45a8ff | 158 | #define OPTIONBYTE_BOOTADDR_1 ((uint32_t)0x20) /*!< Boot 1 Address configuration */ |
| bogdanm | 0:9b334a45a8ff | 159 | /** |
| bogdanm | 0:9b334a45a8ff | 160 | * @} |
| bogdanm | 0:9b334a45a8ff | 161 | */ |
| bogdanm | 0:9b334a45a8ff | 162 | |
| bogdanm | 0:9b334a45a8ff | 163 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection |
| bogdanm | 0:9b334a45a8ff | 164 | * @{ |
| bogdanm | 0:9b334a45a8ff | 165 | */ |
| bogdanm | 0:9b334a45a8ff | 166 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAA) |
| bogdanm | 0:9b334a45a8ff | 167 | #define OB_RDP_LEVEL_1 ((uint8_t)0x55) |
| bogdanm | 0:9b334a45a8ff | 168 | #define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2 |
| bogdanm | 0:9b334a45a8ff | 169 | it s no more possible to go back to level 1 or 0 */ |
| bogdanm | 0:9b334a45a8ff | 170 | /** |
| bogdanm | 0:9b334a45a8ff | 171 | * @} |
| bogdanm | 0:9b334a45a8ff | 172 | */ |
| bogdanm | 0:9b334a45a8ff | 173 | |
| bogdanm | 0:9b334a45a8ff | 174 | /** @defgroup FLASHEx_Option_Bytes_WWatchdog FLASH Option Bytes WWatchdog |
| bogdanm | 0:9b334a45a8ff | 175 | * @{ |
| bogdanm | 0:9b334a45a8ff | 176 | */ |
| bogdanm | 0:9b334a45a8ff | 177 | #define OB_WWDG_SW ((uint32_t)0x10) /*!< Software WWDG selected */ |
| bogdanm | 0:9b334a45a8ff | 178 | #define OB_WWDG_HW ((uint32_t)0x00) /*!< Hardware WWDG selected */ |
| bogdanm | 0:9b334a45a8ff | 179 | /** |
| bogdanm | 0:9b334a45a8ff | 180 | * @} |
| bogdanm | 0:9b334a45a8ff | 181 | */ |
| bogdanm | 0:9b334a45a8ff | 182 | |
| bogdanm | 0:9b334a45a8ff | 183 | |
| bogdanm | 0:9b334a45a8ff | 184 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog |
| bogdanm | 0:9b334a45a8ff | 185 | * @{ |
| bogdanm | 0:9b334a45a8ff | 186 | */ |
| bogdanm | 0:9b334a45a8ff | 187 | #define OB_IWDG_SW ((uint32_t)0x20) /*!< Software IWDG selected */ |
| bogdanm | 0:9b334a45a8ff | 188 | #define OB_IWDG_HW ((uint32_t)0x00) /*!< Hardware IWDG selected */ |
| bogdanm | 0:9b334a45a8ff | 189 | /** |
| bogdanm | 0:9b334a45a8ff | 190 | * @} |
| bogdanm | 0:9b334a45a8ff | 191 | */ |
| bogdanm | 0:9b334a45a8ff | 192 | |
| bogdanm | 0:9b334a45a8ff | 193 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP |
| bogdanm | 0:9b334a45a8ff | 194 | * @{ |
| bogdanm | 0:9b334a45a8ff | 195 | */ |
| bogdanm | 0:9b334a45a8ff | 196 | #define OB_STOP_NO_RST ((uint32_t)0x40) /*!< No reset generated when entering in STOP */ |
| bogdanm | 0:9b334a45a8ff | 197 | #define OB_STOP_RST ((uint32_t)0x00) /*!< Reset generated when entering in STOP */ |
| bogdanm | 0:9b334a45a8ff | 198 | /** |
| bogdanm | 0:9b334a45a8ff | 199 | * @} |
| bogdanm | 0:9b334a45a8ff | 200 | */ |
| bogdanm | 0:9b334a45a8ff | 201 | |
| bogdanm | 0:9b334a45a8ff | 202 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY |
| bogdanm | 0:9b334a45a8ff | 203 | * @{ |
| bogdanm | 0:9b334a45a8ff | 204 | */ |
| bogdanm | 0:9b334a45a8ff | 205 | #define OB_STDBY_NO_RST ((uint32_t)0x80) /*!< No reset generated when entering in STANDBY */ |
| bogdanm | 0:9b334a45a8ff | 206 | #define OB_STDBY_RST ((uint32_t)0x00) /*!< Reset generated when entering in STANDBY */ |
| bogdanm | 0:9b334a45a8ff | 207 | /** |
| bogdanm | 0:9b334a45a8ff | 208 | * @} |
| bogdanm | 0:9b334a45a8ff | 209 | */ |
| bogdanm | 0:9b334a45a8ff | 210 | |
| bogdanm | 0:9b334a45a8ff | 211 | /** @defgroup FLASHEx_Option_Bytes_IWDG_FREEZE_STOP FLASH IWDG Counter Freeze in STOP |
| bogdanm | 0:9b334a45a8ff | 212 | * @{ |
| bogdanm | 0:9b334a45a8ff | 213 | */ |
| bogdanm | 0:9b334a45a8ff | 214 | #define OB_IWDG_STOP_FREEZE ((uint32_t)0x00000000) /*!< Freeze IWDG counter in STOP mode */ |
| mbed_official | 83:a036322b8637 | 215 | #define OB_IWDG_STOP_ACTIVE ((uint32_t)0x80000000) /*!< IWDG counter active in STOP mode */ |
| bogdanm | 0:9b334a45a8ff | 216 | /** |
| bogdanm | 0:9b334a45a8ff | 217 | * @} |
| bogdanm | 0:9b334a45a8ff | 218 | */ |
| bogdanm | 0:9b334a45a8ff | 219 | |
| bogdanm | 0:9b334a45a8ff | 220 | /** @defgroup FLASHEx_Option_Bytes_IWDG_FREEZE_SANDBY FLASH IWDG Counter Freeze in STANDBY |
| bogdanm | 0:9b334a45a8ff | 221 | * @{ |
| bogdanm | 0:9b334a45a8ff | 222 | */ |
| bogdanm | 0:9b334a45a8ff | 223 | #define OB_IWDG_STDBY_FREEZE ((uint32_t)0x00000000) /*!< Freeze IWDG counter in STANDBY mode */ |
| bogdanm | 0:9b334a45a8ff | 224 | #define OB_IWDG_STDBY_ACTIVE ((uint32_t)0x40000000) /*!< IWDG counter active in STANDBY mode */ |
| bogdanm | 0:9b334a45a8ff | 225 | /** |
| bogdanm | 0:9b334a45a8ff | 226 | * @} |
| bogdanm | 0:9b334a45a8ff | 227 | */ |
| bogdanm | 0:9b334a45a8ff | 228 | |
| bogdanm | 0:9b334a45a8ff | 229 | /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level |
| bogdanm | 0:9b334a45a8ff | 230 | * @{ |
| bogdanm | 0:9b334a45a8ff | 231 | */ |
| bogdanm | 0:9b334a45a8ff | 232 | #define OB_BOR_LEVEL3 ((uint32_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */ |
| bogdanm | 0:9b334a45a8ff | 233 | #define OB_BOR_LEVEL2 ((uint32_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */ |
| bogdanm | 0:9b334a45a8ff | 234 | #define OB_BOR_LEVEL1 ((uint32_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */ |
| bogdanm | 0:9b334a45a8ff | 235 | #define OB_BOR_OFF ((uint32_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */ |
| bogdanm | 0:9b334a45a8ff | 236 | |
| bogdanm | 0:9b334a45a8ff | 237 | /** |
| bogdanm | 0:9b334a45a8ff | 238 | * @} |
| bogdanm | 0:9b334a45a8ff | 239 | */ |
| bogdanm | 0:9b334a45a8ff | 240 | |
| bogdanm | 0:9b334a45a8ff | 241 | /** @defgroup FLASHEx_Boot_Address FLASH Boot Address |
| bogdanm | 0:9b334a45a8ff | 242 | * @{ |
| bogdanm | 0:9b334a45a8ff | 243 | */ |
| bogdanm | 0:9b334a45a8ff | 244 | #define OB_BOOTADDR_ITCM_RAM ((uint32_t)0x0000) /*!< Boot from ITCM RAM (0x00000000) */ |
| bogdanm | 0:9b334a45a8ff | 245 | #define OB_BOOTADDR_SYSTEM ((uint32_t)0x0040) /*!< Boot from System memory bootloader (0x00100000) */ |
| bogdanm | 0:9b334a45a8ff | 246 | #define OB_BOOTADDR_ITCM_FLASH ((uint32_t)0x0080) /*!< Boot from Flash on ITCM interface (0x00200000) */ |
| bogdanm | 0:9b334a45a8ff | 247 | #define OB_BOOTADDR_AXIM_FLASH ((uint32_t)0x2000) /*!< Boot from Flash on AXIM interface (0x08000000) */ |
| bogdanm | 0:9b334a45a8ff | 248 | #define OB_BOOTADDR_DTCM_RAM ((uint32_t)0x8000) /*!< Boot from DTCM RAM (0x20000000) */ |
| bogdanm | 0:9b334a45a8ff | 249 | #define OB_BOOTADDR_SRAM1 ((uint32_t)0x8004) /*!< Boot from SRAM1 (0x20010000) */ |
| bogdanm | 0:9b334a45a8ff | 250 | #define OB_BOOTADDR_SRAM2 ((uint32_t)0x8013) /*!< Boot from SRAM2 (0x2004C000) */ |
| bogdanm | 0:9b334a45a8ff | 251 | /** |
| bogdanm | 0:9b334a45a8ff | 252 | * @} |
| bogdanm | 0:9b334a45a8ff | 253 | */ |
| bogdanm | 0:9b334a45a8ff | 254 | |
| bogdanm | 0:9b334a45a8ff | 255 | /** @defgroup FLASH_Latency FLASH Latency |
| bogdanm | 0:9b334a45a8ff | 256 | * @{ |
| bogdanm | 0:9b334a45a8ff | 257 | */ |
| bogdanm | 0:9b334a45a8ff | 258 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ |
| bogdanm | 0:9b334a45a8ff | 259 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ |
| bogdanm | 0:9b334a45a8ff | 260 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 261 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 262 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 263 | #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 264 | #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 265 | #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 266 | #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 267 | #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 268 | #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 269 | #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 270 | #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 271 | #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 272 | #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 273 | #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 274 | /** |
| bogdanm | 0:9b334a45a8ff | 275 | * @} |
| bogdanm | 0:9b334a45a8ff | 276 | */ |
| bogdanm | 0:9b334a45a8ff | 277 | |
| bogdanm | 0:9b334a45a8ff | 278 | /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit |
| bogdanm | 0:9b334a45a8ff | 279 | * @{ |
| bogdanm | 0:9b334a45a8ff | 280 | */ |
| bogdanm | 0:9b334a45a8ff | 281 | #define FLASH_MER_BIT (FLASH_CR_MER) /*!< MER bit to clear */ |
| bogdanm | 0:9b334a45a8ff | 282 | /** |
| bogdanm | 0:9b334a45a8ff | 283 | * @} |
| bogdanm | 0:9b334a45a8ff | 284 | */ |
| bogdanm | 0:9b334a45a8ff | 285 | |
| bogdanm | 0:9b334a45a8ff | 286 | /** @defgroup FLASHEx_Sectors FLASH Sectors |
| bogdanm | 0:9b334a45a8ff | 287 | * @{ |
| bogdanm | 0:9b334a45a8ff | 288 | */ |
| bogdanm | 0:9b334a45a8ff | 289 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| bogdanm | 0:9b334a45a8ff | 290 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| bogdanm | 0:9b334a45a8ff | 291 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| bogdanm | 0:9b334a45a8ff | 292 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| bogdanm | 0:9b334a45a8ff | 293 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| bogdanm | 0:9b334a45a8ff | 294 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| bogdanm | 0:9b334a45a8ff | 295 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| bogdanm | 0:9b334a45a8ff | 296 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| bogdanm | 0:9b334a45a8ff | 297 | |
| bogdanm | 0:9b334a45a8ff | 298 | /** |
| bogdanm | 0:9b334a45a8ff | 299 | * @} |
| bogdanm | 0:9b334a45a8ff | 300 | */ |
| bogdanm | 0:9b334a45a8ff | 301 | |
| bogdanm | 0:9b334a45a8ff | 302 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection |
| bogdanm | 0:9b334a45a8ff | 303 | * @{ |
| bogdanm | 0:9b334a45a8ff | 304 | */ |
| bogdanm | 0:9b334a45a8ff | 305 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00010000) /*!< Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 306 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00020000) /*!< Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 307 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00040000) /*!< Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 308 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00080000) /*!< Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 309 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00100000) /*!< Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 310 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00200000) /*!< Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 311 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00400000) /*!< Write protection of Sector6 */ |
| bogdanm | 0:9b334a45a8ff | 312 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00800000) /*!< Write protection of Sector7 */ |
| bogdanm | 0:9b334a45a8ff | 313 | #define OB_WRP_SECTOR_All ((uint32_t)0x00FF0000) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 314 | |
| bogdanm | 0:9b334a45a8ff | 315 | /** |
| bogdanm | 0:9b334a45a8ff | 316 | * @} |
| bogdanm | 0:9b334a45a8ff | 317 | */ |
| bogdanm | 0:9b334a45a8ff | 318 | |
| bogdanm | 0:9b334a45a8ff | 319 | /** |
| bogdanm | 0:9b334a45a8ff | 320 | * @} |
| bogdanm | 0:9b334a45a8ff | 321 | */ |
| bogdanm | 0:9b334a45a8ff | 322 | |
| bogdanm | 0:9b334a45a8ff | 323 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 324 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 325 | /** @addtogroup FLASHEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 326 | * @{ |
| bogdanm | 0:9b334a45a8ff | 327 | */ |
| bogdanm | 0:9b334a45a8ff | 328 | |
| bogdanm | 0:9b334a45a8ff | 329 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 330 | * @{ |
| bogdanm | 0:9b334a45a8ff | 331 | */ |
| bogdanm | 0:9b334a45a8ff | 332 | /* Extension Program operation functions *************************************/ |
| bogdanm | 0:9b334a45a8ff | 333 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError); |
| bogdanm | 0:9b334a45a8ff | 334 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| bogdanm | 0:9b334a45a8ff | 335 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| bogdanm | 0:9b334a45a8ff | 336 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| bogdanm | 0:9b334a45a8ff | 337 | |
| bogdanm | 0:9b334a45a8ff | 338 | /** |
| bogdanm | 0:9b334a45a8ff | 339 | * @} |
| bogdanm | 0:9b334a45a8ff | 340 | */ |
| bogdanm | 0:9b334a45a8ff | 341 | |
| bogdanm | 0:9b334a45a8ff | 342 | /** |
| bogdanm | 0:9b334a45a8ff | 343 | * @} |
| bogdanm | 0:9b334a45a8ff | 344 | */ |
| bogdanm | 0:9b334a45a8ff | 345 | /* Private types -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 346 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 347 | /* Private constants ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 348 | /** @defgroup FLASHEx_Private_Constants FLASH Private Constants |
| bogdanm | 0:9b334a45a8ff | 349 | * @{ |
| bogdanm | 0:9b334a45a8ff | 350 | */ |
| bogdanm | 0:9b334a45a8ff | 351 | #define FLASH_SECTOR_TOTAL 8 |
| bogdanm | 0:9b334a45a8ff | 352 | /** |
| bogdanm | 0:9b334a45a8ff | 353 | * @} |
| bogdanm | 0:9b334a45a8ff | 354 | */ |
| bogdanm | 0:9b334a45a8ff | 355 | |
| bogdanm | 0:9b334a45a8ff | 356 | /* Private macros ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 357 | /** @defgroup FLASHEx_Private_Macros FLASH Private Macros |
| bogdanm | 0:9b334a45a8ff | 358 | * @{ |
| bogdanm | 0:9b334a45a8ff | 359 | */ |
| bogdanm | 0:9b334a45a8ff | 360 | |
| bogdanm | 0:9b334a45a8ff | 361 | /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters |
| bogdanm | 0:9b334a45a8ff | 362 | * @{ |
| bogdanm | 0:9b334a45a8ff | 363 | */ |
| bogdanm | 0:9b334a45a8ff | 364 | |
| bogdanm | 0:9b334a45a8ff | 365 | #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ |
| bogdanm | 0:9b334a45a8ff | 366 | ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
| bogdanm | 0:9b334a45a8ff | 367 | |
| bogdanm | 0:9b334a45a8ff | 368 | #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \ |
| bogdanm | 0:9b334a45a8ff | 369 | ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \ |
| bogdanm | 0:9b334a45a8ff | 370 | ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \ |
| bogdanm | 0:9b334a45a8ff | 371 | ((RANGE) == FLASH_VOLTAGE_RANGE_4)) |
| bogdanm | 0:9b334a45a8ff | 372 | |
| bogdanm | 0:9b334a45a8ff | 373 | #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 374 | ((VALUE) == OB_WRPSTATE_ENABLE)) |
| bogdanm | 0:9b334a45a8ff | 375 | |
| bogdanm | 0:9b334a45a8ff | 376 | #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ |
| bogdanm | 0:9b334a45a8ff | 377 | OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1))) |
| bogdanm | 0:9b334a45a8ff | 378 | |
| bogdanm | 0:9b334a45a8ff | 379 | #define IS_OB_BOOT_ADDRESS(ADDRESS) (((ADDRESS) == OB_BOOTADDR_ITCM_RAM) || \ |
| bogdanm | 0:9b334a45a8ff | 380 | ((ADDRESS) == OB_BOOTADDR_SYSTEM) || \ |
| bogdanm | 0:9b334a45a8ff | 381 | ((ADDRESS) == OB_BOOTADDR_ITCM_FLASH) || \ |
| bogdanm | 0:9b334a45a8ff | 382 | ((ADDRESS) == OB_BOOTADDR_AXIM_FLASH) || \ |
| bogdanm | 0:9b334a45a8ff | 383 | ((ADDRESS) == OB_BOOTADDR_DTCM_RAM) || \ |
| bogdanm | 0:9b334a45a8ff | 384 | ((ADDRESS) == OB_BOOTADDR_SRAM1) || \ |
| bogdanm | 0:9b334a45a8ff | 385 | ((ADDRESS) == OB_BOOTADDR_SRAM2)) |
| bogdanm | 0:9b334a45a8ff | 386 | |
| bogdanm | 0:9b334a45a8ff | 387 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ |
| bogdanm | 0:9b334a45a8ff | 388 | ((LEVEL) == OB_RDP_LEVEL_1) ||\ |
| bogdanm | 0:9b334a45a8ff | 389 | ((LEVEL) == OB_RDP_LEVEL_2)) |
| bogdanm | 0:9b334a45a8ff | 390 | |
| bogdanm | 0:9b334a45a8ff | 391 | #define IS_OB_WWDG_SOURCE(SOURCE) (((SOURCE) == OB_WWDG_SW) || ((SOURCE) == OB_WWDG_HW)) |
| bogdanm | 0:9b334a45a8ff | 392 | |
| bogdanm | 0:9b334a45a8ff | 393 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| bogdanm | 0:9b334a45a8ff | 394 | |
| bogdanm | 0:9b334a45a8ff | 395 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
| bogdanm | 0:9b334a45a8ff | 396 | |
| bogdanm | 0:9b334a45a8ff | 397 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
| bogdanm | 0:9b334a45a8ff | 398 | |
| bogdanm | 0:9b334a45a8ff | 399 | #define IS_OB_IWDG_STOP_FREEZE(FREEZE) (((FREEZE) == OB_IWDG_STOP_FREEZE) || ((FREEZE) == OB_IWDG_STOP_ACTIVE)) |
| bogdanm | 0:9b334a45a8ff | 400 | |
| bogdanm | 0:9b334a45a8ff | 401 | #define IS_OB_IWDG_STDBY_FREEZE(FREEZE) (((FREEZE) == OB_IWDG_STDBY_FREEZE) || ((FREEZE) == OB_IWDG_STDBY_ACTIVE)) |
| bogdanm | 0:9b334a45a8ff | 402 | |
| bogdanm | 0:9b334a45a8ff | 403 | #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ |
| bogdanm | 0:9b334a45a8ff | 404 | ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) |
| bogdanm | 0:9b334a45a8ff | 405 | |
| bogdanm | 0:9b334a45a8ff | 406 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
| bogdanm | 0:9b334a45a8ff | 407 | ((LATENCY) == FLASH_LATENCY_1) || \ |
| bogdanm | 0:9b334a45a8ff | 408 | ((LATENCY) == FLASH_LATENCY_2) || \ |
| bogdanm | 0:9b334a45a8ff | 409 | ((LATENCY) == FLASH_LATENCY_3) || \ |
| bogdanm | 0:9b334a45a8ff | 410 | ((LATENCY) == FLASH_LATENCY_4) || \ |
| bogdanm | 0:9b334a45a8ff | 411 | ((LATENCY) == FLASH_LATENCY_5) || \ |
| bogdanm | 0:9b334a45a8ff | 412 | ((LATENCY) == FLASH_LATENCY_6) || \ |
| bogdanm | 0:9b334a45a8ff | 413 | ((LATENCY) == FLASH_LATENCY_7) || \ |
| bogdanm | 0:9b334a45a8ff | 414 | ((LATENCY) == FLASH_LATENCY_8) || \ |
| bogdanm | 0:9b334a45a8ff | 415 | ((LATENCY) == FLASH_LATENCY_9) || \ |
| bogdanm | 0:9b334a45a8ff | 416 | ((LATENCY) == FLASH_LATENCY_10) || \ |
| bogdanm | 0:9b334a45a8ff | 417 | ((LATENCY) == FLASH_LATENCY_11) || \ |
| bogdanm | 0:9b334a45a8ff | 418 | ((LATENCY) == FLASH_LATENCY_12) || \ |
| bogdanm | 0:9b334a45a8ff | 419 | ((LATENCY) == FLASH_LATENCY_13) || \ |
| bogdanm | 0:9b334a45a8ff | 420 | ((LATENCY) == FLASH_LATENCY_14) || \ |
| bogdanm | 0:9b334a45a8ff | 421 | ((LATENCY) == FLASH_LATENCY_15)) |
| bogdanm | 0:9b334a45a8ff | 422 | |
| mbed_official | 83:a036322b8637 | 423 | #define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) |
| mbed_official | 83:a036322b8637 | 424 | |
| mbed_official | 83:a036322b8637 | 425 | #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL)) |
| mbed_official | 83:a036322b8637 | 426 | |
| bogdanm | 0:9b334a45a8ff | 427 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| bogdanm | 0:9b334a45a8ff | 428 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| bogdanm | 0:9b334a45a8ff | 429 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| bogdanm | 0:9b334a45a8ff | 430 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7)) |
| bogdanm | 0:9b334a45a8ff | 431 | |
| mbed_official | 83:a036322b8637 | 432 | #define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & (uint32_t)0xFF00FFFF) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 433 | |
| bogdanm | 0:9b334a45a8ff | 434 | /** |
| bogdanm | 0:9b334a45a8ff | 435 | * @} |
| bogdanm | 0:9b334a45a8ff | 436 | */ |
| bogdanm | 0:9b334a45a8ff | 437 | |
| bogdanm | 0:9b334a45a8ff | 438 | /** |
| bogdanm | 0:9b334a45a8ff | 439 | * @} |
| bogdanm | 0:9b334a45a8ff | 440 | */ |
| bogdanm | 0:9b334a45a8ff | 441 | |
| bogdanm | 0:9b334a45a8ff | 442 | /* Private functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 443 | /** @defgroup FLASHEx_Private_Functions FLASH Private Functions |
| bogdanm | 0:9b334a45a8ff | 444 | * @{ |
| bogdanm | 0:9b334a45a8ff | 445 | */ |
| bogdanm | 0:9b334a45a8ff | 446 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange); |
| bogdanm | 0:9b334a45a8ff | 447 | /** |
| bogdanm | 0:9b334a45a8ff | 448 | * @} |
| bogdanm | 0:9b334a45a8ff | 449 | */ |
| bogdanm | 0:9b334a45a8ff | 450 | |
| bogdanm | 0:9b334a45a8ff | 451 | /** |
| bogdanm | 0:9b334a45a8ff | 452 | * @} |
| bogdanm | 0:9b334a45a8ff | 453 | */ |
| bogdanm | 0:9b334a45a8ff | 454 | |
| bogdanm | 0:9b334a45a8ff | 455 | /** |
| bogdanm | 0:9b334a45a8ff | 456 | * @} |
| bogdanm | 0:9b334a45a8ff | 457 | */ |
| bogdanm | 0:9b334a45a8ff | 458 | |
| bogdanm | 0:9b334a45a8ff | 459 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 460 | } |
| bogdanm | 0:9b334a45a8ff | 461 | #endif |
| bogdanm | 0:9b334a45a8ff | 462 | |
| bogdanm | 0:9b334a45a8ff | 463 | #endif /* __STM32F7xx_HAL_FLASH_EX_H */ |
| bogdanm | 0:9b334a45a8ff | 464 | |
| bogdanm | 0:9b334a45a8ff | 465 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |