Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rtc.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
50:a417edff4437
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file em_rtc.c
bogdanm 0:9b334a45a8ff 3 * @brief Real Time Counter (RTC) Peripheral API
bogdanm 0:9b334a45a8ff 4 * @version 3.20.12
bogdanm 0:9b334a45a8ff 5 *******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
bogdanm 0:9b334a45a8ff 7 * <b>(C) Copyright 2014 Silicon Labs, http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 *******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
bogdanm 0:9b334a45a8ff 21 * obligation to support this Software. Silicon Labs is providing the
bogdanm 0:9b334a45a8ff 22 * Software "AS IS", with no express or implied warranties of any kind,
bogdanm 0:9b334a45a8ff 23 * including, but not limited to, any implied warranties of merchantability
bogdanm 0:9b334a45a8ff 24 * or fitness for any particular purpose or warranties against infringement
bogdanm 0:9b334a45a8ff 25 * of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Labs will not be liable for any consequential, incidental, or
bogdanm 0:9b334a45a8ff 28 * special damages, or any other relief, or for any claim by any third party,
bogdanm 0:9b334a45a8ff 29 * arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 ******************************************************************************/
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #include "em_rtc.h"
bogdanm 0:9b334a45a8ff 35 #if defined(RTC_COUNT) && (RTC_COUNT > 0)
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 #include "em_assert.h"
bogdanm 0:9b334a45a8ff 38 #include "em_bitband.h"
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 41 * @addtogroup EM_Library
bogdanm 0:9b334a45a8ff 42 * @{
bogdanm 0:9b334a45a8ff 43 ******************************************************************************/
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 46 * @addtogroup RTC
bogdanm 0:9b334a45a8ff 47 * @brief Real Time Counter (RTC) Peripheral API
bogdanm 0:9b334a45a8ff 48 * @{
bogdanm 0:9b334a45a8ff 49 ******************************************************************************/
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /*******************************************************************************
bogdanm 0:9b334a45a8ff 52 ******************************* DEFINES ***********************************
bogdanm 0:9b334a45a8ff 53 ******************************************************************************/
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /** Validation of valid comparator register for assert statements. */
bogdanm 0:9b334a45a8ff 58 #define RTC_COMP_REG_VALID(reg) (((reg) <= 1))
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 /** @endcond */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 /*******************************************************************************
bogdanm 0:9b334a45a8ff 64 ************************** LOCAL FUNCTIONS ********************************
bogdanm 0:9b334a45a8ff 65 ******************************************************************************/
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 70 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 71 * @brief
bogdanm 0:9b334a45a8ff 72 * Wait for ongoing sync of register(s) to low frequency domain to complete.
bogdanm 0:9b334a45a8ff 73 *
bogdanm 0:9b334a45a8ff 74 * @note
bogdanm 0:9b334a45a8ff 75 * This only applies to the Gecko Family, see the reference manual
bogdanm 0:9b334a45a8ff 76 * chapter about Access to Low Energy Peripherals (Asynchronos Registers)
bogdanm 0:9b334a45a8ff 77 * for details. For Tiny Gecko and Giant Gecko, the RTC supports immediate
bogdanm 0:9b334a45a8ff 78 * updates of registers, and will automatically hold the bus until the
bogdanm 0:9b334a45a8ff 79 * register has been updated.
bogdanm 0:9b334a45a8ff 80 *
bogdanm 0:9b334a45a8ff 81 * @param[in] mask
bogdanm 0:9b334a45a8ff 82 * Bitmask corresponding to SYNCBUSY register defined bits, indicating
bogdanm 0:9b334a45a8ff 83 * registers that must complete any ongoing synchronization.
bogdanm 0:9b334a45a8ff 84 ******************************************************************************/
bogdanm 0:9b334a45a8ff 85 __STATIC_INLINE void RTC_Sync(uint32_t mask)
bogdanm 0:9b334a45a8ff 86 {
bogdanm 0:9b334a45a8ff 87 /* Avoid deadlock if modifying the same register twice when freeze mode is */
bogdanm 0:9b334a45a8ff 88 /* activated. */
bogdanm 0:9b334a45a8ff 89 if (RTC->FREEZE & RTC_FREEZE_REGFREEZE)
bogdanm 0:9b334a45a8ff 90 return;
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /* Wait for any pending previous write operation to have been completed */
bogdanm 0:9b334a45a8ff 93 /* in low frequency domain. This is only required for the Gecko Family */
bogdanm 0:9b334a45a8ff 94 while (RTC->SYNCBUSY & mask)
bogdanm 0:9b334a45a8ff 95 ;
bogdanm 0:9b334a45a8ff 96 }
bogdanm 0:9b334a45a8ff 97 #endif
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 /** @endcond */
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 /*******************************************************************************
bogdanm 0:9b334a45a8ff 102 ************************** GLOBAL FUNCTIONS *******************************
bogdanm 0:9b334a45a8ff 103 ******************************************************************************/
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 106 * @brief
bogdanm 0:9b334a45a8ff 107 * Get RTC compare register value.
bogdanm 0:9b334a45a8ff 108 *
bogdanm 0:9b334a45a8ff 109 * @param[in] comp
bogdanm 0:9b334a45a8ff 110 * Compare register to get, either 0 or 1
bogdanm 0:9b334a45a8ff 111 *
bogdanm 0:9b334a45a8ff 112 * @return
bogdanm 0:9b334a45a8ff 113 * Compare register value, 0 if invalid register selected.
bogdanm 0:9b334a45a8ff 114 ******************************************************************************/
bogdanm 0:9b334a45a8ff 115 uint32_t RTC_CompareGet(unsigned int comp)
bogdanm 0:9b334a45a8ff 116 {
bogdanm 0:9b334a45a8ff 117 uint32_t ret;
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 EFM_ASSERT(RTC_COMP_REG_VALID(comp));
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 /* Initialize selected compare value */
bogdanm 0:9b334a45a8ff 122 switch (comp)
bogdanm 0:9b334a45a8ff 123 {
bogdanm 0:9b334a45a8ff 124 case 0:
bogdanm 0:9b334a45a8ff 125 ret = RTC->COMP0;
bogdanm 0:9b334a45a8ff 126 break;
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 case 1:
bogdanm 0:9b334a45a8ff 129 ret = RTC->COMP1;
bogdanm 0:9b334a45a8ff 130 break;
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 default:
bogdanm 0:9b334a45a8ff 133 /* Unknown compare register selected */
bogdanm 0:9b334a45a8ff 134 ret = 0;
bogdanm 0:9b334a45a8ff 135 break;
bogdanm 0:9b334a45a8ff 136 }
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 return ret;
bogdanm 0:9b334a45a8ff 139 }
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 143 * @brief
bogdanm 0:9b334a45a8ff 144 * Set RTC compare register value.
bogdanm 0:9b334a45a8ff 145 *
bogdanm 0:9b334a45a8ff 146 * @note
bogdanm 0:9b334a45a8ff 147 * The setting of a compare register requires synchronization into the
bogdanm 0:9b334a45a8ff 148 * low frequency domain. If the same register is modified before a previous
bogdanm 0:9b334a45a8ff 149 * update has completed, this function will stall until the previous
bogdanm 0:9b334a45a8ff 150 * synchronization has completed. This only applies to the Gecko Family, see
bogdanm 0:9b334a45a8ff 151 * comment in the RTC_Sync() internal function call.
bogdanm 0:9b334a45a8ff 152 *
bogdanm 0:9b334a45a8ff 153 * @param[in] comp
bogdanm 0:9b334a45a8ff 154 * Compare register to set, either 0 or 1
bogdanm 0:9b334a45a8ff 155 *
bogdanm 0:9b334a45a8ff 156 * @param[in] value
bogdanm 0:9b334a45a8ff 157 * Initialization value (<= 0x00ffffff)
bogdanm 0:9b334a45a8ff 158 ******************************************************************************/
bogdanm 0:9b334a45a8ff 159 void RTC_CompareSet(unsigned int comp, uint32_t value)
bogdanm 0:9b334a45a8ff 160 {
bogdanm 0:9b334a45a8ff 161 volatile uint32_t *compReg;
bogdanm 0:9b334a45a8ff 162 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 163 uint32_t syncbusy;
bogdanm 0:9b334a45a8ff 164 #endif
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 EFM_ASSERT(RTC_COMP_REG_VALID(comp) &&
bogdanm 0:9b334a45a8ff 167 ((value & ~(_RTC_COMP0_COMP0_MASK >> _RTC_COMP0_COMP0_SHIFT)) == 0));
bogdanm 0:9b334a45a8ff 168
bogdanm 0:9b334a45a8ff 169 /* Initialize selected compare value */
bogdanm 0:9b334a45a8ff 170 switch (comp)
bogdanm 0:9b334a45a8ff 171 {
bogdanm 0:9b334a45a8ff 172 case 0:
bogdanm 0:9b334a45a8ff 173 compReg = &(RTC->COMP0);
bogdanm 0:9b334a45a8ff 174 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 175 syncbusy = RTC_SYNCBUSY_COMP0;
bogdanm 0:9b334a45a8ff 176 #endif
bogdanm 0:9b334a45a8ff 177 break;
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 case 1:
bogdanm 0:9b334a45a8ff 180 compReg = &(RTC->COMP1);
bogdanm 0:9b334a45a8ff 181 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 182 syncbusy = RTC_SYNCBUSY_COMP1;
bogdanm 0:9b334a45a8ff 183 #endif
bogdanm 0:9b334a45a8ff 184 break;
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 default:
bogdanm 0:9b334a45a8ff 187 /* Unknown compare register selected, abort */
bogdanm 0:9b334a45a8ff 188 return;
bogdanm 0:9b334a45a8ff 189 }
bogdanm 0:9b334a45a8ff 190 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 191 /* LF register about to be modified require sync. busy check */
bogdanm 0:9b334a45a8ff 192 RTC_Sync(syncbusy);
bogdanm 0:9b334a45a8ff 193 #endif
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 *compReg = value;
bogdanm 0:9b334a45a8ff 196 }
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 200 * @brief
bogdanm 0:9b334a45a8ff 201 * Enable/disable RTC.
bogdanm 0:9b334a45a8ff 202 *
bogdanm 0:9b334a45a8ff 203 * @note
bogdanm 0:9b334a45a8ff 204 * The enabling/disabling of the RTC modifies the RTC CTRL register which
bogdanm 0:9b334a45a8ff 205 * requires synchronization into the low frequency domain. If this register is
bogdanm 0:9b334a45a8ff 206 * modified before a previous update to the same register has completed, this
bogdanm 0:9b334a45a8ff 207 * function will stall until the previous synchronization has completed. This
bogdanm 0:9b334a45a8ff 208 * only applies to the Gecko Family, see comment in the RTC_Sync() internal
bogdanm 0:9b334a45a8ff 209 * function call.
bogdanm 0:9b334a45a8ff 210 *
bogdanm 0:9b334a45a8ff 211 * @param[in] enable
bogdanm 0:9b334a45a8ff 212 * true to enable counting, false to disable.
bogdanm 0:9b334a45a8ff 213 ******************************************************************************/
bogdanm 0:9b334a45a8ff 214 void RTC_Enable(bool enable)
bogdanm 0:9b334a45a8ff 215 {
bogdanm 0:9b334a45a8ff 216 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 217 /* LF register about to be modified require sync. busy check */
bogdanm 0:9b334a45a8ff 218 RTC_Sync(RTC_SYNCBUSY_CTRL);
bogdanm 0:9b334a45a8ff 219 #endif
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 BITBAND_Peripheral(&(RTC->CTRL), _RTC_CTRL_EN_SHIFT, (unsigned int) enable);
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 224 /* Wait for CTRL to be updated before returning, because calling code may
bogdanm 0:9b334a45a8ff 225 depend upon that the CTRL register is updated after this function has
bogdanm 0:9b334a45a8ff 226 returned. */
bogdanm 0:9b334a45a8ff 227 RTC_Sync(RTC_SYNCBUSY_CTRL);
bogdanm 0:9b334a45a8ff 228 #endif
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 233 * @brief
bogdanm 0:9b334a45a8ff 234 * RTC register synchronization freeze control.
bogdanm 0:9b334a45a8ff 235 *
bogdanm 0:9b334a45a8ff 236 * @details
bogdanm 0:9b334a45a8ff 237 * Some RTC registers require synchronization into the low frequency (LF)
bogdanm 0:9b334a45a8ff 238 * domain. The freeze feature allows for several such registers to be
bogdanm 0:9b334a45a8ff 239 * modified before passing them to the LF domain simultaneously (which
bogdanm 0:9b334a45a8ff 240 * takes place when the freeze mode is disabled).
bogdanm 0:9b334a45a8ff 241 *
bogdanm 0:9b334a45a8ff 242 * @note
bogdanm 0:9b334a45a8ff 243 * When enabling freeze mode, this function will wait for all current
bogdanm 0:9b334a45a8ff 244 * ongoing RTC synchronization to LF domain to complete (Normally
bogdanm 0:9b334a45a8ff 245 * synchronization will not be in progress.) However for this reason, when
bogdanm 0:9b334a45a8ff 246 * using freeze mode, modifications of registers requiring LF synchronization
bogdanm 0:9b334a45a8ff 247 * should be done within one freeze enable/disable block to avoid unecessary
bogdanm 0:9b334a45a8ff 248 * stalling. This only applies to the Gecko Family, see the reference manual
bogdanm 0:9b334a45a8ff 249 * chapter about Access to Low Energy Peripherals (Asynchronos Registers)
bogdanm 0:9b334a45a8ff 250 * for details.
bogdanm 0:9b334a45a8ff 251 *
bogdanm 0:9b334a45a8ff 252 * @param[in] enable
bogdanm 0:9b334a45a8ff 253 * @li true - enable freeze, modified registers are not propagated to the
bogdanm 0:9b334a45a8ff 254 * LF domain
bogdanm 0:9b334a45a8ff 255 * @li false - disables freeze, modified registers are propagated to LF
bogdanm 0:9b334a45a8ff 256 * domain
bogdanm 0:9b334a45a8ff 257 ******************************************************************************/
bogdanm 0:9b334a45a8ff 258 void RTC_FreezeEnable(bool enable)
bogdanm 0:9b334a45a8ff 259 {
bogdanm 0:9b334a45a8ff 260 if (enable)
bogdanm 0:9b334a45a8ff 261 {
bogdanm 0:9b334a45a8ff 262 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 263 /* Wait for any ongoing LF synchronization to complete. This is just to */
bogdanm 0:9b334a45a8ff 264 /* protect against the rare case when a user */
bogdanm 0:9b334a45a8ff 265 /* - modifies a register requiring LF sync */
bogdanm 0:9b334a45a8ff 266 /* - then enables freeze before LF sync completed */
bogdanm 0:9b334a45a8ff 267 /* - then modifies the same register again */
bogdanm 0:9b334a45a8ff 268 /* since modifying a register while it is in sync progress should be */
bogdanm 0:9b334a45a8ff 269 /* avoided. */
bogdanm 0:9b334a45a8ff 270 while (RTC->SYNCBUSY)
bogdanm 0:9b334a45a8ff 271 ;
bogdanm 0:9b334a45a8ff 272 #endif
bogdanm 0:9b334a45a8ff 273 RTC->FREEZE = RTC_FREEZE_REGFREEZE;
bogdanm 0:9b334a45a8ff 274 }
bogdanm 0:9b334a45a8ff 275 else
bogdanm 0:9b334a45a8ff 276 {
bogdanm 0:9b334a45a8ff 277 RTC->FREEZE = 0;
bogdanm 0:9b334a45a8ff 278 }
bogdanm 0:9b334a45a8ff 279 }
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 283 * @brief
bogdanm 0:9b334a45a8ff 284 * Initialize RTC.
bogdanm 0:9b334a45a8ff 285 *
bogdanm 0:9b334a45a8ff 286 * @details
bogdanm 0:9b334a45a8ff 287 * Note that the compare values must be set separately with RTC_CompareSet().
bogdanm 0:9b334a45a8ff 288 * That should probably be done prior to the use of this function if
bogdanm 0:9b334a45a8ff 289 * configuring the RTC to start when initialization is completed.
bogdanm 0:9b334a45a8ff 290 *
bogdanm 0:9b334a45a8ff 291 * @note
bogdanm 0:9b334a45a8ff 292 * The initialization of the RTC modifies the RTC CTRL register which requires
bogdanm 0:9b334a45a8ff 293 * synchronization into the low frequency domain. If this register is
bogdanm 0:9b334a45a8ff 294 * modified before a previous update to the same register has completed, this
bogdanm 0:9b334a45a8ff 295 * function will stall until the previous synchronization has completed. This
bogdanm 0:9b334a45a8ff 296 * only applies to the Gecko Family, see comment in the RTC_Sync() internal
bogdanm 0:9b334a45a8ff 297 * function call.
bogdanm 0:9b334a45a8ff 298 *
bogdanm 0:9b334a45a8ff 299 * @param[in] init
bogdanm 0:9b334a45a8ff 300 * Pointer to RTC initialization structure.
bogdanm 0:9b334a45a8ff 301 ******************************************************************************/
bogdanm 0:9b334a45a8ff 302 void RTC_Init(const RTC_Init_TypeDef *init)
bogdanm 0:9b334a45a8ff 303 {
bogdanm 0:9b334a45a8ff 304 uint32_t tmp;
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 if (init->enable)
bogdanm 0:9b334a45a8ff 307 {
bogdanm 0:9b334a45a8ff 308 tmp = RTC_CTRL_EN;
bogdanm 0:9b334a45a8ff 309 }
bogdanm 0:9b334a45a8ff 310 else
bogdanm 0:9b334a45a8ff 311 {
bogdanm 0:9b334a45a8ff 312 tmp = 0;
bogdanm 0:9b334a45a8ff 313 }
bogdanm 0:9b334a45a8ff 314
bogdanm 0:9b334a45a8ff 315 /* Configure DEBUGRUN flag, sets whether or not counter should be
bogdanm 0:9b334a45a8ff 316 * updated when debugger is active */
bogdanm 0:9b334a45a8ff 317 if (init->debugRun)
bogdanm 0:9b334a45a8ff 318 {
bogdanm 0:9b334a45a8ff 319 tmp |= RTC_CTRL_DEBUGRUN;
bogdanm 0:9b334a45a8ff 320 }
bogdanm 0:9b334a45a8ff 321
bogdanm 0:9b334a45a8ff 322 /* Configure COMP0TOP, this will use the COMP0 compare value as an
bogdanm 0:9b334a45a8ff 323 * overflow value, instead of default 24-bit 0x00ffffff */
bogdanm 0:9b334a45a8ff 324 if (init->comp0Top)
bogdanm 0:9b334a45a8ff 325 {
bogdanm 0:9b334a45a8ff 326 tmp |= RTC_CTRL_COMP0TOP;
bogdanm 0:9b334a45a8ff 327 }
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 330 /* LF register about to be modified require sync. busy check */
bogdanm 0:9b334a45a8ff 331 RTC_Sync(RTC_SYNCBUSY_CTRL);
bogdanm 0:9b334a45a8ff 332 #endif
bogdanm 0:9b334a45a8ff 333
bogdanm 0:9b334a45a8ff 334 RTC->CTRL = tmp;
bogdanm 0:9b334a45a8ff 335 }
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 340 * @brief
bogdanm 0:9b334a45a8ff 341 * Restore RTC to reset state
bogdanm 0:9b334a45a8ff 342 ******************************************************************************/
bogdanm 0:9b334a45a8ff 343 void RTC_Reset(void)
bogdanm 0:9b334a45a8ff 344 {
bogdanm 0:9b334a45a8ff 345 /* Restore all essential RTC register to default config */
bogdanm 0:9b334a45a8ff 346 RTC->FREEZE = _RTC_FREEZE_RESETVALUE;
bogdanm 0:9b334a45a8ff 347 RTC->CTRL = _RTC_CTRL_RESETVALUE;
bogdanm 0:9b334a45a8ff 348 RTC->COMP0 = _RTC_COMP0_RESETVALUE;
bogdanm 0:9b334a45a8ff 349 RTC->COMP1 = _RTC_COMP1_RESETVALUE;
bogdanm 0:9b334a45a8ff 350 RTC->IEN = _RTC_IEN_RESETVALUE;
bogdanm 0:9b334a45a8ff 351 RTC->IFC = _RTC_IFC_RESETVALUE;
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 #if defined(_EFM32_GECKO_FAMILY)
bogdanm 0:9b334a45a8ff 354 /* Wait for CTRL, COMP0 and COMP1 to be updated before returning, because the
bogdanm 0:9b334a45a8ff 355 calling code may depend upon that the register values are updated after
bogdanm 0:9b334a45a8ff 356 this function has returned. */
bogdanm 0:9b334a45a8ff 357 RTC_Sync(RTC_SYNCBUSY_CTRL | RTC_SYNCBUSY_COMP0 | RTC_SYNCBUSY_COMP1);
bogdanm 0:9b334a45a8ff 358 #endif
bogdanm 0:9b334a45a8ff 359 }
bogdanm 0:9b334a45a8ff 360
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 364 * @brief
bogdanm 0:9b334a45a8ff 365 * Restart RTC counter from zero
bogdanm 0:9b334a45a8ff 366 ******************************************************************************/
bogdanm 0:9b334a45a8ff 367 void RTC_CounterReset(void)
bogdanm 0:9b334a45a8ff 368 {
bogdanm 0:9b334a45a8ff 369 /* A disable/enable sequnce will start the counter at zero */
bogdanm 0:9b334a45a8ff 370 RTC_Enable(false);
bogdanm 0:9b334a45a8ff 371 RTC_Enable(true);
bogdanm 0:9b334a45a8ff 372 }
bogdanm 0:9b334a45a8ff 373
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /** @} (end addtogroup RTC) */
bogdanm 0:9b334a45a8ff 376 /** @} (end addtogroup EM_Library) */
bogdanm 0:9b334a45a8ff 377 #endif /* defined(RTC_COUNT) && (RTC_COUNT > 0) */