Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_NXP/TARGET_LPC43XX/spi_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
bogdanm 0:9b334a45a8ff 17 */
bogdanm 0:9b334a45a8ff 18 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 19 #include <math.h>
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #include "spi_api.h"
bogdanm 0:9b334a45a8ff 22 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 23 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 24 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 // SCU mode for SPI pins
bogdanm 0:9b334a45a8ff 27 #define SCU_PINIO_SPI SCU_PINIO_FAST
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 static const PinMap PinMap_SPI_SCLK[] = {
bogdanm 0:9b334a45a8ff 30 {P1_19, SPI_1, (SCU_PINIO_SPI | 1)},
bogdanm 0:9b334a45a8ff 31 {P3_0, SPI_0, (SCU_PINIO_SPI | 4)},
bogdanm 0:9b334a45a8ff 32 {P3_3, SPI_0, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 33 {PF_0, SPI_0, (SCU_PINIO_SPI | 0)},
bogdanm 0:9b334a45a8ff 34 {PF_4, SPI_1, (SCU_PINIO_SPI | 0)},
bogdanm 0:9b334a45a8ff 35 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 36 };
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 static const PinMap PinMap_SPI_MOSI[] = {
bogdanm 0:9b334a45a8ff 39 {P0_1, SPI_1, (SCU_PINIO_SPI | 1)},
bogdanm 0:9b334a45a8ff 40 {P1_2, SPI_0, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 41 {P1_4, SPI_1, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 42 {P3_7, SPI_0, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 43 {P3_8, SPI_0, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 44 {P9_2, SPI_0, (SCU_PINIO_SPI | 7)},
bogdanm 0:9b334a45a8ff 45 {PF_3, SPI_0, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 46 {PF_7, SPI_1, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 47 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 48 };
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 static const PinMap PinMap_SPI_MISO[] = {
bogdanm 0:9b334a45a8ff 51 {P0_0, SPI_1, (SCU_PINIO_SPI | 1)},
bogdanm 0:9b334a45a8ff 52 {P1_1, SPI_0, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 53 {P1_3, SPI_1, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 54 {P3_6, SPI_0, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 55 {P3_7, SPI_0, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 56 {P9_1, SPI_0, (SCU_PINIO_SPI | 7)},
bogdanm 0:9b334a45a8ff 57 {PF_2, SPI_0, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 58 {PF_6, SPI_1, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 59 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 60 };
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 static const PinMap PinMap_SPI_SSEL[] = {
bogdanm 0:9b334a45a8ff 63 {P1_0, SPI_0, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 64 {P1_5, SPI_1, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 65 {P1_20, SPI_1, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 66 {P3_6, SPI_0, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 67 {P3_8, SPI_0, (SCU_PINIO_SPI | 5)},
bogdanm 0:9b334a45a8ff 68 {P9_0, SPI_0, (SCU_PINIO_SPI | 7)},
bogdanm 0:9b334a45a8ff 69 {PF_1, SPI_0, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 70 {PF_5, SPI_1, (SCU_PINIO_SPI | 2)},
bogdanm 0:9b334a45a8ff 71 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 72 };
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 static inline int ssp_disable(spi_t *obj);
bogdanm 0:9b334a45a8ff 75 static inline int ssp_enable(spi_t *obj);
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
bogdanm 0:9b334a45a8ff 78 // determine the SPI to use
bogdanm 0:9b334a45a8ff 79 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 80 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 81 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 82 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 83 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
bogdanm 0:9b334a45a8ff 84 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 obj->spi = (LPC_SSP_T*)pinmap_merge(spi_data, spi_cntl);
bogdanm 0:9b334a45a8ff 87 MBED_ASSERT((int)obj->spi != NC);
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 // enable clocking
bogdanm 0:9b334a45a8ff 90 switch ((int)obj->spi) {
bogdanm 0:9b334a45a8ff 91 case SPI_0: LPC_CGU->BASE_CLK[CLK_BASE_SSP0] = (1 << 11) | (CLKIN_MAINPLL << 24); break;
bogdanm 0:9b334a45a8ff 92 case SPI_1: LPC_CGU->BASE_CLK[CLK_BASE_SSP1] = (1 << 11) | (CLKIN_MAINPLL << 24); break;
bogdanm 0:9b334a45a8ff 93 }
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 // pin out the spi pins
bogdanm 0:9b334a45a8ff 96 pinmap_pinout(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 97 pinmap_pinout(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 98 pinmap_pinout(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 99 if (ssel != NC) {
bogdanm 0:9b334a45a8ff 100 pinmap_pinout(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 101 }
bogdanm 0:9b334a45a8ff 102 }
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 void spi_free(spi_t *obj) {}
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 void spi_format(spi_t *obj, int bits, int mode, int slave) {
bogdanm 0:9b334a45a8ff 107 MBED_ASSERT(((bits >= 4) && (bits <= 16)) || ((mode >= 0) && (mode <= 3)));
bogdanm 0:9b334a45a8ff 108 ssp_disable(obj);
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 int polarity = (mode & 0x2) ? 1 : 0;
bogdanm 0:9b334a45a8ff 111 int phase = (mode & 0x1) ? 1 : 0;
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 // set it up
bogdanm 0:9b334a45a8ff 114 int DSS = bits - 1; // DSS (data select size)
bogdanm 0:9b334a45a8ff 115 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
bogdanm 0:9b334a45a8ff 116 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 int FRF = 0; // FRF (frame format) = SPI
bogdanm 0:9b334a45a8ff 119 uint32_t tmp = obj->spi->CR0;
bogdanm 0:9b334a45a8ff 120 tmp &= ~(0xFFFF);
bogdanm 0:9b334a45a8ff 121 tmp |= DSS << 0
bogdanm 0:9b334a45a8ff 122 | FRF << 4
bogdanm 0:9b334a45a8ff 123 | SPO << 6
bogdanm 0:9b334a45a8ff 124 | SPH << 7;
bogdanm 0:9b334a45a8ff 125 obj->spi->CR0 = tmp;
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 tmp = obj->spi->CR1;
bogdanm 0:9b334a45a8ff 128 tmp &= ~(0xD);
bogdanm 0:9b334a45a8ff 129 tmp |= 0 << 0 // LBM - loop back mode - off
bogdanm 0:9b334a45a8ff 130 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
bogdanm 0:9b334a45a8ff 131 | 0 << 3; // SOD - slave output disable - na
bogdanm 0:9b334a45a8ff 132 obj->spi->CR1 = tmp;
bogdanm 0:9b334a45a8ff 133 ssp_enable(obj);
bogdanm 0:9b334a45a8ff 134 }
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 void spi_frequency(spi_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 137 ssp_disable(obj);
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 uint32_t PCLK = SystemCoreClock;
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 int prescaler;
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
bogdanm 0:9b334a45a8ff 144 int prescale_hz = PCLK / prescaler;
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 // calculate the divider
bogdanm 0:9b334a45a8ff 147 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 // check we can support the divider
bogdanm 0:9b334a45a8ff 150 if (divider < 256) {
bogdanm 0:9b334a45a8ff 151 // prescaler
bogdanm 0:9b334a45a8ff 152 obj->spi->CPSR = prescaler;
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 // divider
bogdanm 0:9b334a45a8ff 155 obj->spi->CR0 &= ~(0xFFFF << 8);
bogdanm 0:9b334a45a8ff 156 obj->spi->CR0 |= (divider - 1) << 8;
bogdanm 0:9b334a45a8ff 157 ssp_enable(obj);
bogdanm 0:9b334a45a8ff 158 return;
bogdanm 0:9b334a45a8ff 159 }
bogdanm 0:9b334a45a8ff 160 }
bogdanm 0:9b334a45a8ff 161 error("Couldn't setup requested SPI frequency");
bogdanm 0:9b334a45a8ff 162 }
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 static inline int ssp_disable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 165 return obj->spi->CR1 &= ~(1 << 1);
bogdanm 0:9b334a45a8ff 166 }
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 static inline int ssp_enable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 169 return obj->spi->CR1 |= (1 << 1);
bogdanm 0:9b334a45a8ff 170 }
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 static inline int ssp_readable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 173 return obj->spi->SR & (1 << 2);
bogdanm 0:9b334a45a8ff 174 }
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 static inline int ssp_writeable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 177 return obj->spi->SR & (1 << 1);
bogdanm 0:9b334a45a8ff 178 }
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 static inline void ssp_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 181 while (!ssp_writeable(obj));
bogdanm 0:9b334a45a8ff 182 obj->spi->DR = value;
bogdanm 0:9b334a45a8ff 183 }
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 static inline int ssp_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 186 while (!ssp_readable(obj));
bogdanm 0:9b334a45a8ff 187 return obj->spi->DR;
bogdanm 0:9b334a45a8ff 188 }
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 static inline int ssp_busy(spi_t *obj) {
bogdanm 0:9b334a45a8ff 191 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
bogdanm 0:9b334a45a8ff 192 }
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 int spi_master_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 195 ssp_write(obj, value);
bogdanm 0:9b334a45a8ff 196 return ssp_read(obj);
bogdanm 0:9b334a45a8ff 197 }
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 int spi_slave_receive(spi_t *obj) {
bogdanm 0:9b334a45a8ff 200 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
bogdanm 0:9b334a45a8ff 201 }
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 int spi_slave_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 204 return obj->spi->DR;
bogdanm 0:9b334a45a8ff 205 }
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 void spi_slave_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 208 while (ssp_writeable(obj) == 0) ;
bogdanm 0:9b334a45a8ff 209 obj->spi->DR = value;
bogdanm 0:9b334a45a8ff 210 }
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 int spi_busy(spi_t *obj) {
bogdanm 0:9b334a45a8ff 213 return ssp_busy(obj);
bogdanm 0:9b334a45a8ff 214 }