Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_NXP/TARGET_LPC43XX/i2c_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
bogdanm 0:9b334a45a8ff 17 */
bogdanm 0:9b334a45a8ff 18 #include "i2c_api.h"
bogdanm 0:9b334a45a8ff 19 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 20 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 21 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 // SCU mode for I2C SCL/SDA pins
bogdanm 0:9b334a45a8ff 24 #define SCU_PINIO_I2C SCU_PINIO_PULLNONE
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 static const PinMap PinMap_I2C_SDA[] = {
bogdanm 0:9b334a45a8ff 27 {P_DED, I2C_0, 0},
bogdanm 0:9b334a45a8ff 28 {P2_3, I2C_1, (SCU_PINIO_I2C | 1)},
bogdanm 0:9b334a45a8ff 29 {PE_13, I2C_1, (SCU_PINIO_I2C | 2)},
bogdanm 0:9b334a45a8ff 30 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 31 };
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 static const PinMap PinMap_I2C_SCL[] = {
bogdanm 0:9b334a45a8ff 34 {P_DED, I2C_0, 0},
bogdanm 0:9b334a45a8ff 35 {P2_4, I2C_1, (SCU_PINIO_I2C | 1)},
bogdanm 0:9b334a45a8ff 36 {PE_14, I2C_1, (SCU_PINIO_I2C | 2)},
bogdanm 0:9b334a45a8ff 37 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 38 };
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 #define I2C_CONSET(x) (x->i2c->CONSET)
bogdanm 0:9b334a45a8ff 41 #define I2C_CONCLR(x) (x->i2c->CONCLR)
bogdanm 0:9b334a45a8ff 42 #define I2C_STAT(x) (x->i2c->STAT)
bogdanm 0:9b334a45a8ff 43 #define I2C_DAT(x) (x->i2c->DAT)
bogdanm 0:9b334a45a8ff 44 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
bogdanm 0:9b334a45a8ff 45 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 static const uint32_t I2C_addr_offset[2][4] = {
bogdanm 0:9b334a45a8ff 48 {0x0C, 0x20, 0x24, 0x28},
bogdanm 0:9b334a45a8ff 49 {0x30, 0x34, 0x38, 0x3C}
bogdanm 0:9b334a45a8ff 50 };
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
bogdanm 0:9b334a45a8ff 53 I2C_CONCLR(obj) = (start << 5)
bogdanm 0:9b334a45a8ff 54 | (stop << 4)
bogdanm 0:9b334a45a8ff 55 | (interrupt << 3)
bogdanm 0:9b334a45a8ff 56 | (acknowledge << 2);
bogdanm 0:9b334a45a8ff 57 }
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
bogdanm 0:9b334a45a8ff 60 I2C_CONSET(obj) = (start << 5)
bogdanm 0:9b334a45a8ff 61 | (stop << 4)
bogdanm 0:9b334a45a8ff 62 | (interrupt << 3)
bogdanm 0:9b334a45a8ff 63 | (acknowledge << 2);
bogdanm 0:9b334a45a8ff 64 }
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 // Clear the Serial Interrupt (SI)
bogdanm 0:9b334a45a8ff 67 static inline void i2c_clear_SI(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 68 i2c_conclr(obj, 0, 0, 1, 0);
bogdanm 0:9b334a45a8ff 69 }
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 static inline int i2c_status(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 72 return I2C_STAT(obj);
bogdanm 0:9b334a45a8ff 73 }
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 // Wait until the Serial Interrupt (SI) is set
bogdanm 0:9b334a45a8ff 76 static int i2c_wait_SI(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 77 int timeout = 0;
bogdanm 0:9b334a45a8ff 78 while (!(I2C_CONSET(obj) & (1 << 3))) {
bogdanm 0:9b334a45a8ff 79 timeout++;
bogdanm 0:9b334a45a8ff 80 if (timeout > 100000) return -1;
bogdanm 0:9b334a45a8ff 81 }
bogdanm 0:9b334a45a8ff 82 return 0;
bogdanm 0:9b334a45a8ff 83 }
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 static inline void i2c_interface_enable(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 86 I2C_CONSET(obj) = 0x40;
bogdanm 0:9b334a45a8ff 87 }
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
bogdanm 0:9b334a45a8ff 90 // determine the SPI to use
bogdanm 0:9b334a45a8ff 91 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
bogdanm 0:9b334a45a8ff 92 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
bogdanm 0:9b334a45a8ff 93 obj->i2c = (LPC_I2C_T *)pinmap_merge(i2c_sda, i2c_scl);
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 if ((int)obj->i2c == NC) {
bogdanm 0:9b334a45a8ff 96 error("I2C pin mapping failed");
bogdanm 0:9b334a45a8ff 97 }
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 // set default frequency at 100k
bogdanm 0:9b334a45a8ff 100 i2c_frequency(obj, 100000);
bogdanm 0:9b334a45a8ff 101 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 0:9b334a45a8ff 102 i2c_interface_enable(obj);
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 // Set SCU functions
bogdanm 0:9b334a45a8ff 105 if (scl == P_DED) {
bogdanm 0:9b334a45a8ff 106 // Enable dedicated I2C0 SDA and SCL pins (open drain)
bogdanm 0:9b334a45a8ff 107 LPC_SCU->SFSI2C0 = (1 << 11) | (1 << 3);
bogdanm 0:9b334a45a8ff 108 } else {
bogdanm 0:9b334a45a8ff 109 pinmap_pinout(sda, PinMap_I2C_SDA);
bogdanm 0:9b334a45a8ff 110 pinmap_pinout(scl, PinMap_I2C_SCL);
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112 }
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 inline int i2c_start(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 115 int status = 0;
bogdanm 0:9b334a45a8ff 116 // 8.1 Before master mode can be entered, I2CON must be initialised to:
bogdanm 0:9b334a45a8ff 117 // - I2EN STA STO SI AA - -
bogdanm 0:9b334a45a8ff 118 // - 1 0 0 0 x - -
bogdanm 0:9b334a45a8ff 119 // if AA = 0, it can't enter slave mode
bogdanm 0:9b334a45a8ff 120 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 // The master mode may now be entered by setting the STA bit
bogdanm 0:9b334a45a8ff 123 // this will generate a start condition when the bus becomes free
bogdanm 0:9b334a45a8ff 124 i2c_conset(obj, 1, 0, 0, 1);
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 i2c_wait_SI(obj);
bogdanm 0:9b334a45a8ff 127 status = i2c_status(obj);
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 // Clear start bit now transmitted, and interrupt bit
bogdanm 0:9b334a45a8ff 130 i2c_conclr(obj, 1, 0, 0, 0);
bogdanm 0:9b334a45a8ff 131 return status;
bogdanm 0:9b334a45a8ff 132 }
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 inline int i2c_stop(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 135 int timeout = 0;
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 // write the stop bit
bogdanm 0:9b334a45a8ff 138 i2c_conset(obj, 0, 1, 0, 0);
bogdanm 0:9b334a45a8ff 139 i2c_clear_SI(obj);
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 // wait for STO bit to reset
bogdanm 0:9b334a45a8ff 142 while(I2C_CONSET(obj) & (1 << 4)) {
bogdanm 0:9b334a45a8ff 143 timeout ++;
bogdanm 0:9b334a45a8ff 144 if (timeout > 100000) return 1;
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 return 0;
bogdanm 0:9b334a45a8ff 148 }
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
bogdanm 0:9b334a45a8ff 151 // write the data
bogdanm 0:9b334a45a8ff 152 I2C_DAT(obj) = value;
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 // clear SI to init a send
bogdanm 0:9b334a45a8ff 155 i2c_clear_SI(obj);
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 // wait and return status
bogdanm 0:9b334a45a8ff 158 i2c_wait_SI(obj);
bogdanm 0:9b334a45a8ff 159 return i2c_status(obj);
bogdanm 0:9b334a45a8ff 160 }
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 static inline int i2c_do_read(i2c_t *obj, int last) {
bogdanm 0:9b334a45a8ff 163 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
bogdanm 0:9b334a45a8ff 164 if(last) {
bogdanm 0:9b334a45a8ff 165 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
bogdanm 0:9b334a45a8ff 166 } else {
bogdanm 0:9b334a45a8ff 167 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
bogdanm 0:9b334a45a8ff 168 }
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 // accept byte
bogdanm 0:9b334a45a8ff 171 i2c_clear_SI(obj);
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 // wait for it to arrive
bogdanm 0:9b334a45a8ff 174 i2c_wait_SI(obj);
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 // return the data
bogdanm 0:9b334a45a8ff 177 return (I2C_DAT(obj) & 0xFF);
bogdanm 0:9b334a45a8ff 178 }
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 void i2c_frequency(i2c_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 181 // [TODO] set pclk to /4
bogdanm 0:9b334a45a8ff 182 uint32_t PCLK = SystemCoreClock / 4;
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 uint32_t pulse = PCLK / (hz * 2);
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 // I2C Rate
bogdanm 0:9b334a45a8ff 187 I2C_SCLL(obj, pulse);
bogdanm 0:9b334a45a8ff 188 I2C_SCLH(obj, pulse);
bogdanm 0:9b334a45a8ff 189 }
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 // The I2C does a read or a write as a whole operation
bogdanm 0:9b334a45a8ff 192 // There are two types of error conditions it can encounter
bogdanm 0:9b334a45a8ff 193 // 1) it can not obtain the bus
bogdanm 0:9b334a45a8ff 194 // 2) it gets error responses at part of the transmission
bogdanm 0:9b334a45a8ff 195 //
bogdanm 0:9b334a45a8ff 196 // We tackle them as follows:
bogdanm 0:9b334a45a8ff 197 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
bogdanm 0:9b334a45a8ff 198 // which basically turns it in to a 2)
bogdanm 0:9b334a45a8ff 199 // 2) on error, we use the standard error mechanisms to report/debug
bogdanm 0:9b334a45a8ff 200 //
bogdanm 0:9b334a45a8ff 201 // Therefore an I2C transaction should always complete. If it doesn't it is usually
bogdanm 0:9b334a45a8ff 202 // because something is setup wrong (e.g. wiring), and we don't need to programatically
bogdanm 0:9b334a45a8ff 203 // check for that
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
bogdanm 0:9b334a45a8ff 206 int count, status;
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 status = i2c_start(obj);
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 if ((status != 0x10) && (status != 0x08)) {
bogdanm 0:9b334a45a8ff 211 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 212 return I2C_ERROR_BUS_BUSY;
bogdanm 0:9b334a45a8ff 213 }
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 status = i2c_do_write(obj, (address | 0x01), 1);
bogdanm 0:9b334a45a8ff 216 if (status != 0x40) {
bogdanm 0:9b334a45a8ff 217 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 218 return I2C_ERROR_NO_SLAVE;
bogdanm 0:9b334a45a8ff 219 }
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 // Read in all except last byte
bogdanm 0:9b334a45a8ff 222 for (count = 0; count < (length - 1); count++) {
bogdanm 0:9b334a45a8ff 223 int value = i2c_do_read(obj, 0);
bogdanm 0:9b334a45a8ff 224 status = i2c_status(obj);
bogdanm 0:9b334a45a8ff 225 if (status != 0x50) {
bogdanm 0:9b334a45a8ff 226 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 227 return count;
bogdanm 0:9b334a45a8ff 228 }
bogdanm 0:9b334a45a8ff 229 data[count] = (char) value;
bogdanm 0:9b334a45a8ff 230 }
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 // read in last byte
bogdanm 0:9b334a45a8ff 233 int value = i2c_do_read(obj, 1);
bogdanm 0:9b334a45a8ff 234 status = i2c_status(obj);
bogdanm 0:9b334a45a8ff 235 if (status != 0x58) {
bogdanm 0:9b334a45a8ff 236 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 237 return length - 1;
bogdanm 0:9b334a45a8ff 238 }
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 data[count] = (char) value;
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 // If not repeated start, send stop.
bogdanm 0:9b334a45a8ff 243 if (stop) {
bogdanm 0:9b334a45a8ff 244 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 245 }
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 return length;
bogdanm 0:9b334a45a8ff 248 }
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
bogdanm 0:9b334a45a8ff 251 int i, status;
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 status = i2c_start(obj);
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 if ((status != 0x10) && (status != 0x08)) {
bogdanm 0:9b334a45a8ff 256 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 257 return I2C_ERROR_BUS_BUSY;
bogdanm 0:9b334a45a8ff 258 }
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 status = i2c_do_write(obj, (address & 0xFE), 1);
bogdanm 0:9b334a45a8ff 261 if (status != 0x18) {
bogdanm 0:9b334a45a8ff 262 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 263 return I2C_ERROR_NO_SLAVE;
bogdanm 0:9b334a45a8ff 264 }
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 for (i=0; i<length; i++) {
bogdanm 0:9b334a45a8ff 267 status = i2c_do_write(obj, data[i], 0);
bogdanm 0:9b334a45a8ff 268 if(status != 0x28) {
bogdanm 0:9b334a45a8ff 269 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 270 return i;
bogdanm 0:9b334a45a8ff 271 }
bogdanm 0:9b334a45a8ff 272 }
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
bogdanm 0:9b334a45a8ff 275 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
bogdanm 0:9b334a45a8ff 276 // i2c_clear_SI(obj);
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 // If not repeated start, send stop.
bogdanm 0:9b334a45a8ff 279 if (stop) {
bogdanm 0:9b334a45a8ff 280 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 281 }
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 return length;
bogdanm 0:9b334a45a8ff 284 }
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286 void i2c_reset(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 287 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 288 }
bogdanm 0:9b334a45a8ff 289
bogdanm 0:9b334a45a8ff 290 int i2c_byte_read(i2c_t *obj, int last) {
bogdanm 0:9b334a45a8ff 291 return (i2c_do_read(obj, last) & 0xFF);
bogdanm 0:9b334a45a8ff 292 }
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294 int i2c_byte_write(i2c_t *obj, int data) {
bogdanm 0:9b334a45a8ff 295 int ack;
bogdanm 0:9b334a45a8ff 296 int status = i2c_do_write(obj, (data & 0xFF), 0);
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 switch(status) {
bogdanm 0:9b334a45a8ff 299 case 0x18: case 0x28: // Master transmit ACKs
bogdanm 0:9b334a45a8ff 300 ack = 1;
bogdanm 0:9b334a45a8ff 301 break;
bogdanm 0:9b334a45a8ff 302 case 0x40: // Master receive address transmitted ACK
bogdanm 0:9b334a45a8ff 303 ack = 1;
bogdanm 0:9b334a45a8ff 304 break;
bogdanm 0:9b334a45a8ff 305 case 0xB8: // Slave transmit ACK
bogdanm 0:9b334a45a8ff 306 ack = 1;
bogdanm 0:9b334a45a8ff 307 break;
bogdanm 0:9b334a45a8ff 308 default:
bogdanm 0:9b334a45a8ff 309 ack = 0;
bogdanm 0:9b334a45a8ff 310 break;
bogdanm 0:9b334a45a8ff 311 }
bogdanm 0:9b334a45a8ff 312
bogdanm 0:9b334a45a8ff 313 return ack;
bogdanm 0:9b334a45a8ff 314 }
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
bogdanm 0:9b334a45a8ff 317 if (enable_slave != 0) {
bogdanm 0:9b334a45a8ff 318 i2c_conclr(obj, 1, 1, 1, 0);
bogdanm 0:9b334a45a8ff 319 i2c_conset(obj, 0, 0, 0, 1);
bogdanm 0:9b334a45a8ff 320 } else {
bogdanm 0:9b334a45a8ff 321 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 0:9b334a45a8ff 322 }
bogdanm 0:9b334a45a8ff 323 }
bogdanm 0:9b334a45a8ff 324
bogdanm 0:9b334a45a8ff 325 int i2c_slave_receive(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 326 int status;
bogdanm 0:9b334a45a8ff 327 int retval;
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 status = i2c_status(obj);
bogdanm 0:9b334a45a8ff 330 switch(status) {
bogdanm 0:9b334a45a8ff 331 case 0x60: retval = 3; break;
bogdanm 0:9b334a45a8ff 332 case 0x70: retval = 2; break;
bogdanm 0:9b334a45a8ff 333 case 0xA8: retval = 1; break;
bogdanm 0:9b334a45a8ff 334 default : retval = 0; break;
bogdanm 0:9b334a45a8ff 335 }
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 return(retval);
bogdanm 0:9b334a45a8ff 338 }
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 int i2c_slave_read(i2c_t *obj, char *data, int length) {
bogdanm 0:9b334a45a8ff 341 int count = 0;
bogdanm 0:9b334a45a8ff 342 int status;
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 do {
bogdanm 0:9b334a45a8ff 345 i2c_clear_SI(obj);
bogdanm 0:9b334a45a8ff 346 i2c_wait_SI(obj);
bogdanm 0:9b334a45a8ff 347 status = i2c_status(obj);
bogdanm 0:9b334a45a8ff 348 if((status == 0x80) || (status == 0x90)) {
bogdanm 0:9b334a45a8ff 349 data[count] = I2C_DAT(obj) & 0xFF;
bogdanm 0:9b334a45a8ff 350 }
bogdanm 0:9b334a45a8ff 351 count++;
bogdanm 0:9b334a45a8ff 352 } while (((status == 0x80) || (status == 0x90) ||
bogdanm 0:9b334a45a8ff 353 (status == 0x060) || (status == 0x70)) && (count < length));
bogdanm 0:9b334a45a8ff 354
bogdanm 0:9b334a45a8ff 355 if(status != 0xA0) {
bogdanm 0:9b334a45a8ff 356 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 357 }
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 i2c_clear_SI(obj);
bogdanm 0:9b334a45a8ff 360
bogdanm 0:9b334a45a8ff 361 return count;
bogdanm 0:9b334a45a8ff 362 }
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
bogdanm 0:9b334a45a8ff 365 int count = 0;
bogdanm 0:9b334a45a8ff 366 int status;
bogdanm 0:9b334a45a8ff 367
bogdanm 0:9b334a45a8ff 368 if(length <= 0) {
bogdanm 0:9b334a45a8ff 369 return(0);
bogdanm 0:9b334a45a8ff 370 }
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 do {
bogdanm 0:9b334a45a8ff 373 status = i2c_do_write(obj, data[count], 0);
bogdanm 0:9b334a45a8ff 374 count++;
bogdanm 0:9b334a45a8ff 375 } while ((count < length) && (status == 0xB8));
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 if ((status != 0xC0) && (status != 0xC8)) {
bogdanm 0:9b334a45a8ff 378 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 379 }
bogdanm 0:9b334a45a8ff 380
bogdanm 0:9b334a45a8ff 381 i2c_clear_SI(obj);
bogdanm 0:9b334a45a8ff 382
bogdanm 0:9b334a45a8ff 383 return(count);
bogdanm 0:9b334a45a8ff 384 }
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
bogdanm 0:9b334a45a8ff 387 uint32_t addr;
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 if ((idx >= 0) && (idx <= 3)) {
bogdanm 0:9b334a45a8ff 390 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
bogdanm 0:9b334a45a8ff 391 *((uint32_t *) addr) = address & 0xFF;
bogdanm 0:9b334a45a8ff 392 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[1][idx];
bogdanm 0:9b334a45a8ff 393 *((uint32_t *) addr) = mask & 0xFE;
bogdanm 0:9b334a45a8ff 394 }
bogdanm 0:9b334a45a8ff 395 }