added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Maxim/TARGET_MAX32600/rtc_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 144:ef7eb2e8f9f7
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
bogdanm | 0:9b334a45a8ff | 3 | * |
bogdanm | 0:9b334a45a8ff | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
bogdanm | 0:9b334a45a8ff | 5 | * copy of this software and associated documentation files (the "Software"), |
bogdanm | 0:9b334a45a8ff | 6 | * to deal in the Software without restriction, including without limitation |
bogdanm | 0:9b334a45a8ff | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
bogdanm | 0:9b334a45a8ff | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
bogdanm | 0:9b334a45a8ff | 9 | * Software is furnished to do so, subject to the following conditions: |
bogdanm | 0:9b334a45a8ff | 10 | * |
bogdanm | 0:9b334a45a8ff | 11 | * The above copyright notice and this permission notice shall be included |
bogdanm | 0:9b334a45a8ff | 12 | * in all copies or substantial portions of the Software. |
bogdanm | 0:9b334a45a8ff | 13 | * |
bogdanm | 0:9b334a45a8ff | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
bogdanm | 0:9b334a45a8ff | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
bogdanm | 0:9b334a45a8ff | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
bogdanm | 0:9b334a45a8ff | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
bogdanm | 0:9b334a45a8ff | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
bogdanm | 0:9b334a45a8ff | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
bogdanm | 0:9b334a45a8ff | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
bogdanm | 0:9b334a45a8ff | 21 | * |
bogdanm | 0:9b334a45a8ff | 22 | * Except as contained in this notice, the name of Maxim Integrated |
bogdanm | 0:9b334a45a8ff | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
bogdanm | 0:9b334a45a8ff | 24 | * Products, Inc. Branding Policy. |
bogdanm | 0:9b334a45a8ff | 25 | * |
bogdanm | 0:9b334a45a8ff | 26 | * The mere transfer of this software does not imply any licenses |
bogdanm | 0:9b334a45a8ff | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
bogdanm | 0:9b334a45a8ff | 28 | * trademarks, maskwork rights, or any other form of intellectual |
bogdanm | 0:9b334a45a8ff | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
bogdanm | 0:9b334a45a8ff | 30 | * ownership rights. |
bogdanm | 0:9b334a45a8ff | 31 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 32 | */ |
bogdanm | 0:9b334a45a8ff | 33 | |
bogdanm | 0:9b334a45a8ff | 34 | #include "rtc_api.h" |
bogdanm | 0:9b334a45a8ff | 35 | #include "lp_ticker_api.h" |
bogdanm | 0:9b334a45a8ff | 36 | #include "cmsis.h" |
bogdanm | 0:9b334a45a8ff | 37 | #include "rtc_regs.h" |
bogdanm | 0:9b334a45a8ff | 38 | #include "pwrseq_regs.h" |
bogdanm | 0:9b334a45a8ff | 39 | #include "clkman_regs.h" |
bogdanm | 0:9b334a45a8ff | 40 | |
bogdanm | 0:9b334a45a8ff | 41 | #define PRESCALE_VAL MXC_E_RTC_PRESCALE_DIV_2_0 // Set the divider for the 4kHz clock |
bogdanm | 0:9b334a45a8ff | 42 | #define SHIFT_AMT (MXC_E_RTC_PRESCALE_DIV_2_12 - PRESCALE_VAL) |
bogdanm | 0:9b334a45a8ff | 43 | |
bogdanm | 0:9b334a45a8ff | 44 | #define WINDOW 1000 |
bogdanm | 0:9b334a45a8ff | 45 | |
bogdanm | 0:9b334a45a8ff | 46 | static int rtc_inited = 0; |
bogdanm | 0:9b334a45a8ff | 47 | static volatile uint32_t overflow_cnt = 0; |
bogdanm | 0:9b334a45a8ff | 48 | |
bogdanm | 0:9b334a45a8ff | 49 | static uint64_t rtc_read64(void); |
bogdanm | 0:9b334a45a8ff | 50 | |
bogdanm | 0:9b334a45a8ff | 51 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 52 | static void overflow_handler(void) |
bogdanm | 0:9b334a45a8ff | 53 | { |
bogdanm | 0:9b334a45a8ff | 54 | MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_OVERFLOW; |
bogdanm | 0:9b334a45a8ff | 55 | MXC_PWRSEQ->flags = MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER; |
bogdanm | 0:9b334a45a8ff | 56 | overflow_cnt++; |
bogdanm | 0:9b334a45a8ff | 57 | } |
bogdanm | 0:9b334a45a8ff | 58 | |
bogdanm | 0:9b334a45a8ff | 59 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 60 | void rtc_init(void) |
bogdanm | 0:9b334a45a8ff | 61 | { |
bogdanm | 0:9b334a45a8ff | 62 | if (rtc_inited) { |
bogdanm | 0:9b334a45a8ff | 63 | return; |
bogdanm | 0:9b334a45a8ff | 64 | } |
bogdanm | 0:9b334a45a8ff | 65 | rtc_inited = 1; |
bogdanm | 0:9b334a45a8ff | 66 | |
bogdanm | 0:9b334a45a8ff | 67 | overflow_cnt = 0; |
bogdanm | 0:9b334a45a8ff | 68 | |
bogdanm | 0:9b334a45a8ff | 69 | // Enable the clock to the synchronizer |
bogdanm | 0:9b334a45a8ff | 70 | MXC_CLKMAN->clk_ctrl_13_rtc_int_sync = MXC_E_CLKMAN_CLK_SCALE_ENABLED; |
bogdanm | 0:9b334a45a8ff | 71 | |
bogdanm | 0:9b334a45a8ff | 72 | // Enable the clock to the RTC |
bogdanm | 0:9b334a45a8ff | 73 | MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN; |
bogdanm | 0:9b334a45a8ff | 74 | |
bogdanm | 0:9b334a45a8ff | 75 | // Prepare interrupt handlers |
bogdanm | 0:9b334a45a8ff | 76 | NVIC_SetVector(RTC0_IRQn, (uint32_t)lp_ticker_irq_handler); |
bogdanm | 0:9b334a45a8ff | 77 | NVIC_EnableIRQ(RTC0_IRQn); |
bogdanm | 0:9b334a45a8ff | 78 | NVIC_SetVector(RTC3_IRQn, (uint32_t)overflow_handler); |
bogdanm | 0:9b334a45a8ff | 79 | NVIC_EnableIRQ(RTC3_IRQn); |
bogdanm | 0:9b334a45a8ff | 80 | |
bogdanm | 0:9b334a45a8ff | 81 | // Enable wakeup on RTC rollover |
bogdanm | 0:9b334a45a8ff | 82 | MXC_PWRSEQ->msk_flags &= ~MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER; |
bogdanm | 0:9b334a45a8ff | 83 | |
bogdanm | 0:9b334a45a8ff | 84 | /* RTC registers are only reset on a power cycle. Do not reconfigure the RTC |
bogdanm | 0:9b334a45a8ff | 85 | * if it is already running. |
bogdanm | 0:9b334a45a8ff | 86 | */ |
bogdanm | 0:9b334a45a8ff | 87 | if (!(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE)) { |
bogdanm | 0:9b334a45a8ff | 88 | // Set the clock divider |
bogdanm | 0:9b334a45a8ff | 89 | MXC_RTCTMR->prescale = PRESCALE_VAL; |
bogdanm | 0:9b334a45a8ff | 90 | |
bogdanm | 0:9b334a45a8ff | 91 | // Enable the overflow interrupt |
bogdanm | 0:9b334a45a8ff | 92 | MXC_RTCTMR->inten |= MXC_F_RTC_FLAGS_OVERFLOW; |
bogdanm | 0:9b334a45a8ff | 93 | |
bogdanm | 0:9b334a45a8ff | 94 | // Restart the timer from 0 |
bogdanm | 0:9b334a45a8ff | 95 | MXC_RTCTMR->timer = 0; |
bogdanm | 0:9b334a45a8ff | 96 | |
bogdanm | 0:9b334a45a8ff | 97 | // Enable the RTC |
bogdanm | 0:9b334a45a8ff | 98 | MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE; |
bogdanm | 0:9b334a45a8ff | 99 | } |
bogdanm | 0:9b334a45a8ff | 100 | } |
bogdanm | 0:9b334a45a8ff | 101 | |
bogdanm | 0:9b334a45a8ff | 102 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 103 | void lp_ticker_init(void) |
bogdanm | 0:9b334a45a8ff | 104 | { |
bogdanm | 0:9b334a45a8ff | 105 | rtc_init(); |
bogdanm | 0:9b334a45a8ff | 106 | } |
bogdanm | 0:9b334a45a8ff | 107 | |
bogdanm | 0:9b334a45a8ff | 108 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 109 | void rtc_free(void) |
bogdanm | 0:9b334a45a8ff | 110 | { |
bogdanm | 0:9b334a45a8ff | 111 | if (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE) { |
bogdanm | 0:9b334a45a8ff | 112 | // Clear and disable RTC |
bogdanm | 0:9b334a45a8ff | 113 | MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_CLEAR; |
bogdanm | 0:9b334a45a8ff | 114 | MXC_RTCTMR->ctrl &= ~MXC_F_RTC_CTRL_ENABLE; |
bogdanm | 0:9b334a45a8ff | 115 | |
bogdanm | 0:9b334a45a8ff | 116 | // Wait for pending transactions |
bogdanm | 0:9b334a45a8ff | 117 | while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING); |
bogdanm | 0:9b334a45a8ff | 118 | } |
bogdanm | 0:9b334a45a8ff | 119 | |
bogdanm | 0:9b334a45a8ff | 120 | // Disable the clock to the RTC |
bogdanm | 0:9b334a45a8ff | 121 | MXC_PWRSEQ->reg0 &= ~(MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP); |
bogdanm | 0:9b334a45a8ff | 122 | |
bogdanm | 0:9b334a45a8ff | 123 | // Disable the clock to the synchronizer |
bogdanm | 0:9b334a45a8ff | 124 | MXC_CLKMAN->clk_ctrl_13_rtc_int_sync = MXC_E_CLKMAN_CLK_SCALE_DISABLED; |
bogdanm | 0:9b334a45a8ff | 125 | } |
bogdanm | 0:9b334a45a8ff | 126 | |
bogdanm | 0:9b334a45a8ff | 127 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 128 | int rtc_isenabled(void) |
bogdanm | 0:9b334a45a8ff | 129 | { |
bogdanm | 0:9b334a45a8ff | 130 | return (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE); |
bogdanm | 0:9b334a45a8ff | 131 | } |
bogdanm | 0:9b334a45a8ff | 132 | |
bogdanm | 0:9b334a45a8ff | 133 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 134 | time_t rtc_read(void) |
bogdanm | 0:9b334a45a8ff | 135 | { |
bogdanm | 0:9b334a45a8ff | 136 | uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt; |
bogdanm | 0:9b334a45a8ff | 137 | uint32_t ovf1, ovf2; |
bogdanm | 0:9b334a45a8ff | 138 | |
bogdanm | 0:9b334a45a8ff | 139 | // Ensure coherency between overflow_cnt and timer |
bogdanm | 0:9b334a45a8ff | 140 | do { |
bogdanm | 0:9b334a45a8ff | 141 | ovf_cnt_1 = overflow_cnt; |
bogdanm | 0:9b334a45a8ff | 142 | ovf1 = MXC_RTCTMR->flags & MXC_F_RTC_FLAGS_OVERFLOW; |
bogdanm | 0:9b334a45a8ff | 143 | timer_cnt = MXC_RTCTMR->timer; |
bogdanm | 0:9b334a45a8ff | 144 | ovf2 = MXC_RTCTMR->flags & MXC_F_RTC_FLAGS_OVERFLOW; |
bogdanm | 0:9b334a45a8ff | 145 | ovf_cnt_2 = overflow_cnt; |
bogdanm | 0:9b334a45a8ff | 146 | } while ((ovf_cnt_1 != ovf_cnt_2) || (ovf1 != ovf2)); |
bogdanm | 0:9b334a45a8ff | 147 | |
bogdanm | 0:9b334a45a8ff | 148 | // Account for an unserviced interrupt |
bogdanm | 0:9b334a45a8ff | 149 | if (ovf1) { |
bogdanm | 0:9b334a45a8ff | 150 | ovf_cnt_1++; |
bogdanm | 0:9b334a45a8ff | 151 | } |
bogdanm | 0:9b334a45a8ff | 152 | |
bogdanm | 0:9b334a45a8ff | 153 | return (timer_cnt >> SHIFT_AMT) + (ovf_cnt_1 << (32 - SHIFT_AMT)); |
bogdanm | 0:9b334a45a8ff | 154 | } |
bogdanm | 0:9b334a45a8ff | 155 | |
bogdanm | 0:9b334a45a8ff | 156 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 157 | static uint64_t rtc_read64(void) |
bogdanm | 0:9b334a45a8ff | 158 | { |
bogdanm | 0:9b334a45a8ff | 159 | uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt; |
bogdanm | 0:9b334a45a8ff | 160 | uint32_t ovf1, ovf2; |
bogdanm | 0:9b334a45a8ff | 161 | uint64_t current_us; |
bogdanm | 0:9b334a45a8ff | 162 | |
bogdanm | 0:9b334a45a8ff | 163 | // Ensure coherency between overflow_cnt and timer |
bogdanm | 0:9b334a45a8ff | 164 | do { |
bogdanm | 0:9b334a45a8ff | 165 | ovf_cnt_1 = overflow_cnt; |
bogdanm | 0:9b334a45a8ff | 166 | ovf1 = MXC_RTCTMR->flags & MXC_F_RTC_FLAGS_OVERFLOW; |
bogdanm | 0:9b334a45a8ff | 167 | timer_cnt = MXC_RTCTMR->timer; |
bogdanm | 0:9b334a45a8ff | 168 | ovf2 = MXC_RTCTMR->flags & MXC_F_RTC_FLAGS_OVERFLOW; |
bogdanm | 0:9b334a45a8ff | 169 | ovf_cnt_2 = overflow_cnt; |
bogdanm | 0:9b334a45a8ff | 170 | } while ((ovf_cnt_1 != ovf_cnt_2) || (ovf1 != ovf2)); |
bogdanm | 0:9b334a45a8ff | 171 | |
bogdanm | 0:9b334a45a8ff | 172 | // Account for an unserviced interrupt |
bogdanm | 0:9b334a45a8ff | 173 | if (ovf1) { |
bogdanm | 0:9b334a45a8ff | 174 | ovf_cnt_1++; |
bogdanm | 0:9b334a45a8ff | 175 | } |
bogdanm | 0:9b334a45a8ff | 176 | |
bogdanm | 0:9b334a45a8ff | 177 | current_us = (((uint64_t)timer_cnt * 1000000) >> SHIFT_AMT) + (((uint64_t)ovf_cnt_1 * 1000000) << (32 - SHIFT_AMT)); |
bogdanm | 0:9b334a45a8ff | 178 | |
bogdanm | 0:9b334a45a8ff | 179 | return current_us; |
bogdanm | 0:9b334a45a8ff | 180 | } |
bogdanm | 0:9b334a45a8ff | 181 | |
bogdanm | 0:9b334a45a8ff | 182 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 183 | void rtc_write(time_t t) |
bogdanm | 0:9b334a45a8ff | 184 | { |
bogdanm | 0:9b334a45a8ff | 185 | MXC_RTCTMR->ctrl &= ~MXC_F_RTC_CTRL_ENABLE; // disable the timer while updating |
bogdanm | 0:9b334a45a8ff | 186 | MXC_RTCTMR->timer = t << SHIFT_AMT; |
bogdanm | 0:9b334a45a8ff | 187 | overflow_cnt = t >> (32 - SHIFT_AMT); |
bogdanm | 0:9b334a45a8ff | 188 | MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE; // enable the timer while updating |
bogdanm | 0:9b334a45a8ff | 189 | } |
bogdanm | 0:9b334a45a8ff | 190 | |
bogdanm | 0:9b334a45a8ff | 191 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 192 | void lp_ticker_set_interrupt(timestamp_t timestamp) |
bogdanm | 0:9b334a45a8ff | 193 | { |
bogdanm | 0:9b334a45a8ff | 194 | uint32_t comp_value; |
bogdanm | 0:9b334a45a8ff | 195 | uint64_t curr_ts64; |
bogdanm | 0:9b334a45a8ff | 196 | uint64_t ts64; |
bogdanm | 0:9b334a45a8ff | 197 | |
bogdanm | 0:9b334a45a8ff | 198 | // Note: interrupts are disabled before this function is called. |
bogdanm | 0:9b334a45a8ff | 199 | |
bogdanm | 0:9b334a45a8ff | 200 | // Disable the alarm while it is prepared |
bogdanm | 0:9b334a45a8ff | 201 | MXC_RTCTMR->inten &= ~MXC_F_RTC_INTEN_COMP0; |
bogdanm | 0:9b334a45a8ff | 202 | |
bogdanm | 0:9b334a45a8ff | 203 | curr_ts64 = rtc_read64(); |
bogdanm | 0:9b334a45a8ff | 204 | ts64 = (uint64_t)timestamp | (curr_ts64 & 0xFFFFFFFF00000000ULL); |
bogdanm | 0:9b334a45a8ff | 205 | |
bogdanm | 0:9b334a45a8ff | 206 | // If this event is older than a recent window, it must be in the future |
bogdanm | 0:9b334a45a8ff | 207 | if ((ts64 < (curr_ts64 - WINDOW)) && ((curr_ts64 - WINDOW) < curr_ts64)) { |
bogdanm | 0:9b334a45a8ff | 208 | ts64 += 0x100000000ULL; |
bogdanm | 0:9b334a45a8ff | 209 | } |
bogdanm | 0:9b334a45a8ff | 210 | |
bogdanm | 0:9b334a45a8ff | 211 | uint32_t timer = MXC_RTCTMR->timer; |
bogdanm | 0:9b334a45a8ff | 212 | if (ts64 <= curr_ts64) { |
bogdanm | 0:9b334a45a8ff | 213 | // This event has already occurred. Set the alarm to expire immediately. |
bogdanm | 0:9b334a45a8ff | 214 | comp_value = timer + 1; |
bogdanm | 0:9b334a45a8ff | 215 | } else { |
bogdanm | 0:9b334a45a8ff | 216 | comp_value = (ts64 << SHIFT_AMT) / 1000000; |
bogdanm | 0:9b334a45a8ff | 217 | } |
bogdanm | 0:9b334a45a8ff | 218 | |
bogdanm | 0:9b334a45a8ff | 219 | // Ensure that the compare value is far enough in the future to guarantee the interrupt occurs. |
bogdanm | 0:9b334a45a8ff | 220 | if ((comp_value < (timer + 2)) && (comp_value > (timer - 10))) { |
bogdanm | 0:9b334a45a8ff | 221 | comp_value = timer + 2; |
bogdanm | 0:9b334a45a8ff | 222 | } |
bogdanm | 0:9b334a45a8ff | 223 | |
bogdanm | 0:9b334a45a8ff | 224 | MXC_RTCTMR->comp[0] = comp_value; |
bogdanm | 0:9b334a45a8ff | 225 | MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_COMP0; // clear interrupt |
bogdanm | 0:9b334a45a8ff | 226 | MXC_RTCTMR->inten |= MXC_F_RTC_INTEN_COMP0; // enable the interrupt |
bogdanm | 0:9b334a45a8ff | 227 | |
bogdanm | 0:9b334a45a8ff | 228 | // Enable wakeup from RTC |
bogdanm | 0:9b334a45a8ff | 229 | MXC_PWRSEQ->msk_flags &= ~MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0; |
bogdanm | 0:9b334a45a8ff | 230 | } |
bogdanm | 0:9b334a45a8ff | 231 | |
bogdanm | 0:9b334a45a8ff | 232 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 233 | inline void lp_ticker_disable_interrupt(void) |
bogdanm | 0:9b334a45a8ff | 234 | { |
bogdanm | 0:9b334a45a8ff | 235 | MXC_RTCTMR->inten &= ~MXC_F_RTC_INTEN_COMP0; |
bogdanm | 0:9b334a45a8ff | 236 | } |
bogdanm | 0:9b334a45a8ff | 237 | |
bogdanm | 0:9b334a45a8ff | 238 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 239 | inline void lp_ticker_clear_interrupt(void) |
bogdanm | 0:9b334a45a8ff | 240 | { |
bogdanm | 0:9b334a45a8ff | 241 | MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS; |
bogdanm | 0:9b334a45a8ff | 242 | MXC_PWRSEQ->flags = MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0; |
bogdanm | 0:9b334a45a8ff | 243 | } |
bogdanm | 0:9b334a45a8ff | 244 | |
bogdanm | 0:9b334a45a8ff | 245 | //****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 246 | inline uint32_t lp_ticker_read(void) |
bogdanm | 0:9b334a45a8ff | 247 | { |
bogdanm | 0:9b334a45a8ff | 248 | return rtc_read64(); |
bogdanm | 0:9b334a45a8ff | 249 | } |