Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/spi_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "spi_api.h"
bogdanm 0:9b334a45a8ff 17
bogdanm 0:9b334a45a8ff 18 #include <math.h>
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 21 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 22 #include "clk_freqs.h"
bogdanm 0:9b334a45a8ff 23 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
bogdanm 0:9b334a45a8ff 26 // determine the SPI to use
bogdanm 0:9b334a45a8ff 27 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 28 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 29 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 30 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 31 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
bogdanm 0:9b334a45a8ff 32 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 obj->spi = (SPI_Type*)pinmap_merge(spi_data, spi_cntl);
bogdanm 0:9b334a45a8ff 35 MBED_ASSERT((int)obj->spi != NC);
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 // enable power and clocking
bogdanm 0:9b334a45a8ff 38 switch ((int)obj->spi) {
bogdanm 0:9b334a45a8ff 39 case SPI_0: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 22; break;
bogdanm 0:9b334a45a8ff 40 case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break;
bogdanm 0:9b334a45a8ff 41 }
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 // enable SPI
bogdanm 0:9b334a45a8ff 44 obj->spi->C1 |= SPI_C1_SPE_MASK;
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 // pin out the spi pins
bogdanm 0:9b334a45a8ff 47 pinmap_pinout(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 48 pinmap_pinout(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 49 pinmap_pinout(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 50 if (ssel != NC) {
bogdanm 0:9b334a45a8ff 51 pinmap_pinout(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 52 }
bogdanm 0:9b334a45a8ff 53 }
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 void spi_free(spi_t *obj) {
bogdanm 0:9b334a45a8ff 56 // [TODO]
bogdanm 0:9b334a45a8ff 57 }
bogdanm 0:9b334a45a8ff 58 void spi_format(spi_t *obj, int bits, int mode, int slave) {
bogdanm 0:9b334a45a8ff 59 MBED_ASSERT(bits == 8);
bogdanm 0:9b334a45a8ff 60 MBED_ASSERT((mode >= 0) && (mode <= 3));
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 uint8_t polarity = (mode & 0x2) ? 1 : 0;
bogdanm 0:9b334a45a8ff 63 uint8_t phase = (mode & 0x1) ? 1 : 0;
bogdanm 0:9b334a45a8ff 64 uint8_t c1_data = ((!slave) << 4) | (polarity << 3) | (phase << 2);
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 // clear MSTR, CPOL and CPHA bits
bogdanm 0:9b334a45a8ff 67 obj->spi->C1 &= ~(0x7 << 2);
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 // write new value
bogdanm 0:9b334a45a8ff 70 obj->spi->C1 |= c1_data;
bogdanm 0:9b334a45a8ff 71 }
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 void spi_frequency(spi_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 74 uint32_t error = 0;
bogdanm 0:9b334a45a8ff 75 uint32_t p_error = 0xffffffff;
bogdanm 0:9b334a45a8ff 76 uint32_t ref = 0;
bogdanm 0:9b334a45a8ff 77 uint8_t spr = 0;
bogdanm 0:9b334a45a8ff 78 uint8_t ref_spr = 0;
bogdanm 0:9b334a45a8ff 79 uint8_t ref_prescaler = 0;
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 // bus clk
bogdanm 0:9b334a45a8ff 82 uint32_t PCLK = bus_frequency();
bogdanm 0:9b334a45a8ff 83 uint8_t prescaler = 1;
bogdanm 0:9b334a45a8ff 84 uint8_t divisor = 2;
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 for (prescaler = 1; prescaler <= 8; prescaler++) {
bogdanm 0:9b334a45a8ff 87 divisor = 2;
bogdanm 0:9b334a45a8ff 88 for (spr = 0; spr <= 8; spr++, divisor *= 2) {
bogdanm 0:9b334a45a8ff 89 ref = PCLK / (prescaler*divisor);
bogdanm 0:9b334a45a8ff 90 if (ref > (uint32_t)hz)
bogdanm 0:9b334a45a8ff 91 continue;
bogdanm 0:9b334a45a8ff 92 error = hz - ref;
bogdanm 0:9b334a45a8ff 93 if (error < p_error) {
bogdanm 0:9b334a45a8ff 94 ref_spr = spr;
bogdanm 0:9b334a45a8ff 95 ref_prescaler = prescaler - 1;
bogdanm 0:9b334a45a8ff 96 p_error = error;
bogdanm 0:9b334a45a8ff 97 }
bogdanm 0:9b334a45a8ff 98 }
bogdanm 0:9b334a45a8ff 99 }
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 // set SPPR and SPR
bogdanm 0:9b334a45a8ff 102 obj->spi->BR = ((ref_prescaler & 0x7) << 4) | (ref_spr & 0xf);
bogdanm 0:9b334a45a8ff 103 }
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 static inline int spi_writeable(spi_t * obj) {
bogdanm 0:9b334a45a8ff 106 return (obj->spi->S & SPI_S_SPTEF_MASK) ? 1 : 0;
bogdanm 0:9b334a45a8ff 107 }
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 static inline int spi_readable(spi_t * obj) {
bogdanm 0:9b334a45a8ff 110 return (obj->spi->S & SPI_S_SPRF_MASK) ? 1 : 0;
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 int spi_master_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 114 // wait tx buffer empty
bogdanm 0:9b334a45a8ff 115 while(!spi_writeable(obj));
bogdanm 0:9b334a45a8ff 116 obj->spi->D = (value & 0xff);
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 // wait rx buffer full
bogdanm 0:9b334a45a8ff 119 while (!spi_readable(obj));
bogdanm 0:9b334a45a8ff 120 return obj->spi->D & 0xff;
bogdanm 0:9b334a45a8ff 121 }
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 int spi_slave_receive(spi_t *obj) {
bogdanm 0:9b334a45a8ff 124 return spi_readable(obj);
bogdanm 0:9b334a45a8ff 125 }
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 int spi_slave_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 128 return obj->spi->D;
bogdanm 0:9b334a45a8ff 129 }
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 void spi_slave_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 132 while (!spi_writeable(obj));
bogdanm 0:9b334a45a8ff 133 obj->spi->D = value;
bogdanm 0:9b334a45a8ff 134 }