Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/gpio_irq_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include <stddef.h>
bogdanm 0:9b334a45a8ff 17 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "gpio_irq_api.h"
bogdanm 0:9b334a45a8ff 20 #include "gpio_api.h"
bogdanm 0:9b334a45a8ff 21 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 #define CHANNEL_NUM 64
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 static uint32_t channel_ids[CHANNEL_NUM] = {0};
bogdanm 0:9b334a45a8ff 26 static gpio_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28 #define IRQ_DISABLED (0)
bogdanm 0:9b334a45a8ff 29 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
bogdanm 0:9b334a45a8ff 30 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
bogdanm 0:9b334a45a8ff 31 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 const uint32_t search_bits[] = {0x0000FFFF, 0x000000FF, 0x0000000F, 0x00000003, 0x00000001};
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
bogdanm 0:9b334a45a8ff 36 uint32_t isfr;
bogdanm 0:9b334a45a8ff 37 uint8_t location;
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 while((isfr = port->ISFR) != 0) {
bogdanm 0:9b334a45a8ff 40 location = 0;
bogdanm 0:9b334a45a8ff 41 for (int i = 0; i < 5; i++) {
bogdanm 0:9b334a45a8ff 42 if (!(isfr & (search_bits[i] << location)))
bogdanm 0:9b334a45a8ff 43 location += 1 << (4 - i);
bogdanm 0:9b334a45a8ff 44 }
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 uint32_t id = channel_ids[ch_base + location];
bogdanm 0:9b334a45a8ff 47 if (id == 0) {
bogdanm 0:9b334a45a8ff 48 continue;
bogdanm 0:9b334a45a8ff 49 }
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 FGPIO_Type *gpio;
bogdanm 0:9b334a45a8ff 52 gpio_irq_event event = IRQ_NONE;
bogdanm 0:9b334a45a8ff 53 switch (port->PCR[location] & PORT_PCR_IRQC_MASK) {
bogdanm 0:9b334a45a8ff 54 case IRQ_RAISING_EDGE:
bogdanm 0:9b334a45a8ff 55 event = IRQ_RISE;
bogdanm 0:9b334a45a8ff 56 break;
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 case IRQ_FALLING_EDGE:
bogdanm 0:9b334a45a8ff 59 event = IRQ_FALL;
bogdanm 0:9b334a45a8ff 60 break;
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 case IRQ_EITHER_EDGE:
bogdanm 0:9b334a45a8ff 63 gpio = (port == PORTA) ? (FPTA) : (FPTD);
bogdanm 0:9b334a45a8ff 64 event = (gpio->PDIR & (1 << location)) ? (IRQ_RISE) : (IRQ_FALL);
bogdanm 0:9b334a45a8ff 65 break;
bogdanm 0:9b334a45a8ff 66 }
bogdanm 0:9b334a45a8ff 67 if (event != IRQ_NONE) {
bogdanm 0:9b334a45a8ff 68 irq_handler(id, event);
bogdanm 0:9b334a45a8ff 69 }
bogdanm 0:9b334a45a8ff 70 port->ISFR = 1 << location;
bogdanm 0:9b334a45a8ff 71 }
bogdanm 0:9b334a45a8ff 72 }
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 void gpio_irqA(void) {handle_interrupt_in(PORTA, 0);}
bogdanm 0:9b334a45a8ff 75 void gpio_irqD(void) {handle_interrupt_in(PORTD, 32);}
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
bogdanm 0:9b334a45a8ff 78 if (pin == NC) return -1;
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 irq_handler = handler;
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 obj->port = pin >> PORT_SHIFT;
bogdanm 0:9b334a45a8ff 83 obj->pin = (pin & 0x7F) >> 2;
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 uint32_t ch_base, vector;
bogdanm 0:9b334a45a8ff 86 IRQn_Type irq_n;
bogdanm 0:9b334a45a8ff 87 switch (obj->port) {
bogdanm 0:9b334a45a8ff 88 case PortA:
bogdanm 0:9b334a45a8ff 89 ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
bogdanm 0:9b334a45a8ff 90 break;
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 case PortD:
bogdanm 0:9b334a45a8ff 93 ch_base = 32; irq_n = PORTD_IRQn; vector = (uint32_t)gpio_irqD;
bogdanm 0:9b334a45a8ff 94 break;
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 default:
bogdanm 0:9b334a45a8ff 97 error("gpio_irq only supported on port A and D");
bogdanm 0:9b334a45a8ff 98 break;
bogdanm 0:9b334a45a8ff 99 }
bogdanm 0:9b334a45a8ff 100 NVIC_SetVector(irq_n, vector);
bogdanm 0:9b334a45a8ff 101 NVIC_EnableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 obj->ch = ch_base + obj->pin;
bogdanm 0:9b334a45a8ff 104 channel_ids[obj->ch] = id;
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 return 0;
bogdanm 0:9b334a45a8ff 107 }
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 void gpio_irq_free(gpio_irq_t *obj) {
bogdanm 0:9b334a45a8ff 110 channel_ids[obj->ch] = 0;
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
bogdanm 0:9b334a45a8ff 114 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 uint32_t irq_settings = IRQ_DISABLED;
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
bogdanm 0:9b334a45a8ff 119 case IRQ_DISABLED:
bogdanm 0:9b334a45a8ff 120 if (enable) {
bogdanm 0:9b334a45a8ff 121 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
bogdanm 0:9b334a45a8ff 122 }
bogdanm 0:9b334a45a8ff 123 break;
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 case IRQ_RAISING_EDGE:
bogdanm 0:9b334a45a8ff 126 if (enable) {
bogdanm 0:9b334a45a8ff 127 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
bogdanm 0:9b334a45a8ff 128 } else {
bogdanm 0:9b334a45a8ff 129 if (event == IRQ_FALL)
bogdanm 0:9b334a45a8ff 130 irq_settings = IRQ_RAISING_EDGE;
bogdanm 0:9b334a45a8ff 131 }
bogdanm 0:9b334a45a8ff 132 break;
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 case IRQ_FALLING_EDGE:
bogdanm 0:9b334a45a8ff 135 if (enable) {
bogdanm 0:9b334a45a8ff 136 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
bogdanm 0:9b334a45a8ff 137 } else {
bogdanm 0:9b334a45a8ff 138 if (event == IRQ_RISE)
bogdanm 0:9b334a45a8ff 139 irq_settings = IRQ_FALLING_EDGE;
bogdanm 0:9b334a45a8ff 140 }
bogdanm 0:9b334a45a8ff 141 break;
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 case IRQ_EITHER_EDGE:
bogdanm 0:9b334a45a8ff 144 if (enable) {
bogdanm 0:9b334a45a8ff 145 irq_settings = IRQ_EITHER_EDGE;
bogdanm 0:9b334a45a8ff 146 } else {
bogdanm 0:9b334a45a8ff 147 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
bogdanm 0:9b334a45a8ff 148 }
bogdanm 0:9b334a45a8ff 149 break;
bogdanm 0:9b334a45a8ff 150 }
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 // Interrupt configuration and clear interrupt
bogdanm 0:9b334a45a8ff 153 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
bogdanm 0:9b334a45a8ff 154 }
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 void gpio_irq_enable(gpio_irq_t *obj) {
bogdanm 0:9b334a45a8ff 157 if (obj->port == PortA) {
bogdanm 0:9b334a45a8ff 158 NVIC_EnableIRQ(PORTA_IRQn);
bogdanm 0:9b334a45a8ff 159 } else if (obj->port == PortD) {
bogdanm 0:9b334a45a8ff 160 NVIC_EnableIRQ(PORTD_IRQn);
bogdanm 0:9b334a45a8ff 161 }
bogdanm 0:9b334a45a8ff 162 }
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 void gpio_irq_disable(gpio_irq_t *obj) {
bogdanm 0:9b334a45a8ff 165 if (obj->port == PortA) {
bogdanm 0:9b334a45a8ff 166 NVIC_DisableIRQ(PORTA_IRQn);
bogdanm 0:9b334a45a8ff 167 } else if (obj->port == PortD) {
bogdanm 0:9b334a45a8ff 168 NVIC_DisableIRQ(PORTD_IRQn);
bogdanm 0:9b334a45a8ff 169 }
bogdanm 0:9b334a45a8ff 170 }