Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_K20XX/rtc_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2015 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "rtc_api.h"
bogdanm 0:9b334a45a8ff 17
bogdanm 0:9b334a45a8ff 18 static void init(void) {
bogdanm 0:9b334a45a8ff 19 // enable PORTC clock
bogdanm 0:9b334a45a8ff 20 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 // enable RTC clock
bogdanm 0:9b334a45a8ff 23 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 // OSC32 as source
bogdanm 0:9b334a45a8ff 26 SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
bogdanm 0:9b334a45a8ff 27 SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(0);
bogdanm 0:9b334a45a8ff 28 }
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 void rtc_init(void) {
bogdanm 0:9b334a45a8ff 31 init();
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 // Enable the oscillator
bogdanm 0:9b334a45a8ff 34 #if defined (TARGET_K20D50M)
bogdanm 0:9b334a45a8ff 35 RTC->CR |= RTC_CR_OSCE_MASK;
bogdanm 0:9b334a45a8ff 36 #else
bogdanm 0:9b334a45a8ff 37 // Teensy3.1 requires 20pF MCU loading capacitors for 32KHz RTC oscillator
bogdanm 0:9b334a45a8ff 38 /* RTC->CR: SC2P=0,SC4P=1,SC8P=0,SC16P=1,CLKO=0,OSCE=1,UM=0,SUP=0,SPE=0,SWR=0 */
bogdanm 0:9b334a45a8ff 39 RTC->CR |= RTC_CR_OSCE_MASK |RTC_CR_SC16P_MASK | RTC_CR_SC4P_MASK;
bogdanm 0:9b334a45a8ff 40 #endif
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 //Configure the TSR. default value: 1
bogdanm 0:9b334a45a8ff 43 RTC->TSR = 1;
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 // enable counter
bogdanm 0:9b334a45a8ff 46 RTC->SR |= RTC_SR_TCE_MASK;
bogdanm 0:9b334a45a8ff 47 }
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 void rtc_free(void) {
bogdanm 0:9b334a45a8ff 50 // [TODO]
bogdanm 0:9b334a45a8ff 51 }
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /*
bogdanm 0:9b334a45a8ff 54 * Little check routine to see if the RTC has been enabled
bogdanm 0:9b334a45a8ff 55 * 0 = Disabled, 1 = Enabled
bogdanm 0:9b334a45a8ff 56 */
bogdanm 0:9b334a45a8ff 57 int rtc_isenabled(void) {
bogdanm 0:9b334a45a8ff 58 // even if the RTC module is enabled,
bogdanm 0:9b334a45a8ff 59 // as we use RTC_CLKIN and an external clock,
bogdanm 0:9b334a45a8ff 60 // we need to reconfigure the pins. That is why we
bogdanm 0:9b334a45a8ff 61 // call init() if the rtc is enabled
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 // if RTC not enabled return 0
bogdanm 0:9b334a45a8ff 64 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
bogdanm 0:9b334a45a8ff 65 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
bogdanm 0:9b334a45a8ff 66 if ((RTC->SR & RTC_SR_TCE_MASK) == 0)
bogdanm 0:9b334a45a8ff 67 return 0;
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 init();
bogdanm 0:9b334a45a8ff 70 return 1;
bogdanm 0:9b334a45a8ff 71 }
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 time_t rtc_read(void) {
bogdanm 0:9b334a45a8ff 74 return RTC->TSR;
bogdanm 0:9b334a45a8ff 75 }
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 void rtc_write(time_t t) {
bogdanm 0:9b334a45a8ff 78 // disable counter
bogdanm 0:9b334a45a8ff 79 RTC->SR &= ~RTC_SR_TCE_MASK;
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 // we do not write 0 into TSR
bogdanm 0:9b334a45a8ff 82 // to avoid invalid time
bogdanm 0:9b334a45a8ff 83 if (t == 0)
bogdanm 0:9b334a45a8ff 84 t = 1;
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 // write seconds
bogdanm 0:9b334a45a8ff 87 RTC->TSR = t;
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 // re-enable counter
bogdanm 0:9b334a45a8ff 90 RTC->SR |= RTC_SR_TCE_MASK;
bogdanm 0:9b334a45a8ff 91 }